[kernel] update to 2.6.26.3 and 2.6.25.16
[openwrt.git] / target / linux / generic-2.6 / patches-2.6.26 / 910-cryptodev_backport.patch
1 --- a/crypto/Kconfig
2 +++ b/crypto/Kconfig
3 @@ -65,6 +65,7 @@
4  config CRYPTO_CRYPTD
5         tristate "Software async crypto daemon"
6         select CRYPTO_BLKCIPHER
7 +       select CRYPTO_HASH
8         select CRYPTO_MANAGER
9         help
10           This is a generic software asynchronous crypto daemon that
11 @@ -212,7 +213,7 @@
12  
13  config CRYPTO_CRC32C
14         tristate "CRC32c CRC algorithm"
15 -       select CRYPTO_ALGAPI
16 +       select CRYPTO_HASH
17         select LIBCRC32C
18         help
19           Castagnoli, et al Cyclic Redundancy-Check Algorithm.  Used
20 @@ -241,6 +242,57 @@
21           should not be used for other purposes because of the weakness
22           of the algorithm.
23  
24 +config CRYPTO_RMD128
25 +  tristate "RIPEMD-128 digest algorithm"
26 +  select CRYPTO_ALGAPI
27 +  help
28 +    RIPEMD-128 (ISO/IEC 10118-3:2004).
29 +
30 +    RIPEMD-128 is a 128-bit cryptographic hash function. It should only
31 +    to be used as a secure replacement for RIPEMD. For other use cases
32 +    RIPEMD-160 should be used.
33 +
34 +    Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
35 +    See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
36 +
37 +config CRYPTO_RMD160
38 +  tristate "RIPEMD-160 digest algorithm"
39 +  select CRYPTO_ALGAPI
40 +  help
41 +    RIPEMD-160 (ISO/IEC 10118-3:2004).
42 +
43 +    RIPEMD-160 is a 160-bit cryptographic hash function. It is intended
44 +    to be used as a secure replacement for the 128-bit hash functions
45 +    MD4, MD5 and it's predecessor RIPEMD (not to be confused with RIPEMD-128).
46 +
47 +    It's speed is comparable to SHA1 and there are no known attacks against
48 +    RIPEMD-160.
49 +
50 +    Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
51 +    See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
52 +
53 +config CRYPTO_RMD256
54 +  tristate "RIPEMD-256 digest algorithm"
55 +  select CRYPTO_ALGAPI
56 +  help
57 +    RIPEMD-256 is an optional extension of RIPEMD-128 with a 256 bit hash.
58 +    It is intended for applications that require longer hash-results, without
59 +    needing a larger security level (than RIPEMD-128).
60 +
61 +    Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
62 +    See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
63 +
64 +config CRYPTO_RMD320
65 +  tristate "RIPEMD-320 digest algorithm"
66 +  select CRYPTO_ALGAPI
67 +  help
68 +    RIPEMD-320 is an optional extension of RIPEMD-160 with a 320 bit hash.
69 +    It is intended for applications that require longer hash-results, without
70 +    needing a larger security level (than RIPEMD-160).
71 +
72 +    Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
73 +    See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
74 +
75  config CRYPTO_SHA1
76         tristate "SHA1 digest algorithm"
77         select CRYPTO_ALGAPI
78 @@ -614,6 +666,15 @@
79         help
80           This is the LZO algorithm.
81  
82 +comment "Random Number Generation"
83 +
84 +config CRYPTO_PRNG
85 +       tristate "Pseudo Random Number Generation for Cryptographic modules"
86 +       help
87 +         This option enables the generic pseudo random number generator
88 +         for cryptographic modules.  Uses the Algorithm specified in
89 +         ANSI X9.31 A.2.4
90 +
91  source "drivers/crypto/Kconfig"
92  
93  endif  # if CRYPTO
94 --- a/crypto/Makefile
95 +++ b/crypto/Makefile
96 @@ -19,6 +19,7 @@
97  obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o
98  
99  crypto_hash-objs := hash.o
100 +crypto_hash-objs += ahash.o
101  obj-$(CONFIG_CRYPTO_HASH) += crypto_hash.o
102  
103  obj-$(CONFIG_CRYPTO_MANAGER) += cryptomgr.o
104 @@ -27,6 +28,10 @@
105  obj-$(CONFIG_CRYPTO_NULL) += crypto_null.o
106  obj-$(CONFIG_CRYPTO_MD4) += md4.o
107  obj-$(CONFIG_CRYPTO_MD5) += md5.o
108 +obj-$(CONFIG_CRYPTO_RMD128) += rmd128.o
109 +obj-$(CONFIG_CRYPTO_RMD160) += rmd160.o
110 +obj-$(CONFIG_CRYPTO_RMD256) += rmd256.o
111 +obj-$(CONFIG_CRYPTO_RMD320) += rmd320.o
112  obj-$(CONFIG_CRYPTO_SHA1) += sha1_generic.o
113  obj-$(CONFIG_CRYPTO_SHA256) += sha256_generic.o
114  obj-$(CONFIG_CRYPTO_SHA512) += sha512_generic.o
115 @@ -64,7 +69,7 @@
116  obj-$(CONFIG_CRYPTO_CRC32C) += crc32c.o
117  obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o
118  obj-$(CONFIG_CRYPTO_LZO) += lzo.o
119 -
120 +obj-$(CONFIG_CRYPTO_PRNG) += prng.o
121  obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o
122  
123  #
124 --- /dev/null
125 +++ b/crypto/ahash.c
126 @@ -0,0 +1,194 @@
127 +/*
128 + * Asynchronous Cryptographic Hash operations.
129 + *
130 + * This is the asynchronous version of hash.c with notification of
131 + * completion via a callback.
132 + *
133 + * Copyright (c) 2008 Loc Ho <lho@amcc.com>
134 + *
135 + * This program is free software; you can redistribute it and/or modify it
136 + * under the terms of the GNU General Public License as published by the Free
137 + * Software Foundation; either version 2 of the License, or (at your option)
138 + * any later version.
139 + *
140 + */
141 +
142 +#include <crypto/internal/hash.h>
143 +#include <crypto/scatterwalk.h>
144 +#include <linux/err.h>
145 +#include <linux/kernel.h>
146 +#include <linux/module.h>
147 +#include <linux/sched.h>
148 +#include <linux/slab.h>
149 +#include <linux/seq_file.h>
150 +
151 +#include "internal.h"
152 +
153 +static int hash_walk_next(struct crypto_hash_walk *walk)
154 +{
155 +       unsigned int alignmask = walk->alignmask;
156 +       unsigned int offset = walk->offset;
157 +       unsigned int nbytes = min(walk->entrylen,
158 +                                 ((unsigned int)(PAGE_SIZE)) - offset);
159 +
160 +       walk->data = crypto_kmap(walk->pg, 0);
161 +       walk->data += offset;
162 +
163 +       if (offset & alignmask)
164 +               nbytes = alignmask + 1 - (offset & alignmask);
165 +
166 +       walk->entrylen -= nbytes;
167 +       return nbytes;
168 +}
169 +
170 +static int hash_walk_new_entry(struct crypto_hash_walk *walk)
171 +{
172 +       struct scatterlist *sg;
173 +
174 +       sg = walk->sg;
175 +       walk->pg = sg_page(sg);
176 +       walk->offset = sg->offset;
177 +       walk->entrylen = sg->length;
178 +
179 +       if (walk->entrylen > walk->total)
180 +               walk->entrylen = walk->total;
181 +       walk->total -= walk->entrylen;
182 +
183 +       return hash_walk_next(walk);
184 +}
185 +
186 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err)
187 +{
188 +       unsigned int alignmask = walk->alignmask;
189 +       unsigned int nbytes = walk->entrylen;
190 +
191 +       walk->data -= walk->offset;
192 +
193 +       if (nbytes && walk->offset & alignmask && !err) {
194 +               walk->offset += alignmask - 1;
195 +               walk->offset = ALIGN(walk->offset, alignmask + 1);
196 +               walk->data += walk->offset;
197 +
198 +               nbytes = min(nbytes,
199 +                            ((unsigned int)(PAGE_SIZE)) - walk->offset);
200 +               walk->entrylen -= nbytes;
201 +
202 +               return nbytes;
203 +       }
204 +
205 +       crypto_kunmap(walk->data, 0);
206 +       crypto_yield(walk->flags);
207 +
208 +       if (err)
209 +               return err;
210 +
211 +       walk->offset = 0;
212 +
213 +       if (nbytes)
214 +               return hash_walk_next(walk);
215 +
216 +       if (!walk->total)
217 +               return 0;
218 +
219 +       walk->sg = scatterwalk_sg_next(walk->sg);
220 +
221 +       return hash_walk_new_entry(walk);
222 +}
223 +EXPORT_SYMBOL_GPL(crypto_hash_walk_done);
224 +
225 +int crypto_hash_walk_first(struct ahash_request *req,
226 +                          struct crypto_hash_walk *walk)
227 +{
228 +       walk->total = req->nbytes;
229 +
230 +       if (!walk->total)
231 +               return 0;
232 +
233 +       walk->alignmask = crypto_ahash_alignmask(crypto_ahash_reqtfm(req));
234 +       walk->sg = req->src;
235 +       walk->flags = req->base.flags;
236 +
237 +       return hash_walk_new_entry(walk);
238 +}
239 +EXPORT_SYMBOL_GPL(crypto_hash_walk_first);
240 +
241 +static int ahash_setkey_unaligned(struct crypto_ahash *tfm, const u8 *key,
242 +                               unsigned int keylen)
243 +{
244 +       struct ahash_alg *ahash = crypto_ahash_alg(tfm);
245 +       unsigned long alignmask = crypto_ahash_alignmask(tfm);
246 +       int ret;
247 +       u8 *buffer, *alignbuffer;
248 +       unsigned long absize;
249 +
250 +       absize = keylen + alignmask;
251 +       buffer = kmalloc(absize, GFP_ATOMIC);
252 +       if (!buffer)
253 +               return -ENOMEM;
254 +
255 +       alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);
256 +       memcpy(alignbuffer, key, keylen);
257 +       ret = ahash->setkey(tfm, alignbuffer, keylen);
258 +       memset(alignbuffer, 0, keylen);
259 +       kfree(buffer);
260 +       return ret;
261 +}
262 +
263 +static int ahash_setkey(struct crypto_ahash *tfm, const u8 *key,
264 +                       unsigned int keylen)
265 +{
266 +       struct ahash_alg *ahash = crypto_ahash_alg(tfm);
267 +       unsigned long alignmask = crypto_ahash_alignmask(tfm);
268 +
269 +       if ((unsigned long)key & alignmask)
270 +               return ahash_setkey_unaligned(tfm, key, keylen);
271 +
272 +       return ahash->setkey(tfm, key, keylen);
273 +}
274 +
275 +static unsigned int crypto_ahash_ctxsize(struct crypto_alg *alg, u32 type,
276 +                                       u32 mask)
277 +{
278 +       return alg->cra_ctxsize;
279 +}
280 +
281 +static int crypto_init_ahash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
282 +{
283 +       struct ahash_alg *alg = &tfm->__crt_alg->cra_ahash;
284 +       struct ahash_tfm *crt   = &tfm->crt_ahash;
285 +
286 +       if (alg->digestsize > PAGE_SIZE / 8)
287 +               return -EINVAL;
288 +
289 +       crt->init = alg->init;
290 +       crt->update = alg->update;
291 +       crt->final  = alg->final;
292 +       crt->digest = alg->digest;
293 +       crt->setkey = ahash_setkey;
294 +       crt->digestsize = alg->digestsize;
295 +
296 +       return 0;
297 +}
298 +
299 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
300 +       __attribute__ ((unused));
301 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
302 +{
303 +       seq_printf(m, "type         : ahash\n");
304 +       seq_printf(m, "async        : %s\n", alg->cra_flags & CRYPTO_ALG_ASYNC ?
305 +                                            "yes" : "no");
306 +       seq_printf(m, "blocksize    : %u\n", alg->cra_blocksize);
307 +       seq_printf(m, "digestsize   : %u\n", alg->cra_hash.digestsize);
308 +}
309 +
310 +const struct crypto_type crypto_ahash_type = {
311 +       .ctxsize = crypto_ahash_ctxsize,
312 +       .init = crypto_init_ahash_ops,
313 +#ifdef CONFIG_PROC_FS
314 +       .show = crypto_ahash_show,
315 +#endif
316 +};
317 +EXPORT_SYMBOL_GPL(crypto_ahash_type);
318 +
319 +MODULE_LICENSE("GPL");
320 +MODULE_DESCRIPTION("Asynchronous cryptographic hash type");
321 --- a/crypto/api.c
322 +++ b/crypto/api.c
323 @@ -235,8 +235,12 @@
324                 return crypto_init_cipher_ops(tfm);
325                 
326         case CRYPTO_ALG_TYPE_DIGEST:
327 -               return crypto_init_digest_ops(tfm);
328 -               
329 +               if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) !=
330 +                   CRYPTO_ALG_TYPE_HASH_MASK)
331 +                       return crypto_init_digest_ops_async(tfm);
332 +               else
333 +                       return crypto_init_digest_ops(tfm);
334 +
335         case CRYPTO_ALG_TYPE_COMPRESS:
336                 return crypto_init_compress_ops(tfm);
337         
338 --- a/crypto/camellia.c
339 +++ b/crypto/camellia.c
340 @@ -35,6 +35,8 @@
341  #include <linux/init.h>
342  #include <linux/kernel.h>
343  #include <linux/module.h>
344 +#include <linux/bitops.h>
345 +#include <asm/unaligned.h>
346  
347  static const u32 camellia_sp1110[256] = {
348         0x70707000,0x82828200,0x2c2c2c00,0xececec00,
349 @@ -335,20 +337,6 @@
350  /*
351   *  macros
352   */
353 -#define GETU32(v, pt) \
354 -    do { \
355 -       /* latest breed of gcc is clever enough to use move */ \
356 -       memcpy(&(v), (pt), 4); \
357 -       (v) = be32_to_cpu(v); \
358 -    } while(0)
359 -
360 -/* rotation right shift 1byte */
361 -#define ROR8(x) (((x) >> 8) + ((x) << 24))
362 -/* rotation left shift 1bit */
363 -#define ROL1(x) (((x) << 1) + ((x) >> 31))
364 -/* rotation left shift 1byte */
365 -#define ROL8(x) (((x) << 8) + ((x) >> 24))
366 -
367  #define ROLDQ(ll, lr, rl, rr, w0, w1, bits)            \
368      do {                                               \
369         w0 = ll;                                        \
370 @@ -383,7 +371,7 @@
371            ^ camellia_sp3033[(u8)(il >> 8)]                     \
372            ^ camellia_sp4404[(u8)(il     )];                    \
373         yl ^= yr;                                               \
374 -       yr = ROR8(yr);                                          \
375 +       yr = ror32(yr, 8);                                      \
376         yr ^= yl;                                               \
377      } while(0)
378  
379 @@ -405,7 +393,7 @@
380         subL[7] ^= subL[1]; subR[7] ^= subR[1];
381         subL[1] ^= subR[1] & ~subR[9];
382         dw = subL[1] & subL[9],
383 -               subR[1] ^= ROL1(dw); /* modified for FLinv(kl2) */
384 +               subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl2) */
385         /* round 8 */
386         subL[11] ^= subL[1]; subR[11] ^= subR[1];
387         /* round 10 */
388 @@ -414,7 +402,7 @@
389         subL[15] ^= subL[1]; subR[15] ^= subR[1];
390         subL[1] ^= subR[1] & ~subR[17];
391         dw = subL[1] & subL[17],
392 -               subR[1] ^= ROL1(dw); /* modified for FLinv(kl4) */
393 +               subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl4) */
394         /* round 14 */
395         subL[19] ^= subL[1]; subR[19] ^= subR[1];
396         /* round 16 */
397 @@ -430,7 +418,7 @@
398         } else {
399                 subL[1] ^= subR[1] & ~subR[25];
400                 dw = subL[1] & subL[25],
401 -                       subR[1] ^= ROL1(dw); /* modified for FLinv(kl6) */
402 +                       subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl6) */
403                 /* round 20 */
404                 subL[27] ^= subL[1]; subR[27] ^= subR[1];
405                 /* round 22 */
406 @@ -450,7 +438,7 @@
407                 subL[26] ^= kw4l; subR[26] ^= kw4r;
408                 kw4l ^= kw4r & ~subR[24];
409                 dw = kw4l & subL[24],
410 -                       kw4r ^= ROL1(dw); /* modified for FL(kl5) */
411 +                       kw4r ^= rol32(dw, 1); /* modified for FL(kl5) */
412         }
413         /* round 17 */
414         subL[22] ^= kw4l; subR[22] ^= kw4r;
415 @@ -460,7 +448,7 @@
416         subL[18] ^= kw4l; subR[18] ^= kw4r;
417         kw4l ^= kw4r & ~subR[16];
418         dw = kw4l & subL[16],
419 -               kw4r ^= ROL1(dw); /* modified for FL(kl3) */
420 +               kw4r ^= rol32(dw, 1); /* modified for FL(kl3) */
421         /* round 11 */
422         subL[14] ^= kw4l; subR[14] ^= kw4r;
423         /* round 9 */
424 @@ -469,7 +457,7 @@
425         subL[10] ^= kw4l; subR[10] ^= kw4r;
426         kw4l ^= kw4r & ~subR[8];
427         dw = kw4l & subL[8],
428 -               kw4r ^= ROL1(dw); /* modified for FL(kl1) */
429 +               kw4r ^= rol32(dw, 1); /* modified for FL(kl1) */
430         /* round 5 */
431         subL[6] ^= kw4l; subR[6] ^= kw4r;
432         /* round 3 */
433 @@ -494,7 +482,7 @@
434         SUBKEY_R(6) = subR[5] ^ subR[7];
435         tl = subL[10] ^ (subR[10] & ~subR[8]);
436         dw = tl & subL[8],  /* FL(kl1) */
437 -               tr = subR[10] ^ ROL1(dw);
438 +               tr = subR[10] ^ rol32(dw, 1);
439         SUBKEY_L(7) = subL[6] ^ tl; /* round 6 */
440         SUBKEY_R(7) = subR[6] ^ tr;
441         SUBKEY_L(8) = subL[8];       /* FL(kl1) */
442 @@ -503,7 +491,7 @@
443         SUBKEY_R(9) = subR[9];
444         tl = subL[7] ^ (subR[7] & ~subR[9]);
445         dw = tl & subL[9],  /* FLinv(kl2) */
446 -               tr = subR[7] ^ ROL1(dw);
447 +               tr = subR[7] ^ rol32(dw, 1);
448         SUBKEY_L(10) = tl ^ subL[11]; /* round 7 */
449         SUBKEY_R(10) = tr ^ subR[11];
450         SUBKEY_L(11) = subL[10] ^ subL[12]; /* round 8 */
451 @@ -516,7 +504,7 @@
452         SUBKEY_R(14) = subR[13] ^ subR[15];
453         tl = subL[18] ^ (subR[18] & ~subR[16]);
454         dw = tl & subL[16], /* FL(kl3) */
455 -               tr = subR[18] ^ ROL1(dw);
456 +               tr = subR[18] ^ rol32(dw, 1);
457         SUBKEY_L(15) = subL[14] ^ tl; /* round 12 */
458         SUBKEY_R(15) = subR[14] ^ tr;
459         SUBKEY_L(16) = subL[16];     /* FL(kl3) */
460 @@ -525,7 +513,7 @@
461         SUBKEY_R(17) = subR[17];
462         tl = subL[15] ^ (subR[15] & ~subR[17]);
463         dw = tl & subL[17], /* FLinv(kl4) */
464 -               tr = subR[15] ^ ROL1(dw);
465 +               tr = subR[15] ^ rol32(dw, 1);
466         SUBKEY_L(18) = tl ^ subL[19]; /* round 13 */
467         SUBKEY_R(18) = tr ^ subR[19];
468         SUBKEY_L(19) = subL[18] ^ subL[20]; /* round 14 */
469 @@ -544,7 +532,7 @@
470         } else {
471                 tl = subL[26] ^ (subR[26] & ~subR[24]);
472                 dw = tl & subL[24], /* FL(kl5) */
473 -                       tr = subR[26] ^ ROL1(dw);
474 +                       tr = subR[26] ^ rol32(dw, 1);
475                 SUBKEY_L(23) = subL[22] ^ tl; /* round 18 */
476                 SUBKEY_R(23) = subR[22] ^ tr;
477                 SUBKEY_L(24) = subL[24];     /* FL(kl5) */
478 @@ -553,7 +541,7 @@
479                 SUBKEY_R(25) = subR[25];
480                 tl = subL[23] ^ (subR[23] & ~subR[25]);
481                 dw = tl & subL[25], /* FLinv(kl6) */
482 -                       tr = subR[23] ^ ROL1(dw);
483 +                       tr = subR[23] ^ rol32(dw, 1);
484                 SUBKEY_L(26) = tl ^ subL[27]; /* round 19 */
485                 SUBKEY_R(26) = tr ^ subR[27];
486                 SUBKEY_L(27) = subL[26] ^ subL[28]; /* round 20 */
487 @@ -573,17 +561,17 @@
488         /* apply the inverse of the last half of P-function */
489         i = 2;
490         do {
491 -               dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = ROL8(dw);/* round 1 */
492 +               dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = rol32(dw, 8);/* round 1 */
493                 SUBKEY_R(i + 0) = SUBKEY_L(i + 0) ^ dw; SUBKEY_L(i + 0) = dw;
494 -               dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = ROL8(dw);/* round 2 */
495 +               dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = rol32(dw, 8);/* round 2 */
496                 SUBKEY_R(i + 1) = SUBKEY_L(i + 1) ^ dw; SUBKEY_L(i + 1) = dw;
497 -               dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = ROL8(dw);/* round 3 */
498 +               dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = rol32(dw, 8);/* round 3 */
499                 SUBKEY_R(i + 2) = SUBKEY_L(i + 2) ^ dw; SUBKEY_L(i + 2) = dw;
500 -               dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = ROL8(dw);/* round 4 */
501 +               dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = rol32(dw, 8);/* round 4 */
502                 SUBKEY_R(i + 3) = SUBKEY_L(i + 3) ^ dw; SUBKEY_L(i + 3) = dw;
503 -               dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = ROL8(dw);/* round 5 */
504 +               dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = rol32(dw, 9);/* round 5 */
505                 SUBKEY_R(i + 4) = SUBKEY_L(i + 4) ^ dw; SUBKEY_L(i + 4) = dw;
506 -               dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = ROL8(dw);/* round 6 */
507 +               dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = rol32(dw, 8);/* round 6 */
508                 SUBKEY_R(i + 5) = SUBKEY_L(i + 5) ^ dw; SUBKEY_L(i + 5) = dw;
509                 i += 8;
510         } while (i < max);
511 @@ -599,10 +587,10 @@
512         /**
513          *  k == kll || klr || krl || krr (|| is concatenation)
514          */
515 -       GETU32(kll, key     );
516 -       GETU32(klr, key +  4);
517 -       GETU32(krl, key +  8);
518 -       GETU32(krr, key + 12);
519 +       kll = get_unaligned_be32(key);
520 +       klr = get_unaligned_be32(key + 4);
521 +       krl = get_unaligned_be32(key + 8);
522 +       krr = get_unaligned_be32(key + 12);
523  
524         /* generate KL dependent subkeys */
525         /* kw1 */
526 @@ -707,14 +695,14 @@
527          *  key = (kll || klr || krl || krr || krll || krlr || krrl || krrr)
528          *  (|| is concatenation)
529          */
530 -       GETU32(kll,  key     );
531 -       GETU32(klr,  key +  4);
532 -       GETU32(krl,  key +  8);
533 -       GETU32(krr,  key + 12);
534 -       GETU32(krll, key + 16);
535 -       GETU32(krlr, key + 20);
536 -       GETU32(krrl, key + 24);
537 -       GETU32(krrr, key + 28);
538 +       kll = get_unaligned_be32(key);
539 +       klr = get_unaligned_be32(key + 4);
540 +       krl = get_unaligned_be32(key + 8);
541 +       krr = get_unaligned_be32(key + 12);
542 +       krll = get_unaligned_be32(key + 16);
543 +       krlr = get_unaligned_be32(key + 20);
544 +       krrl = get_unaligned_be32(key + 24);
545 +       krrr = get_unaligned_be32(key + 28);
546  
547         /* generate KL dependent subkeys */
548         /* kw1 */
549 @@ -870,13 +858,13 @@
550         t0 &= ll;                                                       \
551         t2 |= rr;                                                       \
552         rl ^= t2;                                                       \
553 -       lr ^= ROL1(t0);                                                 \
554 +       lr ^= rol32(t0, 1);                                             \
555         t3 = krl;                                                       \
556         t1 = klr;                                                       \
557         t3 &= rl;                                                       \
558         t1 |= lr;                                                       \
559         ll ^= t1;                                                       \
560 -       rr ^= ROL1(t3);                                                 \
561 +       rr ^= rol32(t3, 1);                                             \
562      } while(0)
563  
564  #define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir)               \
565 @@ -892,7 +880,7 @@
566         il ^= kl;                                                       \
567         ir ^= il ^ kr;                                                  \
568         yl ^= ir;                                                       \
569 -       yr ^= ROR8(il) ^ ir;                                            \
570 +       yr ^= ror32(il, 8) ^ ir;                                                \
571      } while(0)
572  
573  /* max = 24: 128bit encrypt, max = 32: 256bit encrypt */
574 --- a/crypto/crc32c.c
575 +++ b/crypto/crc32c.c
576 @@ -1,24 +1,27 @@
577 -/* 
578 +/*
579   * Cryptographic API.
580   *
581   * CRC32C chksum
582   *
583   * This module file is a wrapper to invoke the lib/crc32c routines.
584   *
585 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
586 + *
587   * This program is free software; you can redistribute it and/or modify it
588   * under the terms of the GNU General Public License as published by the Free
589 - * Software Foundation; either version 2 of the License, or (at your option) 
590 + * Software Foundation; either version 2 of the License, or (at your option)
591   * any later version.
592   *
593   */
594 +
595 +#include <crypto/internal/hash.h>
596  #include <linux/init.h>
597  #include <linux/module.h>
598  #include <linux/string.h>
599 -#include <linux/crypto.h>
600  #include <linux/crc32c.h>
601  #include <linux/kernel.h>
602  
603 -#define CHKSUM_BLOCK_SIZE      32
604 +#define CHKSUM_BLOCK_SIZE      1
605  #define CHKSUM_DIGEST_SIZE     4
606  
607  struct chksum_ctx {
608 @@ -27,7 +30,7 @@
609  };
610  
611  /*
612 - * Steps through buffer one byte at at time, calculates reflected 
613 + * Steps through buffer one byte at at time, calculates reflected
614   * crc using table.
615   */
616  
617 @@ -67,11 +70,11 @@
618  static void chksum_final(struct crypto_tfm *tfm, u8 *out)
619  {
620         struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
621 -       
622 +
623         *(__le32 *)out = ~cpu_to_le32(mctx->crc);
624  }
625  
626 -static int crc32c_cra_init(struct crypto_tfm *tfm)
627 +static int crc32c_cra_init_old(struct crypto_tfm *tfm)
628  {
629         struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
630  
631 @@ -79,14 +82,14 @@
632         return 0;
633  }
634  
635 -static struct crypto_alg alg = {
636 +static struct crypto_alg old_alg = {
637         .cra_name       =       "crc32c",
638         .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
639         .cra_blocksize  =       CHKSUM_BLOCK_SIZE,
640         .cra_ctxsize    =       sizeof(struct chksum_ctx),
641         .cra_module     =       THIS_MODULE,
642 -       .cra_list       =       LIST_HEAD_INIT(alg.cra_list),
643 -       .cra_init       =       crc32c_cra_init,
644 +       .cra_list       =       LIST_HEAD_INIT(old_alg.cra_list),
645 +       .cra_init       =       crc32c_cra_init_old,
646         .cra_u          =       {
647                 .digest = {
648                          .dia_digestsize=       CHKSUM_DIGEST_SIZE,
649 @@ -98,14 +101,125 @@
650         }
651  };
652  
653 +/*
654 + * Setting the seed allows arbitrary accumulators and flexible XOR policy
655 + * If your algorithm starts with ~0, then XOR with ~0 before you set
656 + * the seed.
657 + */
658 +static int crc32c_setkey(struct crypto_ahash *hash, const u8 *key,
659 +                        unsigned int keylen)
660 +{
661 +       u32 *mctx = crypto_ahash_ctx(hash);
662 +
663 +       if (keylen != sizeof(u32)) {
664 +               crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
665 +               return -EINVAL;
666 +       }
667 +       *mctx = le32_to_cpup((__le32 *)key);
668 +       return 0;
669 +}
670 +
671 +static int crc32c_init(struct ahash_request *req)
672 +{
673 +       u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
674 +       u32 *crcp = ahash_request_ctx(req);
675 +
676 +       *crcp = *mctx;
677 +       return 0;
678 +}
679 +
680 +static int crc32c_update(struct ahash_request *req)
681 +{
682 +       struct crypto_hash_walk walk;
683 +       u32 *crcp = ahash_request_ctx(req);
684 +       u32 crc = *crcp;
685 +       int nbytes;
686 +
687 +       for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
688 +            nbytes = crypto_hash_walk_done(&walk, 0))
689 +               crc = crc32c(crc, walk.data, nbytes);
690 +
691 +       *crcp = crc;
692 +       return 0;
693 +}
694 +
695 +static int crc32c_final(struct ahash_request *req)
696 +{
697 +       u32 *crcp = ahash_request_ctx(req);
698 +
699 +       *(__le32 *)req->result = ~cpu_to_le32p(crcp);
700 +       return 0;
701 +}
702 +
703 +static int crc32c_digest(struct ahash_request *req)
704 +{
705 +       struct crypto_hash_walk walk;
706 +       u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
707 +       u32 crc = *mctx;
708 +       int nbytes;
709 +
710 +       for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
711 +            nbytes = crypto_hash_walk_done(&walk, 0))
712 +               crc = crc32c(crc, walk.data, nbytes);
713 +
714 +       *(__le32 *)req->result = ~cpu_to_le32(crc);
715 +       return 0;
716 +}
717 +
718 +static int crc32c_cra_init(struct crypto_tfm *tfm)
719 +{
720 +       u32 *key = crypto_tfm_ctx(tfm);
721 +
722 +       *key = ~0;
723 +
724 +       tfm->crt_ahash.reqsize = sizeof(u32);
725 +
726 +       return 0;
727 +}
728 +
729 +static struct crypto_alg alg = {
730 +       .cra_name               =       "crc32c",
731 +       .cra_driver_name        =       "crc32c-generic",
732 +       .cra_priority           =       100,
733 +       .cra_flags              =       CRYPTO_ALG_TYPE_AHASH,
734 +       .cra_blocksize          =       CHKSUM_BLOCK_SIZE,
735 +       .cra_alignmask          =       3,
736 +       .cra_ctxsize            =       sizeof(u32),
737 +       .cra_module             =       THIS_MODULE,
738 +       .cra_list               =       LIST_HEAD_INIT(alg.cra_list),
739 +       .cra_init               =       crc32c_cra_init,
740 +       .cra_type               =       &crypto_ahash_type,
741 +       .cra_u                  =       {
742 +               .ahash = {
743 +                        .digestsize    =       CHKSUM_DIGEST_SIZE,
744 +                        .setkey        =       crc32c_setkey,
745 +                        .init          =       crc32c_init,
746 +                        .update        =       crc32c_update,
747 +                        .final         =       crc32c_final,
748 +                        .digest        =       crc32c_digest,
749 +                }
750 +       }
751 +};
752 +
753  static int __init crc32c_mod_init(void)
754  {
755 -       return crypto_register_alg(&alg);
756 +       int err;
757 +
758 +       err = crypto_register_alg(&old_alg);
759 +       if (err)
760 +               return err;
761 +
762 +       err = crypto_register_alg(&alg);
763 +       if (err)
764 +               crypto_unregister_alg(&old_alg);
765 +
766 +       return err;
767  }
768  
769  static void __exit crc32c_mod_fini(void)
770  {
771         crypto_unregister_alg(&alg);
772 +       crypto_unregister_alg(&old_alg);
773  }
774  
775  module_init(crc32c_mod_init);
776 --- a/crypto/cryptd.c
777 +++ b/crypto/cryptd.c
778 @@ -11,6 +11,7 @@
779   */
780  
781  #include <crypto/algapi.h>
782 +#include <crypto/internal/hash.h>
783  #include <linux/err.h>
784  #include <linux/init.h>
785  #include <linux/kernel.h>
786 @@ -45,6 +46,13 @@
787         crypto_completion_t complete;
788  };
789  
790 +struct cryptd_hash_ctx {
791 +       struct crypto_hash *child;
792 +};
793 +
794 +struct cryptd_hash_request_ctx {
795 +       crypto_completion_t complete;
796 +};
797  
798  static inline struct cryptd_state *cryptd_get_state(struct crypto_tfm *tfm)
799  {
800 @@ -82,10 +90,8 @@
801  
802         rctx = ablkcipher_request_ctx(req);
803  
804 -       if (unlikely(err == -EINPROGRESS)) {
805 -               rctx->complete(&req->base, err);
806 -               return;
807 -       }
808 +       if (unlikely(err == -EINPROGRESS))
809 +               goto out;
810  
811         desc.tfm = child;
812         desc.info = req->info;
813 @@ -95,8 +101,9 @@
814  
815         req->base.complete = rctx->complete;
816  
817 +out:
818         local_bh_disable();
819 -       req->base.complete(&req->base, err);
820 +       rctx->complete(&req->base, err);
821         local_bh_enable();
822  }
823  
824 @@ -261,6 +268,240 @@
825         return inst;
826  }
827  
828 +static int cryptd_hash_init_tfm(struct crypto_tfm *tfm)
829 +{
830 +       struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
831 +       struct cryptd_instance_ctx *ictx = crypto_instance_ctx(inst);
832 +       struct crypto_spawn *spawn = &ictx->spawn;
833 +       struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
834 +       struct crypto_hash *cipher;
835 +
836 +       cipher = crypto_spawn_hash(spawn);
837 +       if (IS_ERR(cipher))
838 +               return PTR_ERR(cipher);
839 +
840 +       ctx->child = cipher;
841 +       tfm->crt_ahash.reqsize =
842 +               sizeof(struct cryptd_hash_request_ctx);
843 +       return 0;
844 +}
845 +
846 +static void cryptd_hash_exit_tfm(struct crypto_tfm *tfm)
847 +{
848 +       struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
849 +       struct cryptd_state *state = cryptd_get_state(tfm);
850 +       int active;
851 +
852 +       mutex_lock(&state->mutex);
853 +       active = ahash_tfm_in_queue(&state->queue,
854 +                               __crypto_ahash_cast(tfm));
855 +       mutex_unlock(&state->mutex);
856 +
857 +       BUG_ON(active);
858 +
859 +       crypto_free_hash(ctx->child);
860 +}
861 +
862 +static int cryptd_hash_setkey(struct crypto_ahash *parent,
863 +                                  const u8 *key, unsigned int keylen)
864 +{
865 +       struct cryptd_hash_ctx *ctx   = crypto_ahash_ctx(parent);
866 +       struct crypto_hash     *child = ctx->child;
867 +       int err;
868 +
869 +       crypto_hash_clear_flags(child, CRYPTO_TFM_REQ_MASK);
870 +       crypto_hash_set_flags(child, crypto_ahash_get_flags(parent) &
871 +                                         CRYPTO_TFM_REQ_MASK);
872 +       err = crypto_hash_setkey(child, key, keylen);
873 +       crypto_ahash_set_flags(parent, crypto_hash_get_flags(child) &
874 +                                           CRYPTO_TFM_RES_MASK);
875 +       return err;
876 +}
877 +
878 +static int cryptd_hash_enqueue(struct ahash_request *req,
879 +                               crypto_completion_t complete)
880 +{
881 +       struct cryptd_hash_request_ctx *rctx = ahash_request_ctx(req);
882 +       struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
883 +       struct cryptd_state *state =
884 +               cryptd_get_state(crypto_ahash_tfm(tfm));
885 +       int err;
886 +
887 +       rctx->complete = req->base.complete;
888 +       req->base.complete = complete;
889 +
890 +       spin_lock_bh(&state->lock);
891 +       err = ahash_enqueue_request(&state->queue, req);
892 +       spin_unlock_bh(&state->lock);
893 +
894 +       wake_up_process(state->task);
895 +       return err;
896 +}
897 +
898 +static void cryptd_hash_init(struct crypto_async_request *req_async, int err)
899 +{
900 +       struct cryptd_hash_ctx *ctx   = crypto_tfm_ctx(req_async->tfm);
901 +       struct crypto_hash     *child = ctx->child;
902 +       struct ahash_request    *req = ahash_request_cast(req_async);
903 +       struct cryptd_hash_request_ctx *rctx;
904 +       struct hash_desc desc;
905 +
906 +       rctx = ahash_request_ctx(req);
907 +
908 +       if (unlikely(err == -EINPROGRESS))
909 +               goto out;
910 +
911 +       desc.tfm = child;
912 +       desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
913 +
914 +       err = crypto_hash_crt(child)->init(&desc);
915 +
916 +       req->base.complete = rctx->complete;
917 +
918 +out:
919 +       local_bh_disable();
920 +       rctx->complete(&req->base, err);
921 +       local_bh_enable();
922 +}
923 +
924 +static int cryptd_hash_init_enqueue(struct ahash_request *req)
925 +{
926 +       return cryptd_hash_enqueue(req, cryptd_hash_init);
927 +}
928 +
929 +static void cryptd_hash_update(struct crypto_async_request *req_async, int err)
930 +{
931 +       struct cryptd_hash_ctx *ctx   = crypto_tfm_ctx(req_async->tfm);
932 +       struct crypto_hash     *child = ctx->child;
933 +       struct ahash_request    *req = ahash_request_cast(req_async);
934 +       struct cryptd_hash_request_ctx *rctx;
935 +       struct hash_desc desc;
936 +
937 +       rctx = ahash_request_ctx(req);
938 +
939 +       if (unlikely(err == -EINPROGRESS))
940 +               goto out;
941 +
942 +       desc.tfm = child;
943 +       desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
944 +
945 +       err = crypto_hash_crt(child)->update(&desc,
946 +                                               req->src,
947 +                                               req->nbytes);
948 +
949 +       req->base.complete = rctx->complete;
950 +
951 +out:
952 +       local_bh_disable();
953 +       rctx->complete(&req->base, err);
954 +       local_bh_enable();
955 +}
956 +
957 +static int cryptd_hash_update_enqueue(struct ahash_request *req)
958 +{
959 +       return cryptd_hash_enqueue(req, cryptd_hash_update);
960 +}
961 +
962 +static void cryptd_hash_final(struct crypto_async_request *req_async, int err)
963 +{
964 +       struct cryptd_hash_ctx *ctx   = crypto_tfm_ctx(req_async->tfm);
965 +       struct crypto_hash     *child = ctx->child;
966 +       struct ahash_request    *req = ahash_request_cast(req_async);
967 +       struct cryptd_hash_request_ctx *rctx;
968 +       struct hash_desc desc;
969 +
970 +       rctx = ahash_request_ctx(req);
971 +
972 +       if (unlikely(err == -EINPROGRESS))
973 +               goto out;
974 +
975 +       desc.tfm = child;
976 +       desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
977 +
978 +       err = crypto_hash_crt(child)->final(&desc, req->result);
979 +
980 +       req->base.complete = rctx->complete;
981 +
982 +out:
983 +       local_bh_disable();
984 +       rctx->complete(&req->base, err);
985 +       local_bh_enable();
986 +}
987 +
988 +static int cryptd_hash_final_enqueue(struct ahash_request *req)
989 +{
990 +       return cryptd_hash_enqueue(req, cryptd_hash_final);
991 +}
992 +
993 +static void cryptd_hash_digest(struct crypto_async_request *req_async, int err)
994 +{
995 +       struct cryptd_hash_ctx *ctx   = crypto_tfm_ctx(req_async->tfm);
996 +       struct crypto_hash     *child = ctx->child;
997 +       struct ahash_request    *req = ahash_request_cast(req_async);
998 +       struct cryptd_hash_request_ctx *rctx;
999 +       struct hash_desc desc;
1000 +
1001 +       rctx = ahash_request_ctx(req);
1002 +
1003 +       if (unlikely(err == -EINPROGRESS))
1004 +               goto out;
1005 +
1006 +       desc.tfm = child;
1007 +       desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
1008 +
1009 +       err = crypto_hash_crt(child)->digest(&desc,
1010 +                                               req->src,
1011 +                                               req->nbytes,
1012 +                                               req->result);
1013 +
1014 +       req->base.complete = rctx->complete;
1015 +
1016 +out:
1017 +       local_bh_disable();
1018 +       rctx->complete(&req->base, err);
1019 +       local_bh_enable();
1020 +}
1021 +
1022 +static int cryptd_hash_digest_enqueue(struct ahash_request *req)
1023 +{
1024 +       return cryptd_hash_enqueue(req, cryptd_hash_digest);
1025 +}
1026 +
1027 +static struct crypto_instance *cryptd_alloc_hash(
1028 +       struct rtattr **tb, struct cryptd_state *state)
1029 +{
1030 +       struct crypto_instance *inst;
1031 +       struct crypto_alg *alg;
1032 +
1033 +       alg = crypto_get_attr_alg(tb, CRYPTO_ALG_TYPE_HASH,
1034 +                                 CRYPTO_ALG_TYPE_HASH_MASK);
1035 +       if (IS_ERR(alg))
1036 +               return ERR_PTR(PTR_ERR(alg));
1037 +
1038 +       inst = cryptd_alloc_instance(alg, state);
1039 +       if (IS_ERR(inst))
1040 +               goto out_put_alg;
1041 +
1042 +       inst->alg.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC;
1043 +       inst->alg.cra_type = &crypto_ahash_type;
1044 +
1045 +       inst->alg.cra_ahash.digestsize = alg->cra_hash.digestsize;
1046 +       inst->alg.cra_ctxsize = sizeof(struct cryptd_hash_ctx);
1047 +
1048 +       inst->alg.cra_init = cryptd_hash_init_tfm;
1049 +       inst->alg.cra_exit = cryptd_hash_exit_tfm;
1050 +
1051 +       inst->alg.cra_ahash.init   = cryptd_hash_init_enqueue;
1052 +       inst->alg.cra_ahash.update = cryptd_hash_update_enqueue;
1053 +       inst->alg.cra_ahash.final  = cryptd_hash_final_enqueue;
1054 +       inst->alg.cra_ahash.setkey = cryptd_hash_setkey;
1055 +       inst->alg.cra_ahash.digest = cryptd_hash_digest_enqueue;
1056 +
1057 +out_put_alg:
1058 +       crypto_mod_put(alg);
1059 +       return inst;
1060 +}
1061 +
1062  static struct cryptd_state state;
1063  
1064  static struct crypto_instance *cryptd_alloc(struct rtattr **tb)
1065 @@ -274,6 +515,8 @@
1066         switch (algt->type & algt->mask & CRYPTO_ALG_TYPE_MASK) {
1067         case CRYPTO_ALG_TYPE_BLKCIPHER:
1068                 return cryptd_alloc_blkcipher(tb, &state);
1069 +       case CRYPTO_ALG_TYPE_DIGEST:
1070 +               return cryptd_alloc_hash(tb, &state);
1071         }
1072  
1073         return ERR_PTR(-EINVAL);
1074 --- a/crypto/digest.c
1075 +++ b/crypto/digest.c
1076 @@ -12,6 +12,7 @@
1077   *
1078   */
1079  
1080 +#include <crypto/internal/hash.h>
1081  #include <crypto/scatterwalk.h>
1082  #include <linux/mm.h>
1083  #include <linux/errno.h>
1084 @@ -141,7 +142,7 @@
1085         struct hash_tfm *ops = &tfm->crt_hash;
1086         struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1087  
1088 -       if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1089 +       if (dalg->dia_digestsize > PAGE_SIZE / 8)
1090                 return -EINVAL;
1091         
1092         ops->init       = init;
1093 @@ -157,3 +158,83 @@
1094  void crypto_exit_digest_ops(struct crypto_tfm *tfm)
1095  {
1096  }
1097 +
1098 +static int digest_async_nosetkey(struct crypto_ahash *tfm_async, const u8 *key,
1099 +                       unsigned int keylen)
1100 +{
1101 +       crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1102 +       return -ENOSYS;
1103 +}
1104 +
1105 +static int digest_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1106 +                       unsigned int keylen)
1107 +{
1108 +       struct crypto_tfm    *tfm        = crypto_ahash_tfm(tfm_async);
1109 +       struct digest_alg    *dalg       = &tfm->__crt_alg->cra_digest;
1110 +
1111 +       crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1112 +       return dalg->dia_setkey(tfm, key, keylen);
1113 +}
1114 +
1115 +static int digest_async_init(struct ahash_request *req)
1116 +{
1117 +       struct crypto_tfm *tfm  = req->base.tfm;
1118 +       struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1119 +
1120 +       dalg->dia_init(tfm);
1121 +       return 0;
1122 +}
1123 +
1124 +static int digest_async_update(struct ahash_request *req)
1125 +{
1126 +       struct crypto_tfm *tfm = req->base.tfm;
1127 +       struct hash_desc  desc = {
1128 +               .tfm   = __crypto_hash_cast(tfm),
1129 +               .flags = req->base.flags,
1130 +       };
1131 +
1132 +       update(&desc, req->src, req->nbytes);
1133 +       return 0;
1134 +}
1135 +
1136 +static int digest_async_final(struct ahash_request *req)
1137 +{
1138 +       struct crypto_tfm *tfm  = req->base.tfm;
1139 +       struct hash_desc  desc = {
1140 +               .tfm   = __crypto_hash_cast(tfm),
1141 +               .flags = req->base.flags,
1142 +       };
1143 +
1144 +       final(&desc, req->result);
1145 +       return 0;
1146 +}
1147 +
1148 +static int digest_async_digest(struct ahash_request *req)
1149 +{
1150 +       struct crypto_tfm *tfm  = req->base.tfm;
1151 +       struct hash_desc  desc = {
1152 +               .tfm   = __crypto_hash_cast(tfm),
1153 +               .flags = req->base.flags,
1154 +       };
1155 +
1156 +       return digest(&desc, req->src, req->nbytes, req->result);
1157 +}
1158 +
1159 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm)
1160 +{
1161 +       struct ahash_tfm  *crt  = &tfm->crt_ahash;
1162 +       struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1163 +
1164 +       if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1165 +               return -EINVAL;
1166 +
1167 +       crt->init       = digest_async_init;
1168 +       crt->update     = digest_async_update;
1169 +       crt->final      = digest_async_final;
1170 +       crt->digest     = digest_async_digest;
1171 +       crt->setkey     = dalg->dia_setkey ? digest_async_setkey :
1172 +                                               digest_async_nosetkey;
1173 +       crt->digestsize = dalg->dia_digestsize;
1174 +
1175 +       return 0;
1176 +}
1177 --- a/crypto/hash.c
1178 +++ b/crypto/hash.c
1179 @@ -9,6 +9,7 @@
1180   * any later version.
1181   */
1182  
1183 +#include <crypto/internal/hash.h>
1184  #include <linux/errno.h>
1185  #include <linux/kernel.h>
1186  #include <linux/module.h>
1187 @@ -59,24 +60,107 @@
1188         return alg->setkey(crt, key, keylen);
1189  }
1190  
1191 -static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1192 +static int hash_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1193 +                       unsigned int keylen)
1194 +{
1195 +       struct crypto_tfm  *tfm      = crypto_ahash_tfm(tfm_async);
1196 +       struct crypto_hash *tfm_hash = __crypto_hash_cast(tfm);
1197 +       struct hash_alg    *alg      = &tfm->__crt_alg->cra_hash;
1198 +
1199 +       return alg->setkey(tfm_hash, key, keylen);
1200 +}
1201 +
1202 +static int hash_async_init(struct ahash_request *req)
1203 +{
1204 +       struct crypto_tfm *tfm = req->base.tfm;
1205 +       struct hash_alg   *alg = &tfm->__crt_alg->cra_hash;
1206 +       struct hash_desc  desc = {
1207 +               .tfm = __crypto_hash_cast(tfm),
1208 +               .flags = req->base.flags,
1209 +       };
1210 +
1211 +       return alg->init(&desc);
1212 +}
1213 +
1214 +static int hash_async_update(struct ahash_request *req)
1215 +{
1216 +       struct crypto_tfm *tfm = req->base.tfm;
1217 +       struct hash_alg   *alg = &tfm->__crt_alg->cra_hash;
1218 +       struct hash_desc  desc = {
1219 +               .tfm = __crypto_hash_cast(tfm),
1220 +               .flags = req->base.flags,
1221 +       };
1222 +
1223 +       return alg->update(&desc, req->src, req->nbytes);
1224 +}
1225 +
1226 +static int hash_async_final(struct ahash_request *req)
1227 +{
1228 +       struct crypto_tfm *tfm = req->base.tfm;
1229 +       struct hash_alg   *alg = &tfm->__crt_alg->cra_hash;
1230 +       struct hash_desc  desc = {
1231 +               .tfm = __crypto_hash_cast(tfm),
1232 +               .flags = req->base.flags,
1233 +       };
1234 +
1235 +       return alg->final(&desc, req->result);
1236 +}
1237 +
1238 +static int hash_async_digest(struct ahash_request *req)
1239 +{
1240 +       struct crypto_tfm *tfm = req->base.tfm;
1241 +       struct hash_alg   *alg = &tfm->__crt_alg->cra_hash;
1242 +       struct hash_desc  desc = {
1243 +               .tfm = __crypto_hash_cast(tfm),
1244 +               .flags = req->base.flags,
1245 +       };
1246 +
1247 +       return alg->digest(&desc, req->src, req->nbytes, req->result);
1248 +}
1249 +
1250 +static int crypto_init_hash_ops_async(struct crypto_tfm *tfm)
1251 +{
1252 +       struct ahash_tfm *crt = &tfm->crt_ahash;
1253 +       struct hash_alg  *alg = &tfm->__crt_alg->cra_hash;
1254 +
1255 +       crt->init       = hash_async_init;
1256 +       crt->update     = hash_async_update;
1257 +       crt->final      = hash_async_final;
1258 +       crt->digest     = hash_async_digest;
1259 +       crt->setkey     = hash_async_setkey;
1260 +       crt->digestsize = alg->digestsize;
1261 +
1262 +       return 0;
1263 +}
1264 +
1265 +static int crypto_init_hash_ops_sync(struct crypto_tfm *tfm)
1266  {
1267         struct hash_tfm *crt = &tfm->crt_hash;
1268         struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1269  
1270 -       if (alg->digestsize > crypto_tfm_alg_blocksize(tfm))
1271 -               return -EINVAL;
1272 -
1273 -       crt->init = alg->init;
1274 -       crt->update = alg->update;
1275 -       crt->final = alg->final;
1276 -       crt->digest = alg->digest;
1277 -       crt->setkey = hash_setkey;
1278 +       crt->init       = alg->init;
1279 +       crt->update     = alg->update;
1280 +       crt->final      = alg->final;
1281 +       crt->digest     = alg->digest;
1282 +       crt->setkey     = hash_setkey;
1283         crt->digestsize = alg->digestsize;
1284  
1285         return 0;
1286  }
1287  
1288 +static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1289 +{
1290 +       struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1291 +
1292 +       if (alg->digestsize > PAGE_SIZE / 8)
1293 +               return -EINVAL;
1294 +
1295 +       if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) != CRYPTO_ALG_TYPE_HASH_MASK)
1296 +               return crypto_init_hash_ops_async(tfm);
1297 +       else
1298 +               return crypto_init_hash_ops_sync(tfm);
1299 +}
1300 +
1301  static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1302         __attribute__ ((unused));
1303  static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1304 --- a/crypto/hmac.c
1305 +++ b/crypto/hmac.c
1306 @@ -226,6 +226,7 @@
1307         struct crypto_instance *inst;
1308         struct crypto_alg *alg;
1309         int err;
1310 +       int ds;
1311  
1312         err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_HASH);
1313         if (err)
1314 @@ -236,6 +237,13 @@
1315         if (IS_ERR(alg))
1316                 return ERR_CAST(alg);
1317  
1318 +       inst = ERR_PTR(-EINVAL);
1319 +       ds = (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1320 +            CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1321 +                                   alg->cra_digest.dia_digestsize;
1322 +       if (ds > alg->cra_blocksize)
1323 +               goto out_put_alg;
1324 +
1325         inst = crypto_alloc_instance("hmac", alg);
1326         if (IS_ERR(inst))
1327                 goto out_put_alg;
1328 @@ -246,14 +254,10 @@
1329         inst->alg.cra_alignmask = alg->cra_alignmask;
1330         inst->alg.cra_type = &crypto_hash_type;
1331  
1332 -       inst->alg.cra_hash.digestsize =
1333 -               (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1334 -               CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1335 -                                      alg->cra_digest.dia_digestsize;
1336 +       inst->alg.cra_hash.digestsize = ds;
1337  
1338         inst->alg.cra_ctxsize = sizeof(struct hmac_ctx) +
1339 -                               ALIGN(inst->alg.cra_blocksize * 2 +
1340 -                                     inst->alg.cra_hash.digestsize,
1341 +                               ALIGN(inst->alg.cra_blocksize * 2 + ds,
1342                                       sizeof(void *));
1343  
1344         inst->alg.cra_init = hmac_init_tfm;
1345 --- a/crypto/internal.h
1346 +++ b/crypto/internal.h
1347 @@ -86,6 +86,7 @@
1348  struct crypto_alg *crypto_alg_mod_lookup(const char *name, u32 type, u32 mask);
1349  
1350  int crypto_init_digest_ops(struct crypto_tfm *tfm);
1351 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm);
1352  int crypto_init_cipher_ops(struct crypto_tfm *tfm);
1353  int crypto_init_compress_ops(struct crypto_tfm *tfm);
1354  
1355 --- /dev/null
1356 +++ b/crypto/prng.c
1357 @@ -0,0 +1,410 @@
1358 +/*
1359 + * PRNG: Pseudo Random Number Generator
1360 + *       Based on NIST Recommended PRNG From ANSI X9.31 Appendix A.2.4 using
1361 + *       AES 128 cipher in RFC3686 ctr mode
1362 + *
1363 + *  (C) Neil Horman <nhorman@tuxdriver.com>
1364 + *
1365 + *  This program is free software; you can redistribute it and/or modify it
1366 + *  under the terms of the GNU General Public License as published by the
1367 + *  Free Software Foundation; either version 2 of the License, or (at your
1368 + *  any later version.
1369 + *
1370 + *
1371 + */
1372 +
1373 +#include <linux/err.h>
1374 +#include <linux/init.h>
1375 +#include <linux/module.h>
1376 +#include <linux/mm.h>
1377 +#include <linux/slab.h>
1378 +#include <linux/fs.h>
1379 +#include <linux/scatterlist.h>
1380 +#include <linux/string.h>
1381 +#include <linux/crypto.h>
1382 +#include <linux/highmem.h>
1383 +#include <linux/moduleparam.h>
1384 +#include <linux/jiffies.h>
1385 +#include <linux/timex.h>
1386 +#include <linux/interrupt.h>
1387 +#include <linux/miscdevice.h>
1388 +#include "prng.h"
1389 +
1390 +#define TEST_PRNG_ON_START 0
1391 +
1392 +#define DEFAULT_PRNG_KEY "0123456789abcdef1011"
1393 +#define DEFAULT_PRNG_KSZ 20
1394 +#define DEFAULT_PRNG_IV "defaultv"
1395 +#define DEFAULT_PRNG_IVSZ 8
1396 +#define DEFAULT_BLK_SZ 16
1397 +#define DEFAULT_V_SEED "zaybxcwdveuftgsh"
1398 +
1399 +/*
1400 + * Flags for the prng_context flags field
1401 + */
1402 +
1403 +#define PRNG_FIXED_SIZE 0x1
1404 +#define PRNG_NEED_RESET 0x2
1405 +
1406 +/*
1407 + * Note: DT is our counter value
1408 + *      I is our intermediate value
1409 + *      V is our seed vector
1410 + * See http://csrc.nist.gov/groups/STM/cavp/documents/rng/931rngext.pdf
1411 + * for implementation details
1412 + */
1413 +
1414 +
1415 +struct prng_context {
1416 +       char *prng_key;
1417 +       char *prng_iv;
1418 +       spinlock_t prng_lock;
1419 +       unsigned char rand_data[DEFAULT_BLK_SZ];
1420 +       unsigned char last_rand_data[DEFAULT_BLK_SZ];
1421 +       unsigned char DT[DEFAULT_BLK_SZ];
1422 +       unsigned char I[DEFAULT_BLK_SZ];
1423 +       unsigned char V[DEFAULT_BLK_SZ];
1424 +       u32 rand_data_valid;
1425 +       struct crypto_blkcipher *tfm;
1426 +       u32 flags;
1427 +};
1428 +
1429 +static int dbg;
1430 +
1431 +static void hexdump(char *note, unsigned char *buf, unsigned int len)
1432 +{
1433 +       if (dbg) {
1434 +               printk(KERN_CRIT "%s", note);
1435 +               print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
1436 +                               16, 1,
1437 +                               buf, len, false);
1438 +       }
1439 +}
1440 +
1441 +#define dbgprint(format, args...) do {if(dbg) printk(format, ##args);} while(0)
1442 +
1443 +static void xor_vectors(unsigned char *in1, unsigned char *in2,
1444 +                       unsigned char *out, unsigned int size)
1445 +{
1446 +       int i;
1447 +
1448 +       for (i=0;i<size;i++)
1449 +               out[i] = in1[i] ^ in2[i];
1450 +
1451 +}
1452 +/*
1453 + * Returns DEFAULT_BLK_SZ bytes of random data per call
1454 + * returns 0 if generation succeded, <0 if something went wrong
1455 + */
1456 +static int _get_more_prng_bytes(struct prng_context *ctx)
1457 +{
1458 +       int i;
1459 +       struct blkcipher_desc desc;
1460 +       struct scatterlist sg_in, sg_out;
1461 +       int ret;
1462 +       unsigned char tmp[DEFAULT_BLK_SZ];
1463 +
1464 +       desc.tfm = ctx->tfm;
1465 +       desc.flags = 0;
1466 +
1467 +
1468 +       dbgprint(KERN_CRIT "Calling _get_more_prng_bytes for context %p\n",ctx);
1469 +
1470 +       hexdump("Input DT: ", ctx->DT, DEFAULT_BLK_SZ);
1471 +       hexdump("Input I: ", ctx->I, DEFAULT_BLK_SZ);
1472 +       hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ);
1473 +
1474 +       /*
1475 +        * This algorithm is a 3 stage state machine
1476 +        */
1477 +       for (i=0;i<3;i++) {
1478 +
1479 +               desc.tfm = ctx->tfm;
1480 +               desc.flags = 0;
1481 +               switch (i) {
1482 +                       case 0:
1483 +                               /*
1484 +                                * Start by encrypting the counter value
1485 +                                * This gives us an intermediate value I
1486 +                                */
1487 +                               memcpy(tmp, ctx->DT, DEFAULT_BLK_SZ);
1488 +                               sg_init_one(&sg_out, &ctx->I[0], DEFAULT_BLK_SZ);
1489 +                               hexdump("tmp stage 0: ", tmp, DEFAULT_BLK_SZ);
1490 +                               break;
1491 +                       case 1:
1492 +
1493 +                               /*
1494 +                                * Next xor I with our secret vector V
1495 +                                * encrypt that result to obtain our
1496 +                                * pseudo random data which we output
1497 +                                */
1498 +                               xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ);
1499 +                               sg_init_one(&sg_out, &ctx->rand_data[0], DEFAULT_BLK_SZ);
1500 +                               hexdump("tmp stage 1: ", tmp, DEFAULT_BLK_SZ);
1501 +                               break;
1502 +                       case 2:
1503 +                               /*
1504 +                                * First check that we didn't produce the same random data
1505 +                                * that we did last time around through this
1506 +                                */
1507 +                               if (!memcmp(ctx->rand_data, ctx->last_rand_data, DEFAULT_BLK_SZ)) {
1508 +                                       printk(KERN_ERR "ctx %p Failed repetition check!\n",
1509 +                                               ctx);
1510 +                                       ctx->flags |= PRNG_NEED_RESET;
1511 +                                       return -1;
1512 +                               }
1513 +                               memcpy(ctx->last_rand_data, ctx->rand_data, DEFAULT_BLK_SZ);
1514 +
1515 +                               /*
1516 +                                * Lastly xor the random data with I
1517 +                                * and encrypt that to obtain a new secret vector V
1518 +                                */
1519 +                               xor_vectors(ctx->rand_data, ctx->I, tmp, DEFAULT_BLK_SZ);
1520 +                               sg_init_one(&sg_out, &ctx->V[0], DEFAULT_BLK_SZ);
1521 +                               hexdump("tmp stage 2: ", tmp, DEFAULT_BLK_SZ);
1522 +                               break;
1523 +               }
1524 +
1525 +               /* Initialize our input buffer */
1526 +               sg_init_one(&sg_in, &tmp[0], DEFAULT_BLK_SZ);
1527 +
1528 +               /* do the encryption */
1529 +               ret = crypto_blkcipher_encrypt(&desc, &sg_out, &sg_in, DEFAULT_BLK_SZ);
1530 +
1531 +               /* And check the result */
1532 +               if (ret) {
1533 +                       dbgprint(KERN_CRIT "Encryption of new block failed for context %p\n",ctx);
1534 +                       ctx->rand_data_valid = DEFAULT_BLK_SZ;
1535 +                       return -1;
1536 +               }
1537 +
1538 +       }
1539 +
1540 +       /*
1541 +        * Now update our DT value
1542 +        */
1543 +       for (i=DEFAULT_BLK_SZ-1;i>0;i--) {
1544 +               ctx->DT[i] = ctx->DT[i-1];
1545 +       }
1546 +       ctx->DT[0] += 1;
1547 +
1548 +       dbgprint("Returning new block for context %p\n",ctx);
1549 +       ctx->rand_data_valid = 0;
1550 +
1551 +       hexdump("Output DT: ", ctx->DT, DEFAULT_BLK_SZ);
1552 +       hexdump("Output I: ", ctx->I, DEFAULT_BLK_SZ);
1553 +       hexdump("Output V: ", ctx->V, DEFAULT_BLK_SZ);
1554 +       hexdump("New Random Data: ", ctx->rand_data, DEFAULT_BLK_SZ);
1555 +
1556 +       return 0;
1557 +}
1558 +
1559 +/* Our exported functions */
1560 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx)
1561 +{
1562 +       unsigned long flags;
1563 +       unsigned char *ptr = buf;
1564 +       unsigned int byte_count = (unsigned int)nbytes;
1565 +       int err;
1566 +
1567 +
1568 +       if (nbytes < 0)
1569 +               return -EINVAL;
1570 +
1571 +       spin_lock_irqsave(&ctx->prng_lock, flags);
1572 +
1573 +       err = -EFAULT;
1574 +       if (ctx->flags & PRNG_NEED_RESET)
1575 +               goto done;
1576 +
1577 +       /*
1578 +        * If the FIXED_SIZE flag is on, only return whole blocks of
1579 +        * pseudo random data
1580 +        */
1581 +       err = -EINVAL;
1582 +       if (ctx->flags & PRNG_FIXED_SIZE) {
1583 +               if (nbytes < DEFAULT_BLK_SZ)
1584 +                       goto done;
1585 +               byte_count = DEFAULT_BLK_SZ;
1586 +       }
1587 +
1588 +       err = byte_count;
1589 +
1590 +       dbgprint(KERN_CRIT "getting %d random bytes for context %p\n",byte_count, ctx);
1591 +
1592 +
1593 +remainder:
1594 +       if (ctx->rand_data_valid == DEFAULT_BLK_SZ) {
1595 +               if (_get_more_prng_bytes(ctx) < 0) {
1596 +                       memset(buf, 0, nbytes);
1597 +                       err = -EFAULT;
1598 +                       goto done;
1599 +               }
1600 +       }
1601 +
1602 +       /*
1603 +        * Copy up to the next whole block size
1604 +        */
1605 +       if (byte_count < DEFAULT_BLK_SZ) {
1606 +               for (;ctx->rand_data_valid < DEFAULT_BLK_SZ; ctx->rand_data_valid++) {
1607 +                       *ptr = ctx->rand_data[ctx->rand_data_valid];
1608 +                       ptr++;
1609 +                       byte_count--;
1610 +                       if (byte_count == 0)
1611 +                               goto done;
1612 +               }
1613 +       }
1614 +
1615 +       /*
1616 +        * Now copy whole blocks
1617 +        */
1618 +       for(;byte_count >= DEFAULT_BLK_SZ; byte_count -= DEFAULT_BLK_SZ) {
1619 +               if (_get_more_prng_bytes(ctx) < 0) {
1620 +                       memset(buf, 0, nbytes);
1621 +                       err = -1;
1622 +                       goto done;
1623 +               }
1624 +               memcpy(ptr, ctx->rand_data, DEFAULT_BLK_SZ);
1625 +               ctx->rand_data_valid += DEFAULT_BLK_SZ;
1626 +               ptr += DEFAULT_BLK_SZ;
1627 +       }
1628 +
1629 +       /*
1630 +        * Now copy any extra partial data
1631 +        */
1632 +       if (byte_count)
1633 +               goto remainder;
1634 +
1635 +done:
1636 +       spin_unlock_irqrestore(&ctx->prng_lock, flags);
1637 +       dbgprint(KERN_CRIT "returning %d from get_prng_bytes in context %p\n",err, ctx);
1638 +       return err;
1639 +}
1640 +EXPORT_SYMBOL_GPL(get_prng_bytes);
1641 +
1642 +struct prng_context *alloc_prng_context(void)
1643 +{
1644 +       struct prng_context *ctx=kzalloc(sizeof(struct prng_context), GFP_KERNEL);
1645 +
1646 +       spin_lock_init(&ctx->prng_lock);
1647 +
1648 +       if (reset_prng_context(ctx, NULL, NULL, NULL, NULL)) {
1649 +               kfree(ctx);
1650 +               ctx = NULL;
1651 +       }
1652 +
1653 +       dbgprint(KERN_CRIT "returning context %p\n",ctx);
1654 +       return ctx;
1655 +}
1656 +
1657 +EXPORT_SYMBOL_GPL(alloc_prng_context);
1658 +
1659 +void free_prng_context(struct prng_context *ctx)
1660 +{
1661 +       crypto_free_blkcipher(ctx->tfm);
1662 +       kfree(ctx);
1663 +}
1664 +EXPORT_SYMBOL_GPL(free_prng_context);
1665 +
1666 +int reset_prng_context(struct prng_context *ctx,
1667 +                      unsigned char *key, unsigned char *iv,
1668 +                      unsigned char *V, unsigned char *DT)
1669 +{
1670 +       int ret;
1671 +       int iv_len;
1672 +       int rc = -EFAULT;
1673 +
1674 +       spin_lock(&ctx->prng_lock);
1675 +       ctx->flags |= PRNG_NEED_RESET;
1676 +
1677 +       if (key)
1678 +               memcpy(ctx->prng_key,key,strlen(ctx->prng_key));
1679 +       else
1680 +               ctx->prng_key = DEFAULT_PRNG_KEY;
1681 +
1682 +       if (iv)
1683 +               memcpy(ctx->prng_iv,iv, strlen(ctx->prng_iv));
1684 +       else
1685 +               ctx->prng_iv = DEFAULT_PRNG_IV;
1686 +
1687 +       if (V)
1688 +               memcpy(ctx->V,V,DEFAULT_BLK_SZ);
1689 +       else
1690 +               memcpy(ctx->V,DEFAULT_V_SEED,DEFAULT_BLK_SZ);
1691 +
1692 +       if (DT)
1693 +               memcpy(ctx->DT, DT, DEFAULT_BLK_SZ);
1694 +       else
1695 +               memset(ctx->DT, 0, DEFAULT_BLK_SZ);
1696 +
1697 +       memset(ctx->rand_data,0,DEFAULT_BLK_SZ);
1698 +       memset(ctx->last_rand_data,0,DEFAULT_BLK_SZ);
1699 +
1700 +       if (ctx->tfm)
1701 +               crypto_free_blkcipher(ctx->tfm);
1702 +
1703 +       ctx->tfm = crypto_alloc_blkcipher("rfc3686(ctr(aes))",0,0);
1704 +       if (!ctx->tfm) {
1705 +               dbgprint(KERN_CRIT "Failed to alloc crypto tfm for context %p\n",ctx->tfm);
1706 +               goto out;
1707 +       }
1708 +
1709 +       ctx->rand_data_valid = DEFAULT_BLK_SZ;
1710 +
1711 +       ret = crypto_blkcipher_setkey(ctx->tfm, ctx->prng_key, strlen(ctx->prng_key));
1712 +       if (ret) {
1713 +               dbgprint(KERN_CRIT "PRNG: setkey() failed flags=%x\n",
1714 +                       crypto_blkcipher_get_flags(ctx->tfm));
1715 +               crypto_free_blkcipher(ctx->tfm);
1716 +               goto out;
1717 +       }
1718 +
1719 +       iv_len = crypto_blkcipher_ivsize(ctx->tfm);
1720 +       if (iv_len) {
1721 +               crypto_blkcipher_set_iv(ctx->tfm, ctx->prng_iv, iv_len);
1722 +       }
1723 +       rc = 0;
1724 +       ctx->flags &= ~PRNG_NEED_RESET;
1725 +out:
1726 +       spin_unlock(&ctx->prng_lock);
1727 +
1728 +       return rc;
1729 +
1730 +}
1731 +EXPORT_SYMBOL_GPL(reset_prng_context);
1732 +
1733 +/* Module initalization */
1734 +static int __init prng_mod_init(void)
1735 +{
1736 +
1737 +#ifdef TEST_PRNG_ON_START
1738 +       int i;
1739 +       unsigned char tmpbuf[DEFAULT_BLK_SZ];
1740 +
1741 +       struct prng_context *ctx = alloc_prng_context();
1742 +       if (ctx == NULL)
1743 +               return -EFAULT;
1744 +       for (i=0;i<16;i++) {
1745 +               if (get_prng_bytes(tmpbuf, DEFAULT_BLK_SZ, ctx) < 0) {
1746 +                       free_prng_context(ctx);
1747 +                       return -EFAULT;
1748 +               }
1749 +       }
1750 +       free_prng_context(ctx);
1751 +#endif
1752 +
1753 +       return 0;
1754 +}
1755 +
1756 +static void __exit prng_mod_fini(void)
1757 +{
1758 +       return;
1759 +}
1760 +
1761 +MODULE_LICENSE("GPL");
1762 +MODULE_DESCRIPTION("Software Pseudo Random Number Generator");
1763 +MODULE_AUTHOR("Neil Horman <nhorman@tuxdriver.com>");
1764 +module_param(dbg, int, 0);
1765 +MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");
1766 +module_init(prng_mod_init);
1767 +module_exit(prng_mod_fini);
1768 --- /dev/null
1769 +++ b/crypto/prng.h
1770 @@ -0,0 +1,27 @@
1771 +/*
1772 + * PRNG: Pseudo Random Number Generator
1773 + *
1774 + *  (C) Neil Horman <nhorman@tuxdriver.com>
1775 + *
1776 + *  This program is free software; you can redistribute it and/or modify it
1777 + *  under the terms of the GNU General Public License as published by the
1778 + *  Free Software Foundation; either version 2 of the License, or (at your
1779 + *  any later version.
1780 + *
1781 + *
1782 + */
1783 +
1784 +#ifndef _PRNG_H_
1785 +#define _PRNG_H_
1786 +struct prng_context;
1787 +
1788 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx);
1789 +struct prng_context *alloc_prng_context(void);
1790 +int reset_prng_context(struct prng_context *ctx,
1791 +                       unsigned char *key, unsigned char *iv,
1792 +                       unsigned char *V,
1793 +                       unsigned char *DT);
1794 +void free_prng_context(struct prng_context *ctx);
1795 +
1796 +#endif
1797 +
1798 --- /dev/null
1799 +++ b/crypto/ripemd.h
1800 @@ -0,0 +1,43 @@
1801 +/*
1802 + * Common values for RIPEMD algorithms
1803 + */
1804 +
1805 +#ifndef _CRYPTO_RMD_H
1806 +#define _CRYPTO_RMD_H
1807 +
1808 +#define RMD128_DIGEST_SIZE      16
1809 +#define RMD128_BLOCK_SIZE       64
1810 +
1811 +#define RMD160_DIGEST_SIZE      20
1812 +#define RMD160_BLOCK_SIZE       64
1813 +
1814 +#define RMD256_DIGEST_SIZE      32
1815 +#define RMD256_BLOCK_SIZE       64
1816 +
1817 +#define RMD320_DIGEST_SIZE      40
1818 +#define RMD320_BLOCK_SIZE       64
1819 +
1820 +/* initial values  */
1821 +#define RMD_H0  0x67452301UL
1822 +#define RMD_H1  0xefcdab89UL
1823 +#define RMD_H2  0x98badcfeUL
1824 +#define RMD_H3  0x10325476UL
1825 +#define RMD_H4  0xc3d2e1f0UL
1826 +#define RMD_H5  0x76543210UL
1827 +#define RMD_H6  0xfedcba98UL
1828 +#define RMD_H7  0x89abcdefUL
1829 +#define RMD_H8  0x01234567UL
1830 +#define RMD_H9  0x3c2d1e0fUL
1831 +
1832 +/* constants */
1833 +#define RMD_K1  0x00000000UL
1834 +#define RMD_K2  0x5a827999UL
1835 +#define RMD_K3  0x6ed9eba1UL
1836 +#define RMD_K4  0x8f1bbcdcUL
1837 +#define RMD_K5  0xa953fd4eUL
1838 +#define RMD_K6  0x50a28be6UL
1839 +#define RMD_K7  0x5c4dd124UL
1840 +#define RMD_K8  0x6d703ef3UL
1841 +#define RMD_K9  0x7a6d76e9UL
1842 +
1843 +#endif
1844 --- /dev/null
1845 +++ b/crypto/rmd128.c
1846 @@ -0,0 +1,325 @@
1847 +/*
1848 + * Cryptographic API.
1849 + *
1850 + * RIPEMD-128 - RACE Integrity Primitives Evaluation Message Digest.
1851 + *
1852 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
1853 + *
1854 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
1855 + *
1856 + * This program is free software; you can redistribute it and/or modify it
1857 + * under the terms of the GNU General Public License as published by the Free
1858 + * Software Foundation; either version 2 of the License, or (at your option)
1859 + * any later version.
1860 + *
1861 + */
1862 +#include <linux/init.h>
1863 +#include <linux/module.h>
1864 +#include <linux/mm.h>
1865 +#include <linux/crypto.h>
1866 +#include <linux/cryptohash.h>
1867 +#include <linux/types.h>
1868 +#include <asm/byteorder.h>
1869 +
1870 +#include "ripemd.h"
1871 +
1872 +struct rmd128_ctx {
1873 +       u64 byte_count;
1874 +       u32 state[4];
1875 +       __le32 buffer[16];
1876 +};
1877 +
1878 +#define K1  RMD_K1
1879 +#define K2  RMD_K2
1880 +#define K3  RMD_K3
1881 +#define K4  RMD_K4
1882 +#define KK1 RMD_K6
1883 +#define KK2 RMD_K7
1884 +#define KK3 RMD_K8
1885 +#define KK4 RMD_K1
1886 +
1887 +#define F1(x, y, z) (x ^ y ^ z)                /* XOR */
1888 +#define F2(x, y, z) (z ^ (x & (y ^ z)))        /* x ? y : z */
1889 +#define F3(x, y, z) ((x | ~y) ^ z)
1890 +#define F4(x, y, z) (y ^ (z & (x ^ y)))        /* z ? x : y */
1891 +
1892 +#define ROUND(a, b, c, d, f, k, x, s)  { \
1893 +       (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k);     \
1894 +       (a) = rol32((a), (s)); \
1895 +}
1896 +
1897 +static void rmd128_transform(u32 *state, const __le32 *in)
1898 +{
1899 +       u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd;
1900 +
1901 +       /* Initialize left lane */
1902 +       aa = state[0];
1903 +       bb = state[1];
1904 +       cc = state[2];
1905 +       dd = state[3];
1906 +
1907 +       /* Initialize right lane */
1908 +       aaa = state[0];
1909 +       bbb = state[1];
1910 +       ccc = state[2];
1911 +       ddd = state[3];
1912 +
1913 +       /* round 1: left lane */
1914 +       ROUND(aa, bb, cc, dd, F1, K1, in[0],  11);
1915 +       ROUND(dd, aa, bb, cc, F1, K1, in[1],  14);
1916 +       ROUND(cc, dd, aa, bb, F1, K1, in[2],  15);
1917 +       ROUND(bb, cc, dd, aa, F1, K1, in[3],  12);
1918 +       ROUND(aa, bb, cc, dd, F1, K1, in[4],   5);
1919 +       ROUND(dd, aa, bb, cc, F1, K1, in[5],   8);
1920 +       ROUND(cc, dd, aa, bb, F1, K1, in[6],   7);
1921 +       ROUND(bb, cc, dd, aa, F1, K1, in[7],   9);
1922 +       ROUND(aa, bb, cc, dd, F1, K1, in[8],  11);
1923 +       ROUND(dd, aa, bb, cc, F1, K1, in[9],  13);
1924 +       ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
1925 +       ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
1926 +       ROUND(aa, bb, cc, dd, F1, K1, in[12],  6);
1927 +       ROUND(dd, aa, bb, cc, F1, K1, in[13],  7);
1928 +       ROUND(cc, dd, aa, bb, F1, K1, in[14],  9);
1929 +       ROUND(bb, cc, dd, aa, F1, K1, in[15],  8);
1930 +
1931 +       /* round 2: left lane */
1932 +       ROUND(aa, bb, cc, dd, F2, K2, in[7],   7);
1933 +       ROUND(dd, aa, bb, cc, F2, K2, in[4],   6);
1934 +       ROUND(cc, dd, aa, bb, F2, K2, in[13],  8);
1935 +       ROUND(bb, cc, dd, aa, F2, K2, in[1],  13);
1936 +       ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
1937 +       ROUND(dd, aa, bb, cc, F2, K2, in[6],   9);
1938 +       ROUND(cc, dd, aa, bb, F2, K2, in[15],  7);
1939 +       ROUND(bb, cc, dd, aa, F2, K2, in[3],  15);
1940 +       ROUND(aa, bb, cc, dd, F2, K2, in[12],  7);
1941 +       ROUND(dd, aa, bb, cc, F2, K2, in[0],  12);
1942 +       ROUND(cc, dd, aa, bb, F2, K2, in[9],  15);
1943 +       ROUND(bb, cc, dd, aa, F2, K2, in[5],   9);
1944 +       ROUND(aa, bb, cc, dd, F2, K2, in[2],  11);
1945 +       ROUND(dd, aa, bb, cc, F2, K2, in[14],  7);
1946 +       ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
1947 +       ROUND(bb, cc, dd, aa, F2, K2, in[8],  12);
1948 +
1949 +       /* round 3: left lane */
1950 +       ROUND(aa, bb, cc, dd, F3, K3, in[3],  11);
1951 +       ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
1952 +       ROUND(cc, dd, aa, bb, F3, K3, in[14],  6);
1953 +       ROUND(bb, cc, dd, aa, F3, K3, in[4],   7);
1954 +       ROUND(aa, bb, cc, dd, F3, K3, in[9],  14);
1955 +       ROUND(dd, aa, bb, cc, F3, K3, in[15],  9);
1956 +       ROUND(cc, dd, aa, bb, F3, K3, in[8],  13);
1957 +       ROUND(bb, cc, dd, aa, F3, K3, in[1],  15);
1958 +       ROUND(aa, bb, cc, dd, F3, K3, in[2],  14);
1959 +       ROUND(dd, aa, bb, cc, F3, K3, in[7],   8);
1960 +       ROUND(cc, dd, aa, bb, F3, K3, in[0],  13);
1961 +       ROUND(bb, cc, dd, aa, F3, K3, in[6],   6);
1962 +       ROUND(aa, bb, cc, dd, F3, K3, in[13],  5);
1963 +       ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
1964 +       ROUND(cc, dd, aa, bb, F3, K3, in[5],   7);
1965 +       ROUND(bb, cc, dd, aa, F3, K3, in[12],  5);
1966 +
1967 +       /* round 4: left lane */
1968 +       ROUND(aa, bb, cc, dd, F4, K4, in[1],  11);
1969 +       ROUND(dd, aa, bb, cc, F4, K4, in[9],  12);
1970 +       ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
1971 +       ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
1972 +       ROUND(aa, bb, cc, dd, F4, K4, in[0],  14);
1973 +       ROUND(dd, aa, bb, cc, F4, K4, in[8],  15);
1974 +       ROUND(cc, dd, aa, bb, F4, K4, in[12],  9);
1975 +       ROUND(bb, cc, dd, aa, F4, K4, in[4],   8);
1976 +       ROUND(aa, bb, cc, dd, F4, K4, in[13],  9);
1977 +       ROUND(dd, aa, bb, cc, F4, K4, in[3],  14);
1978 +       ROUND(cc, dd, aa, bb, F4, K4, in[7],   5);
1979 +       ROUND(bb, cc, dd, aa, F4, K4, in[15],  6);
1980 +       ROUND(aa, bb, cc, dd, F4, K4, in[14],  8);
1981 +       ROUND(dd, aa, bb, cc, F4, K4, in[5],   6);
1982 +       ROUND(cc, dd, aa, bb, F4, K4, in[6],   5);
1983 +       ROUND(bb, cc, dd, aa, F4, K4, in[2],  12);
1984 +
1985 +       /* round 1: right lane */
1986 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5],   8);
1987 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14],  9);
1988 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7],   9);
1989 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0],  11);
1990 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9],  13);
1991 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2],  15);
1992 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
1993 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4],   5);
1994 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13],  7);
1995 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6],   7);
1996 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15],  8);
1997 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8],  11);
1998 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1],  14);
1999 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
2000 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3],  12);
2001 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12],  6);
2002 +
2003 +       /* round 2: right lane */
2004 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6],   9);
2005 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
2006 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3],  15);
2007 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7],   7);
2008 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0],  12);
2009 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13],  8);
2010 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5],   9);
2011 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
2012 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14],  7);
2013 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15],  7);
2014 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8],  12);
2015 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12],  7);
2016 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4],   6);
2017 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9],  15);
2018 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1],  13);
2019 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2],  11);
2020 +
2021 +       /* round 3: right lane */
2022 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15],  9);
2023 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5],   7);
2024 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1],  15);
2025 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3],  11);
2026 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7],   8);
2027 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14],  6);
2028 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6],   6);
2029 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9],  14);
2030 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2031 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8],  13);
2032 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12],  5);
2033 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2],  14);
2034 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2035 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0],  13);
2036 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4],   7);
2037 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13],  5);
2038 +
2039 +       /* round 4: right lane */
2040 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8],  15);
2041 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6],   5);
2042 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4],   8);
2043 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1],  11);
2044 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3],  14);
2045 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2046 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15],  6);
2047 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0],  14);
2048 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5],   6);
2049 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12],  9);
2050 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2],  12);
2051 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13],  9);
2052 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9],  12);
2053 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7],   5);
2054 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2055 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14],  8);
2056 +
2057 +       /* combine results */
2058 +       ddd += cc + state[1];           /* final result for state[0] */
2059 +       state[1] = state[2] + dd + aaa;
2060 +       state[2] = state[3] + aa + bbb;
2061 +       state[3] = state[0] + bb + ccc;
2062 +       state[0] = ddd;
2063 +
2064 +       return;
2065 +}
2066 +
2067 +static void rmd128_init(struct crypto_tfm *tfm)
2068 +{
2069 +       struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2070 +
2071 +       rctx->byte_count = 0;
2072 +
2073 +       rctx->state[0] = RMD_H0;
2074 +       rctx->state[1] = RMD_H1;
2075 +       rctx->state[2] = RMD_H2;
2076 +       rctx->state[3] = RMD_H3;
2077 +
2078 +       memset(rctx->buffer, 0, sizeof(rctx->buffer));
2079 +}
2080 +
2081 +static void rmd128_update(struct crypto_tfm *tfm, const u8 *data,
2082 +                         unsigned int len)
2083 +{
2084 +       struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2085 +       const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2086 +
2087 +       rctx->byte_count += len;
2088 +
2089 +       /* Enough space in buffer? If so copy and we're done */
2090 +       if (avail > len) {
2091 +               memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2092 +                      data, len);
2093 +               return;
2094 +       }
2095 +
2096 +       memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2097 +              data, avail);
2098 +
2099 +       rmd128_transform(rctx->state, rctx->buffer);
2100 +       data += avail;
2101 +       len -= avail;
2102 +
2103 +       while (len >= sizeof(rctx->buffer)) {
2104 +               memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2105 +               rmd128_transform(rctx->state, rctx->buffer);
2106 +               data += sizeof(rctx->buffer);
2107 +               len -= sizeof(rctx->buffer);
2108 +       }
2109 +
2110 +       memcpy(rctx->buffer, data, len);
2111 +}
2112 +
2113 +/* Add padding and return the message digest. */
2114 +static void rmd128_final(struct crypto_tfm *tfm, u8 *out)
2115 +{
2116 +       struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2117 +       u32 i, index, padlen;
2118 +       __le64 bits;
2119 +       __le32 *dst = (__le32 *)out;
2120 +       static const u8 padding[64] = { 0x80, };
2121 +
2122 +       bits = cpu_to_le64(rctx->byte_count << 3);
2123 +
2124 +       /* Pad out to 56 mod 64 */
2125 +       index = rctx->byte_count & 0x3f;
2126 +       padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2127 +       rmd128_update(tfm, padding, padlen);
2128 +
2129 +       /* Append length */
2130 +       rmd128_update(tfm, (const u8 *)&bits, sizeof(bits));
2131 +
2132 +       /* Store state in digest */
2133 +       for (i = 0; i < 4; i++)
2134 +               dst[i] = cpu_to_le32p(&rctx->state[i]);
2135 +
2136 +       /* Wipe context */
2137 +       memset(rctx, 0, sizeof(*rctx));
2138 +}
2139 +
2140 +static struct crypto_alg alg = {
2141 +       .cra_name        =      "rmd128",
2142 +       .cra_driver_name =      "rmd128",
2143 +       .cra_flags       =      CRYPTO_ALG_TYPE_DIGEST,
2144 +       .cra_blocksize   =      RMD128_BLOCK_SIZE,
2145 +       .cra_ctxsize     =      sizeof(struct rmd128_ctx),
2146 +       .cra_module      =      THIS_MODULE,
2147 +       .cra_list        =      LIST_HEAD_INIT(alg.cra_list),
2148 +       .cra_u           =      { .digest = {
2149 +       .dia_digestsize  =      RMD128_DIGEST_SIZE,
2150 +       .dia_init        =      rmd128_init,
2151 +       .dia_update      =      rmd128_update,
2152 +       .dia_final       =      rmd128_final } }
2153 +};
2154 +
2155 +static int __init rmd128_mod_init(void)
2156 +{
2157 +       return crypto_register_alg(&alg);
2158 +}
2159 +
2160 +static void __exit rmd128_mod_fini(void)
2161 +{
2162 +       crypto_unregister_alg(&alg);
2163 +}
2164 +
2165 +module_init(rmd128_mod_init);
2166 +module_exit(rmd128_mod_fini);
2167 +
2168 +MODULE_LICENSE("GPL");
2169 +MODULE_DESCRIPTION("RIPEMD-128 Message Digest");
2170 +
2171 +MODULE_ALIAS("rmd128");
2172 --- /dev/null
2173 +++ b/crypto/rmd160.c
2174 @@ -0,0 +1,369 @@
2175 +/*
2176 + * Cryptographic API.
2177 + *
2178 + * RIPEMD-160 - RACE Integrity Primitives Evaluation Message Digest.
2179 + *
2180 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2181 + *
2182 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2183 + *
2184 + * This program is free software; you can redistribute it and/or modify it
2185 + * under the terms of the GNU General Public License as published by the Free
2186 + * Software Foundation; either version 2 of the License, or (at your option)
2187 + * any later version.
2188 + *
2189 + */
2190 +#include <linux/init.h>
2191 +#include <linux/module.h>
2192 +#include <linux/mm.h>
2193 +#include <linux/crypto.h>
2194 +#include <linux/cryptohash.h>
2195 +#include <linux/types.h>
2196 +#include <asm/byteorder.h>
2197 +
2198 +#include "ripemd.h"
2199 +
2200 +struct rmd160_ctx {
2201 +       u64 byte_count;
2202 +       u32 state[5];
2203 +       __le32 buffer[16];
2204 +};
2205 +
2206 +#define K1  RMD_K1
2207 +#define K2  RMD_K2
2208 +#define K3  RMD_K3
2209 +#define K4  RMD_K4
2210 +#define K5  RMD_K5
2211 +#define KK1 RMD_K6
2212 +#define KK2 RMD_K7
2213 +#define KK3 RMD_K8
2214 +#define KK4 RMD_K9
2215 +#define KK5 RMD_K1
2216 +
2217 +#define F1(x, y, z) (x ^ y ^ z)                /* XOR */
2218 +#define F2(x, y, z) (z ^ (x & (y ^ z)))        /* x ? y : z */
2219 +#define F3(x, y, z) ((x | ~y) ^ z)
2220 +#define F4(x, y, z) (y ^ (z & (x ^ y)))        /* z ? x : y */
2221 +#define F5(x, y, z) (x ^ (y | ~z))
2222 +
2223 +#define ROUND(a, b, c, d, e, f, k, x, s)  { \
2224 +       (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2225 +       (a) = rol32((a), (s)) + (e); \
2226 +       (c) = rol32((c), 10); \
2227 +}
2228 +
2229 +static void rmd160_transform(u32 *state, const __le32 *in)
2230 +{
2231 +       u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee;
2232 +
2233 +       /* Initialize left lane */
2234 +       aa = state[0];
2235 +       bb = state[1];
2236 +       cc = state[2];
2237 +       dd = state[3];
2238 +       ee = state[4];
2239 +
2240 +       /* Initialize right lane */
2241 +       aaa = state[0];
2242 +       bbb = state[1];
2243 +       ccc = state[2];
2244 +       ddd = state[3];
2245 +       eee = state[4];
2246 +
2247 +       /* round 1: left lane */
2248 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[0],  11);
2249 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[1],  14);
2250 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[2],  15);
2251 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[3],  12);
2252 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[4],   5);
2253 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[5],   8);
2254 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[6],   7);
2255 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[7],   9);
2256 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[8],  11);
2257 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[9],  13);
2258 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2259 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2260 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[12],  6);
2261 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[13],  7);
2262 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[14],  9);
2263 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[15],  8);
2264 +
2265 +       /* round 2: left lane" */
2266 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[7],   7);
2267 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[4],   6);
2268 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[13],  8);
2269 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[1],  13);
2270 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
2271 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[6],   9);
2272 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[15],  7);
2273 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[3],  15);
2274 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[12],  7);
2275 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[0],  12);
2276 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[9],  15);
2277 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[5],   9);
2278 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[2],  11);
2279 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[14],  7);
2280 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
2281 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[8],  12);
2282 +
2283 +       /* round 3: left lane" */
2284 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[3],  11);
2285 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
2286 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[14],  6);
2287 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[4],   7);
2288 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[9],  14);
2289 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[15],  9);
2290 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[8],  13);
2291 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[1],  15);
2292 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[2],  14);
2293 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[7],   8);
2294 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[0],  13);
2295 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[6],   6);
2296 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[13],  5);
2297 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
2298 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[5],   7);
2299 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[12],  5);
2300 +
2301 +       /* round 4: left lane" */
2302 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[1],  11);
2303 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[9],  12);
2304 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
2305 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
2306 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[0],  14);
2307 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[8],  15);
2308 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[12],  9);
2309 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[4],   8);
2310 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[13],  9);
2311 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[3],  14);
2312 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[7],   5);
2313 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[15],  6);
2314 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[14],  8);
2315 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[5],   6);
2316 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[6],   5);
2317 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[2],  12);
2318 +
2319 +       /* round 5: left lane" */
2320 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[4],   9);
2321 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[0],  15);
2322 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[5],   5);
2323 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[9],  11);
2324 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[7],   6);
2325 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[12],  8);
2326 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[2],  13);
2327 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
2328 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[14],  5);
2329 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[1],  12);
2330 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[3],  13);
2331 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[8],  14);
2332 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
2333 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[6],   8);
2334 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[15],  5);
2335 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[13],  6);
2336 +
2337 +       /* round 1: right lane */
2338 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5],   8);
2339 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14],  9);
2340 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7],   9);
2341 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0],  11);
2342 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9],  13);
2343 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2],  15);
2344 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
2345 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4],   5);
2346 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13],  7);
2347 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6],   7);
2348 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15],  8);
2349 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8],  11);
2350 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1],  14);
2351 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
2352 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3],  12);
2353 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12],  6);
2354 +
2355 +       /* round 2: right lane */
2356 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6],   9);
2357 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
2358 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3],  15);
2359 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7],   7);
2360 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0],  12);
2361 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13],  8);
2362 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5],   9);
2363 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
2364 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14],  7);
2365 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15],  7);
2366 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8],  12);
2367 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12],  7);
2368 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4],   6);
2369 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9],  15);
2370 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1],  13);
2371 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2],  11);
2372 +
2373 +       /* round 3: right lane */
2374 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15],  9);
2375 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5],   7);
2376 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1],  15);
2377 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3],  11);
2378 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7],   8);
2379 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14],  6);
2380 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6],   6);
2381 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9],  14);
2382 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
2383 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8],  13);
2384 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12],  5);
2385 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2],  14);
2386 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
2387 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0],  13);
2388 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4],   7);
2389 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13],  5);
2390 +
2391 +       /* round 4: right lane */
2392 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8],  15);
2393 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6],   5);
2394 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4],   8);
2395 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1],  11);
2396 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3],  14);
2397 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
2398 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15],  6);
2399 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0],  14);
2400 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5],   6);
2401 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12],  9);
2402 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2],  12);
2403 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13],  9);
2404 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9],  12);
2405 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7],   5);
2406 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
2407 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14],  8);
2408 +
2409 +       /* round 5: right lane */
2410 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12],  8);
2411 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15],  5);
2412 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
2413 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4],   9);
2414 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1],  12);
2415 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5],   5);
2416 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8],  14);
2417 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7],   6);
2418 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6],   8);
2419 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2],  13);
2420 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13],  6);
2421 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14],  5);
2422 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0],  15);
2423 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3],  13);
2424 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9],  11);
2425 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
2426 +
2427 +       /* combine results */
2428 +       ddd += cc + state[1];           /* final result for state[0] */
2429 +       state[1] = state[2] + dd + eee;
2430 +       state[2] = state[3] + ee + aaa;
2431 +       state[3] = state[4] + aa + bbb;
2432 +       state[4] = state[0] + bb + ccc;
2433 +       state[0] = ddd;
2434 +
2435 +       return;
2436 +}
2437 +
2438 +static void rmd160_init(struct crypto_tfm *tfm)
2439 +{
2440 +       struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2441 +
2442 +       rctx->byte_count = 0;
2443 +
2444 +       rctx->state[0] = RMD_H0;
2445 +       rctx->state[1] = RMD_H1;
2446 +       rctx->state[2] = RMD_H2;
2447 +       rctx->state[3] = RMD_H3;
2448 +       rctx->state[4] = RMD_H4;
2449 +
2450 +       memset(rctx->buffer, 0, sizeof(rctx->buffer));
2451 +}
2452 +
2453 +static void rmd160_update(struct crypto_tfm *tfm, const u8 *data,
2454 +                         unsigned int len)
2455 +{
2456 +       struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2457 +       const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2458 +
2459 +       rctx->byte_count += len;
2460 +
2461 +       /* Enough space in buffer? If so copy and we're done */
2462 +       if (avail > len) {
2463 +               memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2464 +                      data, len);
2465 +               return;
2466 +       }
2467 +
2468 +       memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2469 +              data, avail);
2470 +
2471 +       rmd160_transform(rctx->state, rctx->buffer);
2472 +       data += avail;
2473 +       len -= avail;
2474 +
2475 +       while (len >= sizeof(rctx->buffer)) {
2476 +               memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2477 +               rmd160_transform(rctx->state, rctx->buffer);
2478 +               data += sizeof(rctx->buffer);
2479 +               len -= sizeof(rctx->buffer);
2480 +       }
2481 +
2482 +       memcpy(rctx->buffer, data, len);
2483 +}
2484 +
2485 +/* Add padding and return the message digest. */
2486 +static void rmd160_final(struct crypto_tfm *tfm, u8 *out)
2487 +{
2488 +       struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2489 +       u32 i, index, padlen;
2490 +       __le64 bits;
2491 +       __le32 *dst = (__le32 *)out;
2492 +       static const u8 padding[64] = { 0x80, };
2493 +
2494 +       bits = cpu_to_le64(rctx->byte_count << 3);
2495 +
2496 +       /* Pad out to 56 mod 64 */
2497 +       index = rctx->byte_count & 0x3f;
2498 +       padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2499 +       rmd160_update(tfm, padding, padlen);
2500 +
2501 +       /* Append length */
2502 +       rmd160_update(tfm, (const u8 *)&bits, sizeof(bits));
2503 +
2504 +       /* Store state in digest */
2505 +       for (i = 0; i < 5; i++)
2506 +               dst[i] = cpu_to_le32p(&rctx->state[i]);
2507 +
2508 +       /* Wipe context */
2509 +       memset(rctx, 0, sizeof(*rctx));
2510 +}
2511 +
2512 +static struct crypto_alg alg = {
2513 +       .cra_name        =      "rmd160",
2514 +       .cra_driver_name =      "rmd160",
2515 +       .cra_flags       =      CRYPTO_ALG_TYPE_DIGEST,
2516 +       .cra_blocksize   =      RMD160_BLOCK_SIZE,
2517 +       .cra_ctxsize     =      sizeof(struct rmd160_ctx),
2518 +       .cra_module      =      THIS_MODULE,
2519 +       .cra_list        =      LIST_HEAD_INIT(alg.cra_list),
2520 +       .cra_u           =      { .digest = {
2521 +       .dia_digestsize  =      RMD160_DIGEST_SIZE,
2522 +       .dia_init        =      rmd160_init,
2523 +       .dia_update      =      rmd160_update,
2524 +       .dia_final       =      rmd160_final } }
2525 +};
2526 +
2527 +static int __init rmd160_mod_init(void)
2528 +{
2529 +       return crypto_register_alg(&alg);
2530 +}
2531 +
2532 +static void __exit rmd160_mod_fini(void)
2533 +{
2534 +       crypto_unregister_alg(&alg);
2535 +}
2536 +
2537 +module_init(rmd160_mod_init);
2538 +module_exit(rmd160_mod_fini);
2539 +
2540 +MODULE_LICENSE("GPL");
2541 +MODULE_DESCRIPTION("RIPEMD-160 Message Digest");
2542 +
2543 +MODULE_ALIAS("rmd160");
2544 --- /dev/null
2545 +++ b/crypto/rmd256.c
2546 @@ -0,0 +1,344 @@
2547 +/*
2548 + * Cryptographic API.
2549 + *
2550 + * RIPEMD-256 - RACE Integrity Primitives Evaluation Message Digest.
2551 + *
2552 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2553 + *
2554 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2555 + *
2556 + * This program is free software; you can redistribute it and/or modify it
2557 + * under the terms of the GNU General Public License as published by the Free
2558 + * Software Foundation; either version 2 of the License, or (at your option)
2559 + * any later version.
2560 + *
2561 + */
2562 +#include <linux/init.h>
2563 +#include <linux/module.h>
2564 +#include <linux/mm.h>
2565 +#include <linux/crypto.h>
2566 +#include <linux/cryptohash.h>
2567 +#include <linux/types.h>
2568 +#include <asm/byteorder.h>
2569 +
2570 +#include "ripemd.h"
2571 +
2572 +struct rmd256_ctx {
2573 +       u64 byte_count;
2574 +       u32 state[8];
2575 +       __le32 buffer[16];
2576 +};
2577 +
2578 +#define K1  RMD_K1
2579 +#define K2  RMD_K2
2580 +#define K3  RMD_K3
2581 +#define K4  RMD_K4
2582 +#define KK1 RMD_K6
2583 +#define KK2 RMD_K7
2584 +#define KK3 RMD_K8
2585 +#define KK4 RMD_K1
2586 +
2587 +#define F1(x, y, z) (x ^ y ^ z)                /* XOR */
2588 +#define F2(x, y, z) (z ^ (x & (y ^ z)))        /* x ? y : z */
2589 +#define F3(x, y, z) ((x | ~y) ^ z)
2590 +#define F4(x, y, z) (y ^ (z & (x ^ y)))        /* z ? x : y */
2591 +
2592 +#define ROUND(a, b, c, d, f, k, x, s)  { \
2593 +       (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2594 +       (a) = rol32((a), (s)); \
2595 +}
2596 +
2597 +static void rmd256_transform(u32 *state, const __le32 *in)
2598 +{
2599 +       u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd, tmp;
2600 +
2601 +       /* Initialize left lane */
2602 +       aa = state[0];
2603 +       bb = state[1];
2604 +       cc = state[2];
2605 +       dd = state[3];
2606 +
2607 +       /* Initialize right lane */
2608 +       aaa = state[4];
2609 +       bbb = state[5];
2610 +       ccc = state[6];
2611 +       ddd = state[7];
2612 +
2613 +       /* round 1: left lane */
2614 +       ROUND(aa, bb, cc, dd, F1, K1, in[0],  11);
2615 +       ROUND(dd, aa, bb, cc, F1, K1, in[1],  14);
2616 +       ROUND(cc, dd, aa, bb, F1, K1, in[2],  15);
2617 +       ROUND(bb, cc, dd, aa, F1, K1, in[3],  12);
2618 +       ROUND(aa, bb, cc, dd, F1, K1, in[4],   5);
2619 +       ROUND(dd, aa, bb, cc, F1, K1, in[5],   8);
2620 +       ROUND(cc, dd, aa, bb, F1, K1, in[6],   7);
2621 +       ROUND(bb, cc, dd, aa, F1, K1, in[7],   9);
2622 +       ROUND(aa, bb, cc, dd, F1, K1, in[8],  11);
2623 +       ROUND(dd, aa, bb, cc, F1, K1, in[9],  13);
2624 +       ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
2625 +       ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
2626 +       ROUND(aa, bb, cc, dd, F1, K1, in[12],  6);
2627 +       ROUND(dd, aa, bb, cc, F1, K1, in[13],  7);
2628 +       ROUND(cc, dd, aa, bb, F1, K1, in[14],  9);
2629 +       ROUND(bb, cc, dd, aa, F1, K1, in[15],  8);
2630 +
2631 +       /* round 1: right lane */
2632 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5],   8);
2633 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14],  9);
2634 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7],   9);
2635 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0],  11);
2636 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9],  13);
2637 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2],  15);
2638 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
2639 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4],   5);
2640 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13],  7);
2641 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6],   7);
2642 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15],  8);
2643 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8],  11);
2644 +       ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1],  14);
2645 +       ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
2646 +       ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3],  12);
2647 +       ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12],  6);
2648 +
2649 +       /* Swap contents of "a" registers */
2650 +       tmp = aa; aa = aaa; aaa = tmp;
2651 +
2652 +       /* round 2: left lane */
2653 +       ROUND(aa, bb, cc, dd, F2, K2, in[7],   7);
2654 +       ROUND(dd, aa, bb, cc, F2, K2, in[4],   6);
2655 +       ROUND(cc, dd, aa, bb, F2, K2, in[13],  8);
2656 +       ROUND(bb, cc, dd, aa, F2, K2, in[1],  13);
2657 +       ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
2658 +       ROUND(dd, aa, bb, cc, F2, K2, in[6],   9);
2659 +       ROUND(cc, dd, aa, bb, F2, K2, in[15],  7);
2660 +       ROUND(bb, cc, dd, aa, F2, K2, in[3],  15);
2661 +       ROUND(aa, bb, cc, dd, F2, K2, in[12],  7);
2662 +       ROUND(dd, aa, bb, cc, F2, K2, in[0],  12);
2663 +       ROUND(cc, dd, aa, bb, F2, K2, in[9],  15);
2664 +       ROUND(bb, cc, dd, aa, F2, K2, in[5],   9);
2665 +       ROUND(aa, bb, cc, dd, F2, K2, in[2],  11);
2666 +       ROUND(dd, aa, bb, cc, F2, K2, in[14],  7);
2667 +       ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
2668 +       ROUND(bb, cc, dd, aa, F2, K2, in[8],  12);
2669 +
2670 +       /* round 2: right lane */
2671 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6],   9);
2672 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
2673 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3],  15);
2674 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7],   7);
2675 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0],  12);
2676 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13],  8);
2677 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5],   9);
2678 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
2679 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14],  7);
2680 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15],  7);
2681 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8],  12);
2682 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12],  7);
2683 +       ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4],   6);
2684 +       ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9],  15);
2685 +       ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1],  13);
2686 +       ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2],  11);
2687 +
2688 +       /* Swap contents of "b" registers */
2689 +       tmp = bb; bb = bbb; bbb = tmp;
2690 +
2691 +       /* round 3: left lane */
2692 +       ROUND(aa, bb, cc, dd, F3, K3, in[3],  11);
2693 +       ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
2694 +       ROUND(cc, dd, aa, bb, F3, K3, in[14],  6);
2695 +       ROUND(bb, cc, dd, aa, F3, K3, in[4],   7);
2696 +       ROUND(aa, bb, cc, dd, F3, K3, in[9],  14);
2697 +       ROUND(dd, aa, bb, cc, F3, K3, in[15],  9);
2698 +       ROUND(cc, dd, aa, bb, F3, K3, in[8],  13);
2699 +       ROUND(bb, cc, dd, aa, F3, K3, in[1],  15);
2700 +       ROUND(aa, bb, cc, dd, F3, K3, in[2],  14);
2701 +       ROUND(dd, aa, bb, cc, F3, K3, in[7],   8);
2702 +       ROUND(cc, dd, aa, bb, F3, K3, in[0],  13);
2703 +       ROUND(bb, cc, dd, aa, F3, K3, in[6],   6);
2704 +       ROUND(aa, bb, cc, dd, F3, K3, in[13],  5);
2705 +       ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
2706 +       ROUND(cc, dd, aa, bb, F3, K3, in[5],   7);
2707 +       ROUND(bb, cc, dd, aa, F3, K3, in[12],  5);
2708 +
2709 +       /* round 3: right lane */
2710 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15],  9);
2711 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5],   7);
2712 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1],  15);
2713 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3],  11);
2714 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7],   8);
2715 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14],  6);
2716 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6],   6);
2717 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9],  14);
2718 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2719 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8],  13);
2720 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12],  5);
2721 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2],  14);
2722 +       ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2723 +       ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0],  13);
2724 +       ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4],   7);
2725 +       ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13],  5);
2726 +
2727 +       /* Swap contents of "c" registers */
2728 +       tmp = cc; cc = ccc; ccc = tmp;
2729 +
2730 +       /* round 4: left lane */
2731 +       ROUND(aa, bb, cc, dd, F4, K4, in[1],  11);
2732 +       ROUND(dd, aa, bb, cc, F4, K4, in[9],  12);
2733 +       ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
2734 +       ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
2735 +       ROUND(aa, bb, cc, dd, F4, K4, in[0],  14);
2736 +       ROUND(dd, aa, bb, cc, F4, K4, in[8],  15);
2737 +       ROUND(cc, dd, aa, bb, F4, K4, in[12],  9);
2738 +       ROUND(bb, cc, dd, aa, F4, K4, in[4],   8);
2739 +       ROUND(aa, bb, cc, dd, F4, K4, in[13],  9);
2740 +       ROUND(dd, aa, bb, cc, F4, K4, in[3],  14);
2741 +       ROUND(cc, dd, aa, bb, F4, K4, in[7],   5);
2742 +       ROUND(bb, cc, dd, aa, F4, K4, in[15],  6);
2743 +       ROUND(aa, bb, cc, dd, F4, K4, in[14],  8);
2744 +       ROUND(dd, aa, bb, cc, F4, K4, in[5],   6);
2745 +       ROUND(cc, dd, aa, bb, F4, K4, in[6],   5);
2746 +       ROUND(bb, cc, dd, aa, F4, K4, in[2],  12);
2747 +
2748 +       /* round 4: right lane */
2749 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8],  15);
2750 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6],   5);
2751 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4],   8);
2752 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1],  11);
2753 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3],  14);
2754 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2755 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15],  6);
2756 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0],  14);
2757 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5],   6);
2758 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12],  9);
2759 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2],  12);
2760 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13],  9);
2761 +       ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9],  12);
2762 +       ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7],   5);
2763 +       ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2764 +       ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14],  8);
2765 +
2766 +       /* Swap contents of "d" registers */
2767 +       tmp = dd; dd = ddd; ddd = tmp;
2768 +
2769 +       /* combine results */
2770 +       state[0] += aa;
2771 +       state[1] += bb;
2772 +       state[2] += cc;
2773 +       state[3] += dd;
2774 +       state[4] += aaa;
2775 +       state[5] += bbb;
2776 +       state[6] += ccc;
2777 +       state[7] += ddd;
2778 +
2779 +       return;
2780 +}
2781 +
2782 +static void rmd256_init(struct crypto_tfm *tfm)
2783 +{
2784 +       struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2785 +
2786 +       rctx->byte_count = 0;
2787 +
2788 +       rctx->state[0] = RMD_H0;
2789 +       rctx->state[1] = RMD_H1;
2790 +       rctx->state[2] = RMD_H2;
2791 +       rctx->state[3] = RMD_H3;
2792 +       rctx->state[4] = RMD_H5;
2793 +       rctx->state[5] = RMD_H6;
2794 +       rctx->state[6] = RMD_H7;
2795 +       rctx->state[7] = RMD_H8;
2796 +
2797 +       memset(rctx->buffer, 0, sizeof(rctx->buffer));
2798 +}
2799 +
2800 +static void rmd256_update(struct crypto_tfm *tfm, const u8 *data,
2801 +                         unsigned int len)
2802 +{
2803 +       struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2804 +       const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2805 +
2806 +       rctx->byte_count += len;
2807 +
2808 +       /* Enough space in buffer? If so copy and we're done */
2809 +       if (avail > len) {
2810 +               memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2811 +                      data, len);
2812 +               return;
2813 +       }
2814 +
2815 +       memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2816 +              data, avail);
2817 +
2818 +       rmd256_transform(rctx->state, rctx->buffer);
2819 +       data += avail;
2820 +       len -= avail;
2821 +
2822 +       while (len >= sizeof(rctx->buffer)) {
2823 +               memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2824 +               rmd256_transform(rctx->state, rctx->buffer);
2825 +               data += sizeof(rctx->buffer);
2826 +               len -= sizeof(rctx->buffer);
2827 +       }
2828 +
2829 +       memcpy(rctx->buffer, data, len);
2830 +}
2831 +
2832 +/* Add padding and return the message digest. */
2833 +static void rmd256_final(struct crypto_tfm *tfm, u8 *out)
2834 +{
2835 +       struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2836 +       u32 i, index, padlen;
2837 +       __le64 bits;
2838 +       __le32 *dst = (__le32 *)out;
2839 +       static const u8 padding[64] = { 0x80, };
2840 +
2841 +       bits = cpu_to_le64(rctx->byte_count << 3);
2842 +
2843 +       /* Pad out to 56 mod 64 */
2844 +       index = rctx->byte_count & 0x3f;
2845 +       padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2846 +       rmd256_update(tfm, padding, padlen);
2847 +
2848 +       /* Append length */
2849 +       rmd256_update(tfm, (const u8 *)&bits, sizeof(bits));
2850 +
2851 +       /* Store state in digest */
2852 +       for (i = 0; i < 8; i++)
2853 +               dst[i] = cpu_to_le32p(&rctx->state[i]);
2854 +
2855 +       /* Wipe context */
2856 +       memset(rctx, 0, sizeof(*rctx));
2857 +}
2858 +
2859 +static struct crypto_alg alg = {
2860 +       .cra_name        =      "rmd256",
2861 +       .cra_driver_name =      "rmd256",
2862 +       .cra_flags       =      CRYPTO_ALG_TYPE_DIGEST,
2863 +       .cra_blocksize   =      RMD256_BLOCK_SIZE,
2864 +       .cra_ctxsize     =      sizeof(struct rmd256_ctx),
2865 +       .cra_module      =      THIS_MODULE,
2866 +       .cra_list        =      LIST_HEAD_INIT(alg.cra_list),
2867 +       .cra_u           =      { .digest = {
2868 +       .dia_digestsize  =      RMD256_DIGEST_SIZE,
2869 +       .dia_init        =      rmd256_init,
2870 +       .dia_update      =      rmd256_update,
2871 +       .dia_final       =      rmd256_final } }
2872 +};
2873 +
2874 +static int __init rmd256_mod_init(void)
2875 +{
2876 +       return crypto_register_alg(&alg);
2877 +}
2878 +
2879 +static void __exit rmd256_mod_fini(void)
2880 +{
2881 +       crypto_unregister_alg(&alg);
2882 +}
2883 +
2884 +module_init(rmd256_mod_init);
2885 +module_exit(rmd256_mod_fini);
2886 +
2887 +MODULE_LICENSE("GPL");
2888 +MODULE_DESCRIPTION("RIPEMD-256 Message Digest");
2889 +
2890 +MODULE_ALIAS("rmd256");
2891 --- /dev/null
2892 +++ b/crypto/rmd320.c
2893 @@ -0,0 +1,393 @@
2894 +/*
2895 + * Cryptographic API.
2896 + *
2897 + * RIPEMD-320 - RACE Integrity Primitives Evaluation Message Digest.
2898 + *
2899 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2900 + *
2901 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2902 + *
2903 + * This program is free software; you can redistribute it and/or modify it
2904 + * under the terms of the GNU General Public License as published by the Free
2905 + * Software Foundation; either version 2 of the License, or (at your option)
2906 + * any later version.
2907 + *
2908 + */
2909 +#include <linux/init.h>
2910 +#include <linux/module.h>
2911 +#include <linux/mm.h>
2912 +#include <linux/crypto.h>
2913 +#include <linux/cryptohash.h>
2914 +#include <linux/types.h>
2915 +#include <asm/byteorder.h>
2916 +
2917 +#include "ripemd.h"
2918 +
2919 +struct rmd320_ctx {
2920 +       u64 byte_count;
2921 +       u32 state[10];
2922 +       __le32 buffer[16];
2923 +};
2924 +
2925 +#define K1  RMD_K1
2926 +#define K2  RMD_K2
2927 +#define K3  RMD_K3
2928 +#define K4  RMD_K4
2929 +#define K5  RMD_K5
2930 +#define KK1 RMD_K6
2931 +#define KK2 RMD_K7
2932 +#define KK3 RMD_K8
2933 +#define KK4 RMD_K9
2934 +#define KK5 RMD_K1
2935 +
2936 +#define F1(x, y, z) (x ^ y ^ z)                /* XOR */
2937 +#define F2(x, y, z) (z ^ (x & (y ^ z)))        /* x ? y : z */
2938 +#define F3(x, y, z) ((x | ~y) ^ z)
2939 +#define F4(x, y, z) (y ^ (z & (x ^ y)))        /* z ? x : y */
2940 +#define F5(x, y, z) (x ^ (y | ~z))
2941 +
2942 +#define ROUND(a, b, c, d, e, f, k, x, s)  { \
2943 +       (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2944 +       (a) = rol32((a), (s)) + (e); \
2945 +       (c) = rol32((c), 10); \
2946 +}
2947 +
2948 +static void rmd320_transform(u32 *state, const __le32 *in)
2949 +{
2950 +       u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee, tmp;
2951 +
2952 +       /* Initialize left lane */
2953 +       aa = state[0];
2954 +       bb = state[1];
2955 +       cc = state[2];
2956 +       dd = state[3];
2957 +       ee = state[4];
2958 +
2959 +       /* Initialize right lane */
2960 +       aaa = state[5];
2961 +       bbb = state[6];
2962 +       ccc = state[7];
2963 +       ddd = state[8];
2964 +       eee = state[9];
2965 +
2966 +       /* round 1: left lane */
2967 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[0],  11);
2968 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[1],  14);
2969 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[2],  15);
2970 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[3],  12);
2971 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[4],   5);
2972 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[5],   8);
2973 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[6],   7);
2974 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[7],   9);
2975 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[8],  11);
2976 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[9],  13);
2977 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2978 +       ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2979 +       ROUND(dd, ee, aa, bb, cc, F1, K1, in[12],  6);
2980 +       ROUND(cc, dd, ee, aa, bb, F1, K1, in[13],  7);
2981 +       ROUND(bb, cc, dd, ee, aa, F1, K1, in[14],  9);
2982 +       ROUND(aa, bb, cc, dd, ee, F1, K1, in[15],  8);
2983 +
2984 +       /* round 1: right lane */
2985 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5],   8);
2986 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14],  9);
2987 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7],   9);
2988 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0],  11);
2989 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9],  13);
2990 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2],  15);
2991 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
2992 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4],   5);
2993 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13],  7);
2994 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6],   7);
2995 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15],  8);
2996 +       ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8],  11);
2997 +       ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1],  14);
2998 +       ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
2999 +       ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3],  12);
3000 +       ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12],  6);
3001 +
3002 +       /* Swap contents of "a" registers */
3003 +       tmp = aa; aa = aaa; aaa = tmp;
3004 +
3005 +       /* round 2: left lane" */
3006 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[7],   7);
3007 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[4],   6);
3008 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[13],  8);
3009 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[1],  13);
3010 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
3011 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[6],   9);
3012 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[15],  7);
3013 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[3],  15);
3014 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[12],  7);
3015 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[0],  12);
3016 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[9],  15);
3017 +       ROUND(dd, ee, aa, bb, cc, F2, K2, in[5],   9);
3018 +       ROUND(cc, dd, ee, aa, bb, F2, K2, in[2],  11);
3019 +       ROUND(bb, cc, dd, ee, aa, F2, K2, in[14],  7);
3020 +       ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
3021 +       ROUND(ee, aa, bb, cc, dd, F2, K2, in[8],  12);
3022 +
3023 +       /* round 2: right lane */
3024 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6],   9);
3025 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
3026 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3],  15);
3027 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7],   7);
3028 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0],  12);
3029 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13],  8);
3030 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5],   9);
3031 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
3032 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14],  7);
3033 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15],  7);
3034 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8],  12);
3035 +       ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12],  7);
3036 +       ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4],   6);
3037 +       ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9],  15);
3038 +       ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1],  13);
3039 +       ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2],  11);
3040 +
3041 +       /* Swap contents of "b" registers */
3042 +       tmp = bb; bb = bbb; bbb = tmp;
3043 +
3044 +       /* round 3: left lane" */
3045 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[3],  11);
3046 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
3047 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[14],  6);
3048 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[4],   7);
3049 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[9],  14);
3050 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[15],  9);
3051 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[8],  13);
3052 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[1],  15);
3053 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[2],  14);
3054 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[7],   8);
3055 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[0],  13);
3056 +       ROUND(cc, dd, ee, aa, bb, F3, K3, in[6],   6);
3057 +       ROUND(bb, cc, dd, ee, aa, F3, K3, in[13],  5);
3058 +       ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
3059 +       ROUND(ee, aa, bb, cc, dd, F3, K3, in[5],   7);
3060 +       ROUND(dd, ee, aa, bb, cc, F3, K3, in[12],  5);
3061 +
3062 +       /* round 3: right lane */
3063 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15],  9);
3064 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5],   7);
3065 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1],  15);
3066 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3],  11);
3067 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7],   8);
3068 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14],  6);
3069 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6],   6);
3070 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9],  14);
3071 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
3072 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8],  13);
3073 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12],  5);
3074 +       ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2],  14);
3075 +       ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
3076 +       ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0],  13);
3077 +       ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4],   7);
3078 +       ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13],  5);
3079 +
3080 +       /* Swap contents of "c" registers */
3081 +       tmp = cc; cc = ccc; ccc = tmp;
3082 +
3083 +       /* round 4: left lane" */
3084 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[1],  11);
3085 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[9],  12);
3086 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
3087 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
3088 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[0],  14);
3089 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[8],  15);
3090 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[12],  9);
3091 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[4],   8);
3092 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[13],  9);
3093 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[3],  14);
3094 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[7],   5);
3095 +       ROUND(bb, cc, dd, ee, aa, F4, K4, in[15],  6);
3096 +       ROUND(aa, bb, cc, dd, ee, F4, K4, in[14],  8);
3097 +       ROUND(ee, aa, bb, cc, dd, F4, K4, in[5],   6);
3098 +       ROUND(dd, ee, aa, bb, cc, F4, K4, in[6],   5);
3099 +       ROUND(cc, dd, ee, aa, bb, F4, K4, in[2],  12);
3100 +
3101 +       /* round 4: right lane */
3102 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8],  15);
3103 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6],   5);
3104 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4],   8);
3105 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1],  11);
3106 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3],  14);
3107 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
3108 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15],  6);
3109 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0],  14);
3110 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5],   6);
3111 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12],  9);
3112 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2],  12);
3113 +       ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13],  9);
3114 +       ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9],  12);
3115 +       ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7],   5);
3116 +       ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
3117 +       ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14],  8);
3118 +
3119 +       /* Swap contents of "d" registers */
3120 +       tmp = dd; dd = ddd; ddd = tmp;
3121 +
3122 +       /* round 5: left lane" */
3123 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[4],   9);
3124 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[0],  15);
3125 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[5],   5);
3126 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[9],  11);
3127 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[7],   6);
3128 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[12],  8);
3129 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[2],  13);
3130 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
3131 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[14],  5);
3132 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[1],  12);
3133 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[3],  13);
3134 +       ROUND(aa, bb, cc, dd, ee, F5, K5, in[8],  14);
3135 +       ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
3136 +       ROUND(dd, ee, aa, bb, cc, F5, K5, in[6],   8);
3137 +       ROUND(cc, dd, ee, aa, bb, F5, K5, in[15],  5);
3138 +       ROUND(bb, cc, dd, ee, aa, F5, K5, in[13],  6);
3139 +
3140 +       /* round 5: right lane */
3141 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12],  8);
3142 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15],  5);
3143 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
3144 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4],   9);
3145 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1],  12);
3146 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5],   5);
3147 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8],  14);
3148 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7],   6);
3149 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6],   8);
3150 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2],  13);
3151 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13],  6);
3152 +       ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14],  5);
3153 +       ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0],  15);
3154 +       ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3],  13);
3155 +       ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9],  11);
3156 +       ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
3157 +
3158 +       /* Swap contents of "e" registers */
3159 +       tmp = ee; ee = eee; eee = tmp;
3160 +
3161 +       /* combine results */
3162 +       state[0] += aa;
3163 +       state[1] += bb;
3164 +       state[2] += cc;
3165 +       state[3] += dd;
3166 +       state[4] += ee;
3167 +       state[5] += aaa;
3168 +       state[6] += bbb;
3169 +       state[7] += ccc;
3170 +       state[8] += ddd;
3171 +       state[9] += eee;
3172 +
3173 +       return;
3174 +}
3175 +
3176 +static void rmd320_init(struct crypto_tfm *tfm)
3177 +{
3178 +       struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3179 +
3180 +       rctx->byte_count = 0;
3181 +
3182 +       rctx->state[0] = RMD_H0;
3183 +       rctx->state[1] = RMD_H1;
3184 +       rctx->state[2] = RMD_H2;
3185 +       rctx->state[3] = RMD_H3;
3186 +       rctx->state[4] = RMD_H4;
3187 +       rctx->state[5] = RMD_H5;
3188 +       rctx->state[6] = RMD_H6;
3189 +       rctx->state[7] = RMD_H7;
3190 +       rctx->state[8] = RMD_H8;
3191 +       rctx->state[9] = RMD_H9;
3192 +
3193 +       memset(rctx->buffer, 0, sizeof(rctx->buffer));
3194 +}
3195 +
3196 +static void rmd320_update(struct crypto_tfm *tfm, const u8 *data,
3197 +                         unsigned int len)
3198 +{
3199 +       struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3200 +       const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
3201 +
3202 +       rctx->byte_count += len;
3203 +
3204 +       /* Enough space in buffer? If so copy and we're done */
3205 +       if (avail > len) {
3206 +               memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3207 +                      data, len);
3208 +               return;
3209 +       }
3210 +
3211 +       memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3212 +              data, avail);
3213 +
3214 +       rmd320_transform(rctx->state, rctx->buffer);
3215 +       data += avail;
3216 +       len -= avail;
3217 +
3218 +       while (len >= sizeof(rctx->buffer)) {
3219 +               memcpy(rctx->buffer, data, sizeof(rctx->buffer));
3220 +               rmd320_transform(rctx->state, rctx->buffer);
3221 +               data += sizeof(rctx->buffer);
3222 +               len -= sizeof(rctx->buffer);
3223 +       }
3224 +
3225 +       memcpy(rctx->buffer, data, len);
3226 +}
3227 +
3228 +/* Add padding and return the message digest. */
3229 +static void rmd320_final(struct crypto_tfm *tfm, u8 *out)
3230 +{
3231 +       struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3232 +       u32 i, index, padlen;
3233 +       __le64 bits;
3234 +       __le32 *dst = (__le32 *)out;
3235 +       static const u8 padding[64] = { 0x80, };
3236 +
3237 +       bits = cpu_to_le64(rctx->byte_count << 3);
3238 +
3239 +       /* Pad out to 56 mod 64 */
3240 +       index = rctx->byte_count & 0x3f;
3241 +       padlen = (index < 56) ? (56 - index) : ((64+56) - index);
3242 +       rmd320_update(tfm, padding, padlen);
3243 +
3244 +       /* Append length */
3245 +       rmd320_update(tfm, (const u8 *)&bits, sizeof(bits));
3246 +
3247 +       /* Store state in digest */
3248 +       for (i = 0; i < 10; i++)
3249 +               dst[i] = cpu_to_le32p(&rctx->state[i]);
3250 +
3251 +       /* Wipe context */
3252 +       memset(rctx, 0, sizeof(*rctx));
3253 +}
3254 +
3255 +static struct crypto_alg alg = {
3256 +       .cra_name        =      "rmd320",
3257 +       .cra_driver_name =      "rmd320",
3258 +       .cra_flags       =      CRYPTO_ALG_TYPE_DIGEST,
3259 +       .cra_blocksize   =      RMD320_BLOCK_SIZE,
3260 +       .cra_ctxsize     =      sizeof(struct rmd320_ctx),
3261 +       .cra_module      =      THIS_MODULE,
3262 +       .cra_list        =      LIST_HEAD_INIT(alg.cra_list),
3263 +       .cra_u           =      { .digest = {
3264 +       .dia_digestsize  =      RMD320_DIGEST_SIZE,
3265 +       .dia_init        =      rmd320_init,
3266 +       .dia_update      =      rmd320_update,
3267 +       .dia_final       =      rmd320_final } }
3268 +};
3269 +
3270 +static int __init rmd320_mod_init(void)
3271 +{
3272 +       return crypto_register_alg(&alg);
3273 +}
3274 +
3275 +static void __exit rmd320_mod_fini(void)
3276 +{
3277 +       crypto_unregister_alg(&alg);
3278 +}
3279 +
3280 +module_init(rmd320_mod_init);
3281 +module_exit(rmd320_mod_fini);
3282 +
3283 +MODULE_LICENSE("GPL");
3284 +MODULE_DESCRIPTION("RIPEMD-320 Message Digest");
3285 +
3286 +MODULE_ALIAS("rmd320");
3287 --- a/crypto/tcrypt.c
3288 +++ b/crypto/tcrypt.c
3289 @@ -13,15 +13,9 @@
3290   * Software Foundation; either version 2 of the License, or (at your option)
3291   * any later version.
3292   *
3293 - * 2007-11-13 Added GCM tests
3294 - * 2007-11-13 Added AEAD support
3295 - * 2007-11-06 Added SHA-224 and SHA-224-HMAC tests
3296 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3297 - * 2004-08-09 Added cipher speed tests (Reyk Floeter <reyk@vantronix.net>)
3298 - * 2003-09-14 Rewritten by Kartikey Mahendra Bhatt
3299 - *
3300   */
3301  
3302 +#include <crypto/hash.h>
3303  #include <linux/err.h>
3304  #include <linux/init.h>
3305  #include <linux/module.h>
3306 @@ -30,7 +24,6 @@
3307  #include <linux/scatterlist.h>
3308  #include <linux/string.h>
3309  #include <linux/crypto.h>
3310 -#include <linux/highmem.h>
3311  #include <linux/moduleparam.h>
3312  #include <linux/jiffies.h>
3313  #include <linux/timex.h>
3314 @@ -38,7 +31,7 @@
3315  #include "tcrypt.h"
3316  
3317  /*
3318 - * Need to kmalloc() memory for testing kmap().
3319 + * Need to kmalloc() memory for testing.
3320   */
3321  #define TVMEMSIZE      16384
3322  #define XBUFSIZE       32768
3323 @@ -46,7 +39,7 @@
3324  /*
3325   * Indexes into the xbuf to simulate cross-page access.
3326   */
3327 -#define IDX1           37
3328 +#define IDX1           32
3329  #define IDX2           32400
3330  #define IDX3           1
3331  #define IDX4           8193
3332 @@ -83,7 +76,8 @@
3333         "blowfish", "twofish", "serpent", "sha384", "sha512", "md4", "aes",
3334         "cast6", "arc4", "michael_mic", "deflate", "crc32c", "tea", "xtea",
3335         "khazad", "wp512", "wp384", "wp256", "tnepres", "xeta",  "fcrypt",
3336 -       "camellia", "seed", "salsa20", "lzo", "cts", NULL
3337 +       "camellia", "seed", "salsa20", "rmd128", "rmd160", "rmd256", "rmd320",
3338 +       "lzo", "cts", NULL
3339  };
3340  
3341  static void hexdump(unsigned char *buf, unsigned int len)
3342 @@ -110,22 +104,30 @@
3343         unsigned int i, j, k, temp;
3344         struct scatterlist sg[8];
3345         char result[64];
3346 -       struct crypto_hash *tfm;
3347 -       struct hash_desc desc;
3348 +       struct crypto_ahash *tfm;
3349 +       struct ahash_request *req;
3350 +       struct tcrypt_result tresult;
3351         int ret;
3352         void *hash_buff;
3353  
3354         printk("\ntesting %s\n", algo);
3355  
3356 -       tfm = crypto_alloc_hash(algo, 0, CRYPTO_ALG_ASYNC);
3357 +       init_completion(&tresult.completion);
3358 +
3359 +       tfm = crypto_alloc_ahash(algo, 0, 0);
3360         if (IS_ERR(tfm)) {
3361                 printk("failed to load transform for %s: %ld\n", algo,
3362                        PTR_ERR(tfm));
3363                 return;
3364         }
3365  
3366 -       desc.tfm = tfm;
3367 -       desc.flags = 0;
3368 +       req = ahash_request_alloc(tfm, GFP_KERNEL);
3369 +       if (!req) {
3370 +               printk(KERN_ERR "failed to allocate request for %s\n", algo);
3371 +               goto out_noreq;
3372 +       }
3373 +       ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
3374 +                                  tcrypt_complete, &tresult);
3375  
3376         for (i = 0; i < tcount; i++) {
3377                 printk("test %u:\n", i + 1);
3378 @@ -139,8 +141,9 @@
3379                 sg_init_one(&sg[0], hash_buff, template[i].psize);
3380  
3381                 if (template[i].ksize) {
3382 -                       ret = crypto_hash_setkey(tfm, template[i].key,
3383 -                                                template[i].ksize);
3384 +                       crypto_ahash_clear_flags(tfm, ~0);
3385 +                       ret = crypto_ahash_setkey(tfm, template[i].key,
3386 +                                                 template[i].ksize);
3387                         if (ret) {
3388                                 printk("setkey() failed ret=%d\n", ret);
3389                                 kfree(hash_buff);
3390 @@ -148,17 +151,30 @@
3391                         }
3392                 }
3393  
3394 -               ret = crypto_hash_digest(&desc, sg, template[i].psize, result);
3395 -               if (ret) {
3396 +               ahash_request_set_crypt(req, sg, result, template[i].psize);
3397 +               ret = crypto_ahash_digest(req);
3398 +               switch (ret) {
3399 +               case 0:
3400 +                       break;
3401 +               case -EINPROGRESS:
3402 +               case -EBUSY:
3403 +                       ret = wait_for_completion_interruptible(
3404 +                               &tresult.completion);
3405 +                       if (!ret && !(ret = tresult.err)) {
3406 +                               INIT_COMPLETION(tresult.completion);
3407 +                               break;
3408 +                       }
3409 +                       /* fall through */
3410 +               default:
3411                         printk("digest () failed ret=%d\n", ret);
3412                         kfree(hash_buff);
3413                         goto out;
3414                 }
3415  
3416 -               hexdump(result, crypto_hash_digestsize(tfm));
3417 +               hexdump(result, crypto_ahash_digestsize(tfm));
3418                 printk("%s\n",
3419                        memcmp(result, template[i].digest,
3420 -                             crypto_hash_digestsize(tfm)) ?
3421 +                             crypto_ahash_digestsize(tfm)) ?
3422                        "fail" : "pass");
3423                 kfree(hash_buff);
3424         }
3425 @@ -187,8 +203,9 @@
3426                         }
3427  
3428                         if (template[i].ksize) {
3429 -                               ret = crypto_hash_setkey(tfm, template[i].key,
3430 -                                                        template[i].ksize);
3431 +                               crypto_ahash_clear_flags(tfm, ~0);
3432 +                               ret = crypto_ahash_setkey(tfm, template[i].key,
3433 +                                                         template[i].ksize);
3434  
3435                                 if (ret) {
3436                                         printk("setkey() failed ret=%d\n", ret);
3437 @@ -196,29 +213,44 @@
3438                                 }
3439                         }
3440  
3441 -                       ret = crypto_hash_digest(&desc, sg, template[i].psize,
3442 -                                                result);
3443 -                       if (ret) {
3444 +                       ahash_request_set_crypt(req, sg, result,
3445 +                                               template[i].psize);
3446 +                       ret = crypto_ahash_digest(req);
3447 +                       switch (ret) {
3448 +                       case 0:
3449 +                               break;
3450 +                       case -EINPROGRESS:
3451 +                       case -EBUSY:
3452 +                               ret = wait_for_completion_interruptible(
3453 +                                       &tresult.completion);
3454 +                               if (!ret && !(ret = tresult.err)) {
3455 +                                       INIT_COMPLETION(tresult.completion);
3456 +                                       break;
3457 +                               }
3458 +                               /* fall through */
3459 +                       default:
3460                                 printk("digest () failed ret=%d\n", ret);
3461                                 goto out;
3462                         }
3463  
3464 -                       hexdump(result, crypto_hash_digestsize(tfm));
3465 +                       hexdump(result, crypto_ahash_digestsize(tfm));
3466                         printk("%s\n",
3467                                memcmp(result, template[i].digest,
3468 -                                     crypto_hash_digestsize(tfm)) ?
3469 +                                     crypto_ahash_digestsize(tfm)) ?
3470                                "fail" : "pass");
3471                 }
3472         }
3473  
3474  out:
3475 -       crypto_free_hash(tfm);
3476 +       ahash_request_free(req);
3477 +out_noreq:
3478 +       crypto_free_ahash(tfm);
3479  }
3480  
3481  static void test_aead(char *algo, int enc, struct aead_testvec *template,
3482                       unsigned int tcount)
3483  {
3484 -       unsigned int ret, i, j, k, temp;
3485 +       unsigned int ret, i, j, k, n, temp;
3486         char *q;
3487         struct crypto_aead *tfm;
3488         char *key;
3489 @@ -344,13 +376,12 @@
3490                                 goto next_one;
3491                         }
3492  
3493 -                       q = kmap(sg_page(&sg[0])) + sg[0].offset;
3494 +                       q = input;
3495                         hexdump(q, template[i].rlen);
3496  
3497                         printk(KERN_INFO "enc/dec: %s\n",
3498                                memcmp(q, template[i].result,
3499                                       template[i].rlen) ? "fail" : "pass");
3500 -                       kunmap(sg_page(&sg[0]));
3501  next_one:
3502                         if (!template[i].key)
3503                                 kfree(key);
3504 @@ -360,7 +391,6 @@
3505         }
3506  
3507         printk(KERN_INFO "\ntesting %s %s across pages (chunking)\n", algo, e);
3508 -       memset(xbuf, 0, XBUFSIZE);
3509         memset(axbuf, 0, XBUFSIZE);
3510  
3511         for (i = 0, j = 0; i < tcount; i++) {
3512 @@ -388,6 +418,7 @@
3513                                         goto out;
3514                         }
3515  
3516 +                       memset(xbuf, 0, XBUFSIZE);
3517                         sg_init_table(sg, template[i].np);
3518                         for (k = 0, temp = 0; k < template[i].np; k++) {
3519                                 memcpy(&xbuf[IDX[k]],
3520 @@ -450,7 +481,7 @@
3521  
3522                         for (k = 0, temp = 0; k < template[i].np; k++) {
3523                                 printk(KERN_INFO "page %u\n", k);
3524 -                               q = kmap(sg_page(&sg[k])) + sg[k].offset;
3525 +                               q = &axbuf[IDX[k]];
3526                                 hexdump(q, template[i].tap[k]);
3527                                 printk(KERN_INFO "%s\n",
3528                                        memcmp(q, template[i].result + temp,
3529 @@ -459,8 +490,15 @@
3530                                                0 : authsize)) ?
3531                                        "fail" : "pass");
3532  
3533 +                               for (n = 0; q[template[i].tap[k] + n]; n++)
3534 +                                       ;
3535 +                               if (n) {
3536 +                                       printk("Result buffer corruption %u "
3537 +                                              "bytes:\n", n);
3538 +                                       hexdump(&q[template[i].tap[k]], n);
3539 +                               }
3540 +
3541                                 temp += template[i].tap[k];
3542 -                               kunmap(sg_page(&sg[k]));
3543                         }
3544                 }
3545         }
3546 @@ -473,7 +511,7 @@
3547  static void test_cipher(char *algo, int enc,
3548                         struct cipher_testvec *template, unsigned int tcount)
3549  {
3550 -       unsigned int ret, i, j, k, temp;
3551 +       unsigned int ret, i, j, k, n, temp;
3552         char *q;
3553         struct crypto_ablkcipher *tfm;
3554         struct ablkcipher_request *req;
3555 @@ -569,19 +607,17 @@
3556                                 goto out;
3557                         }
3558  
3559 -                       q = kmap(sg_page(&sg[0])) + sg[0].offset;
3560 +                       q = data;
3561                         hexdump(q, template[i].rlen);
3562  
3563                         printk("%s\n",
3564                                memcmp(q, template[i].result,
3565                                       template[i].rlen) ? "fail" : "pass");
3566 -                       kunmap(sg_page(&sg[0]));
3567                 }
3568                 kfree(data);
3569         }
3570  
3571         printk("\ntesting %s %s across pages (chunking)\n", algo, e);
3572 -       memset(xbuf, 0, XBUFSIZE);
3573  
3574         j = 0;
3575         for (i = 0; i < tcount; i++) {
3576 @@ -596,6 +632,7 @@
3577                         printk("test %u (%d bit key):\n",
3578                         j, template[i].klen * 8);
3579  
3580 +                       memset(xbuf, 0, XBUFSIZE);
3581                         crypto_ablkcipher_clear_flags(tfm, ~0);
3582                         if (template[i].wk)
3583                                 crypto_ablkcipher_set_flags(
3584 @@ -649,14 +686,21 @@
3585                         temp = 0;
3586                         for (k = 0; k < template[i].np; k++) {
3587                                 printk("page %u\n", k);
3588 -                               q = kmap(sg_page(&sg[k])) + sg[k].offset;
3589 +                               q = &xbuf[IDX[k]];
3590                                 hexdump(q, template[i].tap[k]);
3591                                 printk("%s\n",
3592                                         memcmp(q, template[i].result + temp,
3593                                                 template[i].tap[k]) ? "fail" :
3594                                         "pass");
3595 +
3596 +                               for (n = 0; q[template[i].tap[k] + n]; n++)
3597 +                                       ;
3598 +                               if (n) {
3599 +                                       printk("Result buffer corruption %u "
3600 +                                              "bytes:\n", n);
3601 +                                       hexdump(&q[template[i].tap[k]], n);
3602 +                               }
3603                                 temp += template[i].tap[k];
3604 -                               kunmap(sg_page(&sg[k]));
3605                         }
3606                 }
3607         }
3608 @@ -1172,6 +1216,14 @@
3609                 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3610                             DES3_EDE_DEC_TEST_VECTORS);
3611  
3612 +               test_cipher("cbc(des3_ede)", ENCRYPT,
3613 +                           des3_ede_cbc_enc_tv_template,
3614 +                           DES3_EDE_CBC_ENC_TEST_VECTORS);
3615 +
3616 +               test_cipher("cbc(des3_ede)", DECRYPT,
3617 +                           des3_ede_cbc_dec_tv_template,
3618 +                           DES3_EDE_CBC_DEC_TEST_VECTORS);
3619 +
3620                 test_hash("md4", md4_tv_template, MD4_TEST_VECTORS);
3621  
3622                 test_hash("sha224", sha224_tv_template, SHA224_TEST_VECTORS);
3623 @@ -1382,6 +1434,14 @@
3624                             DES3_EDE_ENC_TEST_VECTORS);
3625                 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3626                             DES3_EDE_DEC_TEST_VECTORS);
3627 +
3628 +               test_cipher("cbc(des3_ede)", ENCRYPT,
3629 +                           des3_ede_cbc_enc_tv_template,
3630 +                           DES3_EDE_CBC_ENC_TEST_VECTORS);
3631 +
3632 +               test_cipher("cbc(des3_ede)", DECRYPT,
3633 +                           des3_ede_cbc_dec_tv_template,
3634 +                           DES3_EDE_CBC_DEC_TEST_VECTORS);
3635                 break;
3636  
3637         case 5:
3638 @@ -1550,7 +1610,7 @@
3639         case 29:
3640                 test_hash("tgr128", tgr128_tv_template, TGR128_TEST_VECTORS);
3641                 break;
3642 -               
3643 +
3644         case 30:
3645                 test_cipher("ecb(xeta)", ENCRYPT, xeta_enc_tv_template,
3646                             XETA_ENC_TEST_VECTORS);
3647 @@ -1615,6 +1675,22 @@
3648                             CTS_MODE_DEC_TEST_VECTORS);
3649                 break;
3650  
3651 +        case 39:
3652 +               test_hash("rmd128", rmd128_tv_template, RMD128_TEST_VECTORS);
3653 +               break;
3654 +
3655 +        case 40:
3656 +               test_hash("rmd160", rmd160_tv_template, RMD160_TEST_VECTORS);
3657 +               break;
3658 +
3659 +       case 41:
3660 +               test_hash("rmd256", rmd256_tv_template, RMD256_TEST_VECTORS);
3661 +               break;
3662 +
3663 +       case 42:
3664 +               test_hash("rmd320", rmd320_tv_template, RMD320_TEST_VECTORS);
3665 +               break;
3666 +
3667         case 100:
3668                 test_hash("hmac(md5)", hmac_md5_tv_template,
3669                           HMAC_MD5_TEST_VECTORS);
3670 @@ -1650,6 +1726,16 @@
3671                           XCBC_AES_TEST_VECTORS);
3672                 break;
3673  
3674 +       case 107:
3675 +               test_hash("hmac(rmd128)", hmac_rmd128_tv_template,
3676 +                         HMAC_RMD128_TEST_VECTORS);
3677 +               break;
3678 +
3679 +       case 108:
3680 +               test_hash("hmac(rmd160)", hmac_rmd160_tv_template,
3681 +                         HMAC_RMD160_TEST_VECTORS);
3682 +               break;
3683 +
3684         case 200:
3685                 test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0,
3686                                 speed_template_16_24_32);
3687 @@ -1788,6 +1874,22 @@
3688                 test_hash_speed("sha224", sec, generic_hash_speed_template);
3689                 if (mode > 300 && mode < 400) break;
3690  
3691 +       case 314:
3692 +               test_hash_speed("rmd128", sec, generic_hash_speed_template);
3693 +               if (mode > 300 && mode < 400) break;
3694 +
3695 +       case 315:
3696 +               test_hash_speed("rmd160", sec, generic_hash_speed_template);
3697 +               if (mode > 300 && mode < 400) break;
3698 +
3699 +       case 316:
3700 +               test_hash_speed("rmd256", sec, generic_hash_speed_template);
3701 +               if (mode > 300 && mode < 400) break;
3702 +
3703 +       case 317:
3704 +               test_hash_speed("rmd320", sec, generic_hash_speed_template);
3705 +               if (mode > 300 && mode < 400) break;
3706 +
3707         case 399:
3708                 break;
3709  
3710 --- a/crypto/tcrypt.h
3711 +++ b/crypto/tcrypt.h
3712 @@ -13,12 +13,6 @@
3713   * Software Foundation; either version 2 of the License, or (at your option)
3714   * any later version.
3715   *
3716 - * 2007-11-13 Added GCM tests
3717 - * 2007-11-13 Added AEAD support
3718 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3719 - * 2004-08-09 Cipher speed tests by Reyk Floeter <reyk@vantronix.net>
3720 - * 2003-09-14 Changes by Kartikey Mahendra Bhatt
3721 - *
3722   */
3723  #ifndef _CRYPTO_TCRYPT_H
3724  #define _CRYPTO_TCRYPT_H
3725 @@ -168,6 +162,271 @@
3726                 .digest = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55"
3727                           "\xac\x49\xda\x2e\x21\x07\xb6\x7a",
3728         }
3729 +
3730 +};
3731 +
3732 +/*
3733 + * RIPEMD-128 test vectors from ISO/IEC 10118-3:2004(E)
3734 + */
3735 +#define RMD128_TEST_VECTORS     10
3736 +
3737 +static struct hash_testvec rmd128_tv_template[] = {
3738 +       {
3739 +               .digest = "\xcd\xf2\x62\x13\xa1\x50\xdc\x3e"
3740 +                         "\xcb\x61\x0f\x18\xf6\xb3\x8b\x46",
3741 +       }, {
3742 +               .plaintext = "a",
3743 +               .psize  = 1,
3744 +               .digest = "\x86\xbe\x7a\xfa\x33\x9d\x0f\xc7"
3745 +                         "\xcf\xc7\x85\xe7\x2f\x57\x8d\x33",
3746 +       }, {
3747 +               .plaintext = "abc",
3748 +               .psize  = 3,
3749 +               .digest = "\xc1\x4a\x12\x19\x9c\x66\xe4\xba"
3750 +                         "\x84\x63\x6b\x0f\x69\x14\x4c\x77",
3751 +       }, {
3752 +               .plaintext = "message digest",
3753 +               .psize  = 14,
3754 +               .digest = "\x9e\x32\x7b\x3d\x6e\x52\x30\x62"
3755 +                         "\xaf\xc1\x13\x2d\x7d\xf9\xd1\xb8",
3756 +       }, {
3757 +               .plaintext = "abcdefghijklmnopqrstuvwxyz",
3758 +               .psize  = 26,
3759 +               .digest = "\xfd\x2a\xa6\x07\xf7\x1d\xc8\xf5"
3760 +                         "\x10\x71\x49\x22\xb3\x71\x83\x4e",
3761 +       }, {
3762 +               .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3763 +                            "fghijklmnopqrstuvwxyz0123456789",
3764 +               .psize  = 62,
3765 +               .digest = "\xd1\xe9\x59\xeb\x17\x9c\x91\x1f"
3766 +                         "\xae\xa4\x62\x4c\x60\xc5\xc7\x02",
3767 +       }, {
3768 +               .plaintext = "1234567890123456789012345678901234567890"
3769 +                            "1234567890123456789012345678901234567890",
3770 +               .psize  = 80,
3771 +               .digest = "\x3f\x45\xef\x19\x47\x32\xc2\xdb"
3772 +                         "\xb2\xc4\xa2\xc7\x69\x79\x5f\xa3",
3773 +        }, {
3774 +               .plaintext = "abcdbcdecdefdefgefghfghighij"
3775 +                            "hijkijkljklmklmnlmnomnopnopq",
3776 +               .psize  = 56,
3777 +               .digest = "\xa1\xaa\x06\x89\xd0\xfa\xfa\x2d"
3778 +                         "\xdc\x22\xe8\x8b\x49\x13\x3a\x06",
3779 +               .np     = 2,
3780 +               .tap    = { 28, 28 },
3781 +       }, {
3782 +               .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3783 +                            "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3784 +                            "lmnopqrsmnopqrstnopqrstu",
3785 +               .psize  = 112,
3786 +               .digest = "\xd4\xec\xc9\x13\xe1\xdf\x77\x6b"
3787 +                         "\xf4\x8d\xe9\xd5\x5b\x1f\x25\x46",
3788 +       }, {
3789 +               .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3790 +               .psize  = 32,
3791 +               .digest = "\x13\xfc\x13\xe8\xef\xff\x34\x7d"
3792 +                         "\xe1\x93\xff\x46\xdb\xac\xcf\xd4",
3793 +       }
3794 +};
3795 +
3796 +/*
3797 + * RIPEMD-160 test vectors from ISO/IEC 10118-3:2004(E)
3798 + */
3799 +#define RMD160_TEST_VECTORS     10
3800 +
3801 +static struct hash_testvec rmd160_tv_template[] = {
3802 +       {
3803 +               .digest = "\x9c\x11\x85\xa5\xc5\xe9\xfc\x54\x61\x28"
3804 +                         "\x08\x97\x7e\xe8\xf5\x48\xb2\x25\x8d\x31",
3805 +       }, {
3806 +               .plaintext = "a",
3807 +               .psize  = 1,
3808 +               .digest = "\x0b\xdc\x9d\x2d\x25\x6b\x3e\xe9\xda\xae"
3809 +                         "\x34\x7b\xe6\xf4\xdc\x83\x5a\x46\x7f\xfe",
3810 +       }, {
3811 +               .plaintext = "abc",
3812 +               .psize  = 3,
3813 +               .digest = "\x8e\xb2\x08\xf7\xe0\x5d\x98\x7a\x9b\x04"
3814 +                         "\x4a\x8e\x98\xc6\xb0\x87\xf1\x5a\x0b\xfc",
3815 +       }, {
3816 +               .plaintext = "message digest",
3817 +               .psize  = 14,
3818 +               .digest = "\x5d\x06\x89\xef\x49\xd2\xfa\xe5\x72\xb8"
3819 +                         "\x81\xb1\x23\xa8\x5f\xfa\x21\x59\x5f\x36",
3820 +       }, {
3821 +               .plaintext = "abcdefghijklmnopqrstuvwxyz",
3822 +               .psize  = 26,
3823 +               .digest = "\xf7\x1c\x27\x10\x9c\x69\x2c\x1b\x56\xbb"
3824 +                         "\xdc\xeb\x5b\x9d\x28\x65\xb3\x70\x8d\xbc",
3825 +       }, {
3826 +               .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3827 +                            "fghijklmnopqrstuvwxyz0123456789",
3828 +               .psize  = 62,
3829 +               .digest = "\xb0\xe2\x0b\x6e\x31\x16\x64\x02\x86\xed"
3830 +                         "\x3a\x87\xa5\x71\x30\x79\xb2\x1f\x51\x89",
3831 +       }, {
3832 +               .plaintext = "1234567890123456789012345678901234567890"
3833 +                            "1234567890123456789012345678901234567890",
3834 +               .psize  = 80,
3835 +               .digest = "\x9b\x75\x2e\x45\x57\x3d\x4b\x39\xf4\xdb"
3836 +                         "\xd3\x32\x3c\xab\x82\xbf\x63\x32\x6b\xfb",
3837 +        }, {
3838 +               .plaintext = "abcdbcdecdefdefgefghfghighij"
3839 +                            "hijkijkljklmklmnlmnomnopnopq",
3840 +               .psize  = 56,
3841 +               .digest = "\x12\xa0\x53\x38\x4a\x9c\x0c\x88\xe4\x05"
3842 +                         "\xa0\x6c\x27\xdc\xf4\x9a\xda\x62\xeb\x2b",
3843 +               .np     = 2,
3844 +               .tap    = { 28, 28 },
3845 +       }, {
3846 +               .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3847 +                            "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3848 +                            "lmnopqrsmnopqrstnopqrstu",
3849 +               .psize  = 112,
3850 +               .digest = "\x6f\x3f\xa3\x9b\x6b\x50\x3c\x38\x4f\x91"
3851 +                         "\x9a\x49\xa7\xaa\x5c\x2c\x08\xbd\xfb\x45",
3852 +       }, {
3853 +               .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3854 +               .psize  = 32,
3855 +               .digest = "\x94\xc2\x64\x11\x54\x04\xe6\x33\x79\x0d"
3856 +                         "\xfc\xc8\x7b\x58\x7d\x36\x77\x06\x7d\x9f",
3857 +       }
3858 +};
3859 +
3860 +/*
3861 + * RIPEMD-256 test vectors
3862 + */
3863 +#define RMD256_TEST_VECTORS     8
3864 +
3865 +static struct hash_testvec rmd256_tv_template[] = {
3866 +       {
3867 +               .digest = "\x02\xba\x4c\x4e\x5f\x8e\xcd\x18"
3868 +                         "\x77\xfc\x52\xd6\x4d\x30\xe3\x7a"
3869 +                         "\x2d\x97\x74\xfb\x1e\x5d\x02\x63"
3870 +                         "\x80\xae\x01\x68\xe3\xc5\x52\x2d",
3871 +       }, {
3872 +               .plaintext = "a",
3873 +               .psize  = 1,
3874 +               .digest = "\xf9\x33\x3e\x45\xd8\x57\xf5\xd9"
3875 +                         "\x0a\x91\xba\xb7\x0a\x1e\xba\x0c"
3876 +                         "\xfb\x1b\xe4\xb0\x78\x3c\x9a\xcf"
3877 +                         "\xcd\x88\x3a\x91\x34\x69\x29\x25",
3878 +       }, {
3879 +               .plaintext = "abc",
3880 +               .psize  = 3,
3881 +               .digest = "\xaf\xbd\x6e\x22\x8b\x9d\x8c\xbb"
3882 +                         "\xce\xf5\xca\x2d\x03\xe6\xdb\xa1"
3883 +                         "\x0a\xc0\xbc\x7d\xcb\xe4\x68\x0e"
3884 +                         "\x1e\x42\xd2\xe9\x75\x45\x9b\x65",
3885 +       }, {
3886 +               .plaintext = "message digest",
3887 +               .psize  = 14,
3888 +               .digest = "\x87\xe9\x71\x75\x9a\x1c\xe4\x7a"
3889 +                         "\x51\x4d\x5c\x91\x4c\x39\x2c\x90"
3890 +                         "\x18\xc7\xc4\x6b\xc1\x44\x65\x55"
3891 +                         "\x4a\xfc\xdf\x54\xa5\x07\x0c\x0e",
3892 +       }, {
3893 +               .plaintext = "abcdefghijklmnopqrstuvwxyz",
3894 +               .psize  = 26,
3895 +               .digest = "\x64\x9d\x30\x34\x75\x1e\xa2\x16"
3896 +                         "\x77\x6b\xf9\xa1\x8a\xcc\x81\xbc"
3897 +                         "\x78\x96\x11\x8a\x51\x97\x96\x87"
3898 +                         "\x82\xdd\x1f\xd9\x7d\x8d\x51\x33",
3899 +       }, {
3900 +               .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3901 +                            "fghijklmnopqrstuvwxyz0123456789",
3902 +               .psize  = 62,
3903 +               .digest = "\x57\x40\xa4\x08\xac\x16\xb7\x20"
3904 +                         "\xb8\x44\x24\xae\x93\x1c\xbb\x1f"
3905 +                         "\xe3\x63\xd1\xd0\xbf\x40\x17\xf1"
3906 +                         "\xa8\x9f\x7e\xa6\xde\x77\xa0\xb8",
3907 +       }, {
3908 +               .plaintext = "1234567890123456789012345678901234567890"
3909 +                            "1234567890123456789012345678901234567890",
3910 +               .psize  = 80,
3911 +               .digest = "\x06\xfd\xcc\x7a\x40\x95\x48\xaa"
3912 +                         "\xf9\x13\x68\xc0\x6a\x62\x75\xb5"
3913 +                         "\x53\xe3\xf0\x99\xbf\x0e\xa4\xed"
3914 +                         "\xfd\x67\x78\xdf\x89\xa8\x90\xdd",
3915 +        }, {
3916 +               .plaintext = "abcdbcdecdefdefgefghfghighij"
3917 +                            "hijkijkljklmklmnlmnomnopnopq",
3918 +               .psize  = 56,
3919 +               .digest = "\x38\x43\x04\x55\x83\xaa\xc6\xc8"
3920 +                         "\xc8\xd9\x12\x85\x73\xe7\xa9\x80"
3921 +                         "\x9a\xfb\x2a\x0f\x34\xcc\xc3\x6e"
3922 +                         "\xa9\xe7\x2f\x16\xf6\x36\x8e\x3f",
3923 +               .np     = 2,
3924 +               .tap    = { 28, 28 },
3925 +       }
3926 +};
3927 +
3928 +/*
3929 + * RIPEMD-320 test vectors
3930 + */
3931 +#define RMD320_TEST_VECTORS     8
3932 +
3933 +static struct hash_testvec rmd320_tv_template[] = {
3934 +       {
3935 +               .digest = "\x22\xd6\x5d\x56\x61\x53\x6c\xdc\x75\xc1"
3936 +                         "\xfd\xf5\xc6\xde\x7b\x41\xb9\xf2\x73\x25"
3937 +                         "\xeb\xc6\x1e\x85\x57\x17\x7d\x70\x5a\x0e"
3938 +                         "\xc8\x80\x15\x1c\x3a\x32\xa0\x08\x99\xb8",
3939 +       }, {
3940 +               .plaintext = "a",
3941 +               .psize  = 1,
3942 +               .digest = "\xce\x78\x85\x06\x38\xf9\x26\x58\xa5\xa5"
3943 +                         "\x85\x09\x75\x79\x92\x6d\xda\x66\x7a\x57"
3944 +                         "\x16\x56\x2c\xfc\xf6\xfb\xe7\x7f\x63\x54"
3945 +                         "\x2f\x99\xb0\x47\x05\xd6\x97\x0d\xff\x5d",
3946 +       }, {
3947 +               .plaintext = "abc",
3948 +               .psize  = 3,
3949 +               .digest = "\xde\x4c\x01\xb3\x05\x4f\x89\x30\xa7\x9d"
3950 +                         "\x09\xae\x73\x8e\x92\x30\x1e\x5a\x17\x08"
3951 +                         "\x5b\xef\xfd\xc1\xb8\xd1\x16\x71\x3e\x74"
3952 +                         "\xf8\x2f\xa9\x42\xd6\x4c\xdb\xc4\x68\x2d",
3953 +       }, {
3954 +               .plaintext = "message digest",
3955 +               .psize  = 14,
3956 +               .digest = "\x3a\x8e\x28\x50\x2e\xd4\x5d\x42\x2f\x68"
3957 +                         "\x84\x4f\x9d\xd3\x16\xe7\xb9\x85\x33\xfa"
3958 +                         "\x3f\x2a\x91\xd2\x9f\x84\xd4\x25\xc8\x8d"
3959 +                         "\x6b\x4e\xff\x72\x7d\xf6\x6a\x7c\x01\x97",
3960 +       }, {
3961 +               .plaintext = "abcdefghijklmnopqrstuvwxyz",
3962 +               .psize  = 26,
3963 +               .digest = "\xca\xbd\xb1\x81\x0b\x92\x47\x0a\x20\x93"
3964 +                         "\xaa\x6b\xce\x05\x95\x2c\x28\x34\x8c\xf4"
3965 +                         "\x3f\xf6\x08\x41\x97\x51\x66\xbb\x40\xed"
3966 +                         "\x23\x40\x04\xb8\x82\x44\x63\xe6\xb0\x09",
3967 +       }, {
3968 +               .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3969 +                            "fghijklmnopqrstuvwxyz0123456789",
3970 +               .psize  = 62,
3971 +               .digest = "\xed\x54\x49\x40\xc8\x6d\x67\xf2\x50\xd2"
3972 +                         "\x32\xc3\x0b\x7b\x3e\x57\x70\xe0\xc6\x0c"
3973 +                         "\x8c\xb9\xa4\xca\xfe\x3b\x11\x38\x8a\xf9"
3974 +                         "\x92\x0e\x1b\x99\x23\x0b\x84\x3c\x86\xa4",
3975 +       }, {
3976 +               .plaintext = "1234567890123456789012345678901234567890"
3977 +                            "1234567890123456789012345678901234567890",
3978 +               .psize  = 80,
3979 +               .digest = "\x55\x78\x88\xaf\x5f\x6d\x8e\xd6\x2a\xb6"
3980 +                         "\x69\x45\xc6\xd2\xa0\xa4\x7e\xcd\x53\x41"
3981 +                         "\xe9\x15\xeb\x8f\xea\x1d\x05\x24\x95\x5f"
3982 +                         "\x82\x5d\xc7\x17\xe4\xa0\x08\xab\x2d\x42",
3983 +        }, {
3984 +               .plaintext = "abcdbcdecdefdefgefghfghighij"
3985 +                            "hijkijkljklmklmnlmnomnopnopq",
3986 +               .psize  = 56,
3987 +               .digest = "\xd0\x34\xa7\x95\x0c\xf7\x22\x02\x1b\xa4"
3988 +                         "\xb8\x4d\xf7\x69\xa5\xde\x20\x60\xe2\x59"
3989 +                         "\xdf\x4c\x9b\xb4\xa4\x26\x8c\x0e\x93\x5b"
3990 +                         "\xbc\x74\x70\xa9\x69\xc9\xd0\x72\xa1\xac",
3991 +               .np     = 2,
3992 +               .tap    = { 28, 28 },
3993 +       }
3994  };
3995  
3996  /*
3997 @@ -817,6 +1076,168 @@
3998  };
3999  
4000  /*
4001 + * HMAC-RIPEMD128 test vectors from RFC2286
4002 + */
4003 +#define HMAC_RMD128_TEST_VECTORS       7
4004 +
4005 +static struct hash_testvec hmac_rmd128_tv_template[] = {
4006 +       {
4007 +               .key    = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
4008 +               .ksize  = 16,
4009 +               .plaintext = "Hi There",
4010 +               .psize  = 8,
4011 +               .digest = "\xfb\xf6\x1f\x94\x92\xaa\x4b\xbf"
4012 +                         "\x81\xc1\x72\xe8\x4e\x07\x34\xdb",
4013 +       }, {
4014 +               .key    = "Jefe",
4015 +               .ksize  = 4,
4016 +               .plaintext = "what do ya want for nothing?",
4017 +               .psize  = 28,
4018 +               .digest = "\x87\x5f\x82\x88\x62\xb6\xb3\x34"
4019 +                         "\xb4\x27\xc5\x5f\x9f\x7f\xf0\x9b",
4020 +               .np     = 2,
4021 +               .tap    = { 14, 14 },
4022 +       }, {
4023 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4024 +               .ksize  = 16,
4025 +               .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4026 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4027 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4028 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4029 +               .psize  = 50,
4030 +               .digest = "\x09\xf0\xb2\x84\x6d\x2f\x54\x3d"
4031 +                         "\xa3\x63\xcb\xec\x8d\x62\xa3\x8d",
4032 +       }, {
4033 +               .key    = "\x01\x02\x03\x04\x05\x06\x07\x08"
4034 +                         "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4035 +                         "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4036 +               .ksize  = 25,
4037 +               .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4038 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4039 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4040 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4041 +               .psize  = 50,
4042 +               .digest = "\xbd\xbb\xd7\xcf\x03\xe4\x4b\x5a"
4043 +                         "\xa6\x0a\xf8\x15\xbe\x4d\x22\x94",
4044 +       }, {
4045 +               .key    = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4046 +               .ksize  = 16,
4047 +               .plaintext = "Test With Truncation",
4048 +               .psize  = 20,
4049 +               .digest = "\xe7\x98\x08\xf2\x4b\x25\xfd\x03"
4050 +                         "\x1c\x15\x5f\x0d\x55\x1d\x9a\x3a",
4051 +       }, {
4052 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4053 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4054 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4055 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4056 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4057 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4058 +                       "\xaa\xaa",
4059 +               .ksize  = 80,
4060 +               .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4061 +               .psize  = 54,
4062 +               .digest = "\xdc\x73\x29\x28\xde\x98\x10\x4a"
4063 +                         "\x1f\x59\xd3\x73\xc1\x50\xac\xbb",
4064 +       }, {
4065 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4066 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4067 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4068 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4069 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4070 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4071 +                       "\xaa\xaa",
4072 +               .ksize  = 80,
4073 +               .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4074 +                          "Block-Size Data",
4075 +               .psize  = 73,
4076 +               .digest = "\x5c\x6b\xec\x96\x79\x3e\x16\xd4"
4077 +                         "\x06\x90\xc2\x37\x63\x5f\x30\xc5",
4078 +       },
4079 +};
4080 +
4081 +/*
4082 + * HMAC-RIPEMD160 test vectors from RFC2286
4083 + */
4084 +#define HMAC_RMD160_TEST_VECTORS       7
4085 +
4086 +static struct hash_testvec hmac_rmd160_tv_template[] = {
4087 +       {
4088 +               .key    = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
4089 +               .ksize  = 20,
4090 +               .plaintext = "Hi There",
4091 +               .psize  = 8,
4092 +               .digest = "\x24\xcb\x4b\xd6\x7d\x20\xfc\x1a\x5d\x2e"
4093 +                         "\xd7\x73\x2d\xcc\x39\x37\x7f\x0a\x56\x68",
4094 +       }, {
4095 +               .key    = "Jefe",
4096 +               .ksize  = 4,
4097 +               .plaintext = "what do ya want for nothing?",
4098 +               .psize  = 28,
4099 +               .digest = "\xdd\xa6\xc0\x21\x3a\x48\x5a\x9e\x24\xf4"
4100 +                         "\x74\x20\x64\xa7\xf0\x33\xb4\x3c\x40\x69",
4101 +               .np     = 2,
4102 +               .tap    = { 14, 14 },
4103 +       }, {
4104 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4105 +               .ksize  = 20,
4106 +               .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4107 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4108 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4109 +                       "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4110 +               .psize  = 50,
4111 +               .digest = "\xb0\xb1\x05\x36\x0d\xe7\x59\x96\x0a\xb4"
4112 +                         "\xf3\x52\x98\xe1\x16\xe2\x95\xd8\xe7\xc1",
4113 +       }, {
4114 +               .key    = "\x01\x02\x03\x04\x05\x06\x07\x08"
4115 +                         "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4116 +                         "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4117 +               .ksize  = 25,
4118 +               .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4119 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4120 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4121 +                       "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4122 +               .psize  = 50,
4123 +               .digest = "\xd5\xca\x86\x2f\x4d\x21\xd5\xe6\x10\xe1"
4124 +                         "\x8b\x4c\xf1\xbe\xb9\x7a\x43\x65\xec\xf4",
4125 +       }, {
4126 +               .key    = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4127 +               .ksize  = 20,
4128 +               .plaintext = "Test With Truncation",
4129 +               .psize  = 20,
4130 +               .digest = "\x76\x19\x69\x39\x78\xf9\x1d\x90\x53\x9a"
4131 +                         "\xe7\x86\x50\x0f\xf3\xd8\xe0\x51\x8e\x39",
4132 +       }, {
4133 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4134 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4135 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4136 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4137 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4138 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4139 +                       "\xaa\xaa",
4140 +               .ksize  = 80,
4141 +               .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4142 +               .psize  = 54,
4143 +               .digest = "\x64\x66\xca\x07\xac\x5e\xac\x29\xe1\xbd"
4144 +                         "\x52\x3e\x5a\xda\x76\x05\xb7\x91\xfd\x8b",
4145 +       }, {
4146 +               .key    = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4147 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4148 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4149 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4150 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4151 +                       "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4152 +                       "\xaa\xaa",
4153 +               .ksize  = 80,
4154 +               .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4155 +                          "Block-Size Data",
4156 +               .psize  = 73,
4157 +               .digest = "\x69\xea\x60\x79\x8d\x71\x61\x6c\xce\x5f"
4158 +                         "\xd0\x87\x1e\x23\x75\x4c\xd7\x5d\x5a\x0a",
4159 +       },
4160 +};
4161 +
4162 +/*
4163   * HMAC-SHA1 test vectors from RFC2202
4164   */
4165  #define HMAC_SHA1_TEST_VECTORS 7
4166 @@ -1442,6 +1863,8 @@
4167  #define DES_CBC_DEC_TEST_VECTORS       4
4168  #define DES3_EDE_ENC_TEST_VECTORS      3
4169  #define DES3_EDE_DEC_TEST_VECTORS      3
4170 +#define DES3_EDE_CBC_ENC_TEST_VECTORS  1
4171 +#define DES3_EDE_CBC_DEC_TEST_VECTORS  1
4172  
4173  static struct cipher_testvec des_enc_tv_template[] = {
4174         { /* From Applied Cryptography */
4175 @@ -1680,9 +2103,6 @@
4176         },
4177  };
4178  
4179 -/*
4180 - * We really need some more test vectors, especially for DES3 CBC.
4181 - */
4182  static struct cipher_testvec des3_ede_enc_tv_template[] = {
4183         { /* These are from openssl */
4184                 .key    = "\x01\x23\x45\x67\x89\xab\xcd\xef"
4185 @@ -1745,6 +2165,94 @@
4186         },
4187  };
4188  
4189 +static struct cipher_testvec des3_ede_cbc_enc_tv_template[] = {
4190 +       { /* Generated from openssl */
4191 +               .key    = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4192 +                         "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4193 +                         "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4194 +               .klen   = 24,
4195 +               .iv     = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4196 +               .input  = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4197 +                         "\x53\x20\x63\x65\x65\x72\x73\x74"
4198 +                         "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4199 +                         "\x20\x79\x65\x53\x72\x63\x74\x65"
4200 +                         "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4201 +                         "\x79\x6e\x53\x20\x63\x65\x65\x72"
4202 +                         "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4203 +                         "\x6e\x61\x20\x79\x65\x53\x72\x63"
4204 +                         "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4205 +                         "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4206 +                         "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4207 +                         "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4208 +                         "\x72\x63\x74\x65\x20\x73\x6f\x54"
4209 +                         "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4210 +                         "\x63\x65\x65\x72\x73\x74\x54\x20"
4211 +                         "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4212 +               .ilen   = 128,
4213 +               .result = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4214 +                         "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4215 +                         "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4216 +                         "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4217 +                         "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4218 +                         "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4219 +                         "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4220 +                         "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4221 +                         "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4222 +                         "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4223 +                         "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4224 +                         "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4225 +                         "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4226 +                         "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4227 +                         "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4228 +                         "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4229 +               .rlen   = 128,
4230 +       },
4231 +};
4232 +
4233 +static struct cipher_testvec des3_ede_cbc_dec_tv_template[] = {
4234 +       { /* Generated from openssl */
4235 +               .key    = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4236 +                         "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4237 +                         "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4238 +               .klen   = 24,
4239 +               .iv     = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4240 +               .input  = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4241 +                         "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4242 +                         "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4243 +                         "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4244 +                         "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4245 +                         "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4246 +                         "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4247 +                         "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4248 +                         "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4249 +                         "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4250 +                         "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4251 +                         "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4252 +                         "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4253 +                         "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4254 +                         "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4255 +                         "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4256 +               .ilen   = 128,
4257 +               .result = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4258 +                         "\x53\x20\x63\x65\x65\x72\x73\x74"
4259 +                         "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4260 +                         "\x20\x79\x65\x53\x72\x63\x74\x65"
4261 +                         "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4262 +                         "\x79\x6e\x53\x20\x63\x65\x65\x72"
4263 +                         "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4264 +                         "\x6e\x61\x20\x79\x65\x53\x72\x63"
4265 +                         "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4266 +                         "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4267 +                         "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4268 +                         "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4269 +                         "\x72\x63\x74\x65\x20\x73\x6f\x54"
4270 +                         "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4271 +                         "\x63\x65\x65\x72\x73\x74\x54\x20"
4272 +                         "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4273 +               .rlen   = 128,
4274 +       },
4275 +};
4276 +
4277  /*
4278   * Blowfish test vectors.
4279   */
4280 --- a/drivers/crypto/Kconfig
4281 +++ b/drivers/crypto/Kconfig
4282 @@ -174,4 +174,30 @@
4283           Select this option if you want to enable the random number generator
4284           on the HIFN 795x crypto adapters.
4285  
4286 +config CRYPTO_DEV_TALITOS
4287 +       tristate "Talitos Freescale Security Engine (SEC)"
4288 +       select CRYPTO_ALGAPI
4289 +       select CRYPTO_AUTHENC
4290 +       select HW_RANDOM
4291 +       depends on FSL_SOC
4292 +       help
4293 +         Say 'Y' here to use the Freescale Security Engine (SEC)
4294 +         to offload cryptographic algorithm computation.
4295 +
4296 +         The Freescale SEC is present on PowerQUICC 'E' processors, such
4297 +         as the MPC8349E and MPC8548E.
4298 +
4299 +         To compile this driver as a module, choose M here: the module
4300 +         will be called talitos.
4301 +
4302 +config CRYPTO_DEV_IXP4XX
4303 +       tristate "Driver for IXP4xx crypto hardware acceleration"
4304 +       depends on ARCH_IXP4XX
4305 +       select CRYPTO_DES
4306 +       select CRYPTO_ALGAPI
4307 +       select CRYPTO_AUTHENC
4308 +       select CRYPTO_BLKCIPHER
4309 +       help
4310 +         Driver for the IXP4xx NPE crypto engine.
4311 +
4312  endif # CRYPTO_HW
4313 --- a/drivers/crypto/Makefile
4314 +++ b/drivers/crypto/Makefile
4315 @@ -2,3 +2,5 @@
4316  obj-$(CONFIG_CRYPTO_DEV_PADLOCK_SHA) += padlock-sha.o
4317  obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
4318  obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
4319 +obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
4320 +obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
4321 --- a/drivers/crypto/hifn_795x.c
4322 +++ b/drivers/crypto/hifn_795x.c
4323 @@ -29,7 +29,6 @@
4324  #include <linux/dma-mapping.h>
4325  #include <linux/scatterlist.h>
4326  #include <linux/highmem.h>
4327 -#include <linux/interrupt.h>
4328  #include <linux/crypto.h>
4329  #include <linux/hw_random.h>
4330  #include <linux/ktime.h>
4331 @@ -369,7 +368,9 @@
4332  #define        HIFN_D_DST_RSIZE                80*4
4333  #define        HIFN_D_RES_RSIZE                24*4
4334  
4335 -#define HIFN_QUEUE_LENGTH              HIFN_D_CMD_RSIZE-5
4336 +#define HIFN_D_DST_DALIGN              4
4337 +
4338 +#define HIFN_QUEUE_LENGTH              HIFN_D_CMD_RSIZE-1
4339  
4340  #define AES_MIN_KEY_SIZE               16
4341  #define AES_MAX_KEY_SIZE               32
4342 @@ -535,10 +536,10 @@
4343   */
4344  struct hifn_mac_command
4345  {
4346 -       volatile u16            masks;
4347 -       volatile u16            header_skip;
4348 -       volatile u16            source_count;
4349 -       volatile u16            reserved;
4350 +       volatile __le16         masks;
4351 +       volatile __le16         header_skip;
4352 +       volatile __le16         source_count;
4353 +       volatile __le16         reserved;
4354  };
4355  
4356  #define        HIFN_MAC_CMD_ALG_MASK           0x0001
4357 @@ -564,10 +565,10 @@
4358  
4359  struct hifn_comp_command
4360  {
4361 -       volatile u16            masks;
4362 -       volatile u16            header_skip;
4363 -       volatile u16            source_count;
4364 -       volatile u16            reserved;
4365 +       volatile __le16         masks;
4366 +       volatile __le16         header_skip;
4367 +       volatile __le16         source_count;
4368 +       volatile __le16         reserved;
4369  };
4370  
4371  #define        HIFN_COMP_CMD_SRCLEN_M          0xc000
4372 @@ -583,10 +584,10 @@
4373  
4374  struct hifn_base_result
4375  {
4376 -       volatile u16            flags;
4377 -       volatile u16            session;
4378 -       volatile u16            src_cnt;                /* 15:0 of source count */
4379 -       volatile u16            dst_cnt;                /* 15:0 of dest count */
4380 +       volatile __le16         flags;
4381 +       volatile __le16         session;
4382 +       volatile __le16         src_cnt;                /* 15:0 of source count */
4383 +       volatile __le16         dst_cnt;                /* 15:0 of dest count */
4384  };
4385  
4386  #define        HIFN_BASE_RES_DSTOVERRUN        0x0200  /* destination overrun */
4387 @@ -597,8 +598,8 @@
4388  
4389  struct hifn_comp_result
4390  {
4391 -       volatile u16            flags;
4392 -       volatile u16            crc;
4393 +       volatile __le16         flags;
4394 +       volatile __le16         crc;
4395  };
4396  
4397  #define        HIFN_COMP_RES_LCB_M             0xff00  /* longitudinal check byte */
4398 @@ -609,8 +610,8 @@
4399  
4400  struct hifn_mac_result
4401  {
4402 -       volatile u16            flags;
4403 -       volatile u16            reserved;
4404 +       volatile __le16         flags;
4405 +       volatile __le16         reserved;
4406         /* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */
4407  };
4408  
4409 @@ -619,8 +620,8 @@
4410  
4411  struct hifn_crypt_result
4412  {
4413 -       volatile u16            flags;
4414 -       volatile u16            reserved;
4415 +       volatile __le16         flags;
4416 +       volatile __le16         reserved;
4417  };
4418  
4419  #define        HIFN_CRYPT_RES_SRC_NOTZERO      0x0001  /* source expired */
4420 @@ -686,12 +687,12 @@
4421  
4422  static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val)
4423  {
4424 -       writel(val, dev->bar[0] + reg);
4425 +       writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg);
4426  }
4427  
4428  static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val)
4429  {
4430 -       writel(val, dev->bar[1] + reg);
4431 +       writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg);
4432  }
4433  
4434  static void hifn_wait_puc(struct hifn_device *dev)
4435 @@ -894,7 +895,7 @@
4436         char *offtbl = NULL;
4437         int i;
4438  
4439 -       for (i = 0; i < sizeof(pci2id)/sizeof(pci2id[0]); i++) {
4440 +       for (i = 0; i < ARRAY_SIZE(pci2id); i++) {
4441                 if (pci2id[i].pci_vendor == dev->pdev->vendor &&
4442                                 pci2id[i].pci_prod == dev->pdev->device) {
4443                         offtbl = pci2id[i].card_id;
4444 @@ -1037,14 +1038,14 @@
4445         hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
4446  
4447         /* write all 4 ring address registers */
4448 -       hifn_write_1(dev, HIFN_1_DMA_CRAR, __cpu_to_le32(dptr +
4449 -                               offsetof(struct hifn_dma, cmdr[0])));
4450 -       hifn_write_1(dev, HIFN_1_DMA_SRAR, __cpu_to_le32(dptr +
4451 -                               offsetof(struct hifn_dma, srcr[0])));
4452 -       hifn_write_1(dev, HIFN_1_DMA_DRAR, __cpu_to_le32(dptr +
4453 -                               offsetof(struct hifn_dma, dstr[0])));
4454 -       hifn_write_1(dev, HIFN_1_DMA_RRAR, __cpu_to_le32(dptr +
4455 -                               offsetof(struct hifn_dma, resr[0])));
4456 +       hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +
4457 +                               offsetof(struct hifn_dma, cmdr[0]));
4458 +       hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +
4459 +                               offsetof(struct hifn_dma, srcr[0]));
4460 +       hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +
4461 +                               offsetof(struct hifn_dma, dstr[0]));
4462 +       hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +
4463 +                               offsetof(struct hifn_dma, resr[0]));
4464  
4465         mdelay(2);
4466  #if 0
4467 @@ -1166,109 +1167,15 @@
4468         return cmd_len;
4469  }
4470  
4471 -static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4472 -               unsigned int offset, unsigned int size)
4473 -{
4474 -       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4475 -       int idx;
4476 -       dma_addr_t addr;
4477 -
4478 -       addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4479 -
4480 -       idx = dma->srci;
4481 -
4482 -       dma->srcr[idx].p = __cpu_to_le32(addr);
4483 -       dma->srcr[idx].l = __cpu_to_le32(size) | HIFN_D_VALID |
4484 -                       HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST;
4485 -
4486 -       if (++idx == HIFN_D_SRC_RSIZE) {
4487 -               dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4488 -                               HIFN_D_JUMP |
4489 -                               HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4490 -               idx = 0;
4491 -       }
4492 -
4493 -       dma->srci = idx;
4494 -       dma->srcu++;
4495 -
4496 -       if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4497 -               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4498 -               dev->flags |= HIFN_FLAG_SRC_BUSY;
4499 -       }
4500 -
4501 -       return size;
4502 -}
4503 -
4504 -static void hifn_setup_res_desc(struct hifn_device *dev)
4505 -{
4506 -       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4507 -
4508 -       dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4509 -                       HIFN_D_VALID | HIFN_D_LAST);
4510 -       /*
4511 -        * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4512 -        *                                      HIFN_D_LAST | HIFN_D_NOINVALID);
4513 -        */
4514 -
4515 -       if (++dma->resi == HIFN_D_RES_RSIZE) {
4516 -               dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4517 -                               HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4518 -               dma->resi = 0;
4519 -       }
4520 -
4521 -       dma->resu++;
4522 -
4523 -       if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4524 -               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4525 -               dev->flags |= HIFN_FLAG_RES_BUSY;
4526 -       }
4527 -}
4528 -
4529 -static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4530 -               unsigned offset, unsigned size)
4531 -{
4532 -       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4533 -       int idx;
4534 -       dma_addr_t addr;
4535 -
4536 -       addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4537 -
4538 -       idx = dma->dsti;
4539 -       dma->dstr[idx].p = __cpu_to_le32(addr);
4540 -       dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4541 -                       HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST);
4542 -
4543 -       if (++idx == HIFN_D_DST_RSIZE) {
4544 -               dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4545 -                               HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4546 -                               HIFN_D_LAST | HIFN_D_NOINVALID);
4547 -               idx = 0;
4548 -       }
4549 -       dma->dsti = idx;
4550 -       dma->dstu++;
4551 -
4552 -       if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4553 -               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4554 -               dev->flags |= HIFN_FLAG_DST_BUSY;
4555 -       }
4556 -}
4557 -
4558 -static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4559 -               struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4560 -               struct hifn_context *ctx)
4561 +static int hifn_setup_cmd_desc(struct hifn_device *dev,
4562 +               struct hifn_context *ctx, void *priv, unsigned int nbytes)
4563  {
4564         struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4565         int cmd_len, sa_idx;
4566         u8 *buf, *buf_pos;
4567         u16 mask;
4568  
4569 -       dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4570 -                       dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4571 -
4572 -       sa_idx = dma->resi;
4573 -
4574 -       hifn_setup_src_desc(dev, spage, soff, nbytes);
4575 -
4576 +       sa_idx = dma->cmdi;
4577         buf_pos = buf = dma->command_bufs[dma->cmdi];
4578  
4579         mask = 0;
4580 @@ -1370,16 +1277,113 @@
4581                 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
4582                 dev->flags |= HIFN_FLAG_CMD_BUSY;
4583         }
4584 -
4585 -       hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4586 -       hifn_setup_res_desc(dev);
4587 -
4588         return 0;
4589  
4590  err_out:
4591         return -EINVAL;
4592  }
4593  
4594 +static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4595 +               unsigned int offset, unsigned int size)
4596 +{
4597 +       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4598 +       int idx;
4599 +       dma_addr_t addr;
4600 +
4601 +       addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4602 +
4603 +       idx = dma->srci;
4604 +
4605 +       dma->srcr[idx].p = __cpu_to_le32(addr);
4606 +       dma->srcr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4607 +                       HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4608 +
4609 +       if (++idx == HIFN_D_SRC_RSIZE) {
4610 +               dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4611 +                               HIFN_D_JUMP |
4612 +                               HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4613 +               idx = 0;
4614 +       }
4615 +
4616 +       dma->srci = idx;
4617 +       dma->srcu++;
4618 +
4619 +       if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4620 +               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4621 +               dev->flags |= HIFN_FLAG_SRC_BUSY;
4622 +       }
4623 +
4624 +       return size;
4625 +}
4626 +
4627 +static void hifn_setup_res_desc(struct hifn_device *dev)
4628 +{
4629 +       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4630 +
4631 +       dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4632 +                       HIFN_D_VALID | HIFN_D_LAST);
4633 +       /*
4634 +        * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4635 +        *                                      HIFN_D_LAST);
4636 +        */
4637 +
4638 +       if (++dma->resi == HIFN_D_RES_RSIZE) {
4639 +               dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4640 +                               HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4641 +               dma->resi = 0;
4642 +       }
4643 +
4644 +       dma->resu++;
4645 +
4646 +       if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4647 +               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4648 +               dev->flags |= HIFN_FLAG_RES_BUSY;
4649 +       }
4650 +}
4651 +
4652 +static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4653 +               unsigned offset, unsigned size)
4654 +{
4655 +       struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4656 +       int idx;
4657 +       dma_addr_t addr;
4658 +
4659 +       addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4660 +
4661 +       idx = dma->dsti;
4662 +       dma->dstr[idx].p = __cpu_to_le32(addr);
4663 +       dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4664 +                       HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4665 +
4666 +       if (++idx == HIFN_D_DST_RSIZE) {
4667 +               dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4668 +                               HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4669 +                               HIFN_D_LAST);
4670 +               idx = 0;
4671 +       }
4672 +       dma->dsti = idx;
4673 +       dma->dstu++;
4674 +
4675 +       if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4676 +               hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4677 +               dev->flags |= HIFN_FLAG_DST_BUSY;
4678 +       }
4679 +}
4680 +
4681 +static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4682 +               struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4683 +               struct hifn_context *ctx)
4684 +{
4685 +       dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4686 +                       dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4687 +
4688 +       hifn_setup_src_desc(dev, spage, soff, nbytes);
4689 +       hifn_setup_cmd_desc(dev, ctx, priv, nbytes);
4690 +       hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4691 +       hifn_setup_res_desc(dev);
4692 +       return 0;
4693 +}
4694 +
4695  static int ablkcipher_walk_init(struct ablkcipher_walk *w,
4696                 int num, gfp_t gfp_flags)
4697  {
4698 @@ -1431,7 +1435,7 @@
4699                 return -EINVAL;
4700  
4701         while (size) {
4702 -               copy = min(drest, src->length);
4703 +               copy = min(drest, min(size, src->length));
4704  
4705                 saddr = kmap_atomic(sg_page(src), KM_SOFTIRQ1);
4706                 memcpy(daddr, saddr + src->offset, copy);
4707 @@ -1458,10 +1462,6 @@
4708  static int ablkcipher_walk(struct ablkcipher_request *req,
4709                 struct ablkcipher_walk *w)
4710  {
4711 -       unsigned blocksize =
4712 -               crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4713 -       unsigned alignmask =
4714 -               crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4715         struct scatterlist *src, *dst, *t;
4716         void *daddr;
4717         unsigned int nbytes = req->nbytes, offset, copy, diff;
4718 @@ -1477,16 +1477,14 @@
4719                 dst = &req->dst[idx];
4720  
4721                 dprintk("\n%s: slen: %u, dlen: %u, soff: %u, doff: %u, offset: %u, "
4722 -                               "blocksize: %u, nbytes: %u.\n",
4723 +                               "nbytes: %u.\n",
4724                                 __func__, src->length, dst->length, src->offset,
4725 -                               dst->offset, offset, blocksize, nbytes);
4726 +                               dst->offset, offset, nbytes);
4727  
4728 -               if (src->length & (blocksize - 1) ||
4729 -                               src->offset & (alignmask - 1) ||
4730 -                               dst->length & (blocksize - 1) ||
4731 -                               dst->offset & (alignmask - 1) ||
4732 -                               offset) {
4733 -                       unsigned slen = src->length - offset;
4734 +               if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4735 +                   !IS_ALIGNED(dst->length, HIFN_D_DST_DALIGN) ||
4736 +                   offset) {
4737 +                       unsigned slen = min(src->length - offset, nbytes);
4738                         unsigned dlen = PAGE_SIZE;
4739  
4740                         t = &w->cache[idx];
4741 @@ -1498,8 +1496,8 @@
4742  
4743                         idx += err;
4744  
4745 -                       copy = slen & ~(blocksize - 1);
4746 -                       diff = slen & (blocksize - 1);
4747 +                       copy = slen & ~(HIFN_D_DST_DALIGN - 1);
4748 +                       diff = slen & (HIFN_D_DST_DALIGN - 1);
4749  
4750                         if (dlen < nbytes) {
4751                                 /*
4752 @@ -1507,7 +1505,7 @@
4753                                  * to put there additional blocksized chunk,
4754                                  * so we mark that page as containing only
4755                                  * blocksize aligned chunks:
4756 -                                *      t->length = (slen & ~(blocksize - 1));
4757 +                                *      t->length = (slen & ~(HIFN_D_DST_DALIGN - 1));
4758                                  * and increase number of bytes to be processed
4759                                  * in next chunk:
4760                                  *      nbytes += diff;
4761 @@ -1544,7 +1542,7 @@
4762  
4763                         kunmap_atomic(daddr, KM_SOFTIRQ0);
4764                 } else {
4765 -                       nbytes -= src->length;
4766 +                       nbytes -= min(src->length, nbytes);
4767                         idx++;
4768                 }
4769  
4770 @@ -1563,14 +1561,10 @@
4771         struct hifn_context *ctx = crypto_tfm_ctx(req->base.tfm);
4772         struct hifn_device *dev = ctx->dev;
4773         struct page *spage, *dpage;
4774 -       unsigned long soff, doff, flags;
4775 +       unsigned long soff, doff, dlen, flags;
4776         unsigned int nbytes = req->nbytes, idx = 0, len;
4777         int err = -EINVAL, sg_num;
4778         struct scatterlist *src, *dst, *t;
4779 -       unsigned blocksize =
4780 -               crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4781 -       unsigned alignmask =
4782 -               crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4783  
4784         if (ctx->iv && !ctx->ivsize && ctx->mode != ACRYPTO_MODE_ECB)
4785                 goto err_out_exit;
4786 @@ -1578,17 +1572,14 @@
4787         ctx->walk.flags = 0;
4788  
4789         while (nbytes) {
4790 -               src = &req->src[idx];
4791                 dst = &req->dst[idx];
4792 +               dlen = min(dst->length, nbytes);
4793  
4794 -               if (src->length & (blocksize - 1) ||
4795 -                               src->offset & (alignmask - 1) ||
4796 -                               dst->length & (blocksize - 1) ||
4797 -                               dst->offset & (alignmask - 1)) {
4798 +               if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4799 +                   !IS_ALIGNED(dlen, HIFN_D_DST_DALIGN))
4800                         ctx->walk.flags |= ASYNC_FLAGS_MISALIGNED;
4801 -               }
4802  
4803 -               nbytes -= src->length;
4804 +               nbytes -= dlen;
4805                 idx++;
4806         }
4807  
4808 @@ -1602,7 +1593,10 @@
4809         idx = 0;
4810  
4811         sg_num = ablkcipher_walk(req, &ctx->walk);
4812 -
4813 +       if (sg_num < 0) {
4814 +               err = sg_num;
4815 +               goto err_out_exit;
4816 +       }
4817         atomic_set(&ctx->sg_num, sg_num);
4818  
4819         spin_lock_irqsave(&dev->lock, flags);
4820 @@ -1640,7 +1634,7 @@
4821                 if (err)
4822                         goto err_out;
4823  
4824 -               nbytes -= len;
4825 +               nbytes -= min(len, nbytes);
4826         }
4827  
4828         dev->active = HIFN_DEFAULT_ACTIVE_NUM;
4829 @@ -1651,7 +1645,7 @@
4830  err_out:
4831         spin_unlock_irqrestore(&dev->lock, flags);
4832  err_out_exit:
4833 -       if (err && printk_ratelimit())
4834 +       if (err)
4835                 dprintk("%s: iv: %p [%d], key: %p [%d], mode: %u, op: %u, "
4836                                 "type: %u, err: %d.\n",
4837                         dev->name, ctx->iv, ctx->ivsize,
4838 @@ -1745,8 +1739,7 @@
4839                 return -EINVAL;
4840  
4841         while (size) {
4842 -
4843 -               copy = min(dst->length, srest);
4844 +               copy = min(srest, min(dst->length, size));
4845  
4846                 daddr = kmap_atomic(sg_page(dst), KM_IRQ0);
4847                 memcpy(daddr + dst->offset + offset, saddr, copy);
4848 @@ -1803,7 +1796,7 @@
4849                                         sg_page(dst), dst->length, nbytes);
4850  
4851                                 if (!t->length) {
4852 -                                       nbytes -= dst->length;
4853 +                                       nbytes -= min(dst->length, nbytes);
4854                                         idx++;
4855                                         continue;
4856                                 }
4857 @@ -2202,9 +2195,9 @@
4858                 return err;
4859  
4860         if (dev->started < HIFN_QUEUE_LENGTH && dev->queue.qlen)
4861 -               err = hifn_process_queue(dev);
4862 +               hifn_process_queue(dev);
4863  
4864 -       return err;
4865 +       return -EINPROGRESS;
4866  }
4867  
4868  /*
4869 @@ -2364,7 +2357,7 @@
4870          * 3DES ECB, CBC, CFB and OFB modes.
4871          */
4872         {
4873 -               .name = "cfb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4874 +               .name = "cfb(des3_ede)", .drv_name = "cfb-3des", .bsize = 8,
4875                 .ablkcipher = {
4876                         .min_keysize    =       HIFN_3DES_KEY_LENGTH,
4877                         .max_keysize    =       HIFN_3DES_KEY_LENGTH,
4878 @@ -2374,7 +2367,7 @@
4879                 },
4880         },
4881         {
4882 -               .name = "ofb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4883 +               .name = "ofb(des3_ede)", .drv_name = "ofb-3des", .bsize = 8,
4884                 .ablkcipher = {
4885                         .min_keysize    =       HIFN_3DES_KEY_LENGTH,
4886                         .max_keysize    =       HIFN_3DES_KEY_LENGTH,
4887 @@ -2384,8 +2377,9 @@
4888                 },
4889         },
4890         {
4891 -               .name = "cbc(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4892 +               .name = "cbc(des3_ede)", .drv_name = "cbc-3des", .bsize = 8,
4893                 .ablkcipher = {
4894 +                       .ivsize         =       HIFN_IV_LENGTH,
4895                         .min_keysize    =       HIFN_3DES_KEY_LENGTH,
4896                         .max_keysize    =       HIFN_3DES_KEY_LENGTH,
4897                         .setkey         =       hifn_setkey,
4898 @@ -2394,7 +2388,7 @@
4899                 },
4900         },
4901         {
4902 -               .name = "ecb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4903 +               .name = "ecb(des3_ede)", .drv_name = "ecb-3des", .bsize = 8,
4904                 .ablkcipher = {
4905                         .min_keysize    =       HIFN_3DES_KEY_LENGTH,
4906                         .max_keysize    =       HIFN_3DES_KEY_LENGTH,
4907 @@ -2408,7 +2402,7 @@
4908          * DES ECB, CBC, CFB and OFB modes.
4909          */
4910         {
4911 -               .name = "cfb(des)", .drv_name = "hifn-des", .bsize = 8,
4912 +               .name = "cfb(des)", .drv_name = "cfb-des", .bsize = 8,
4913                 .ablkcipher = {
4914                         .min_keysize    =       HIFN_DES_KEY_LENGTH,
4915                         .max_keysize    =       HIFN_DES_KEY_LENGTH,
4916 @@ -2418,7 +2412,7 @@
4917                 },
4918         },
4919         {
4920 -               .name = "ofb(des)", .drv_name = "hifn-des", .bsize = 8,
4921 +               .name = "ofb(des)", .drv_name = "ofb-des", .bsize = 8,
4922                 .ablkcipher = {
4923                         .min_keysize    =       HIFN_DES_KEY_LENGTH,
4924                         .max_keysize    =       HIFN_DES_KEY_LENGTH,
4925 @@ -2428,8 +2422,9 @@
4926                 },
4927         },
4928         {
4929 -               .name = "cbc(des)", .drv_name = "hifn-des", .bsize = 8,
4930 +               .name = "cbc(des)", .drv_name = "cbc-des", .bsize = 8,
4931                 .ablkcipher = {
4932 +                       .ivsize         =       HIFN_IV_LENGTH,
4933                         .min_keysize    =       HIFN_DES_KEY_LENGTH,
4934                         .max_keysize    =       HIFN_DES_KEY_LENGTH,
4935                         .setkey         =       hifn_setkey,
4936 @@ -2438,7 +2433,7 @@
4937                 },
4938         },
4939         {
4940 -               .name = "ecb(des)", .drv_name = "hifn-des", .bsize = 8,
4941 +               .name = "ecb(des)", .drv_name = "ecb-des", .bsize = 8,
4942                 .ablkcipher = {
4943                         .min_keysize    =       HIFN_DES_KEY_LENGTH,
4944                         .max_keysize    =       HIFN_DES_KEY_LENGTH,
4945 @@ -2452,7 +2447,7 @@
4946          * AES ECB, CBC, CFB and OFB modes.
4947          */
4948         {
4949 -               .name = "ecb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4950 +               .name = "ecb(aes)", .drv_name = "ecb-aes", .bsize = 16,
4951                 .ablkcipher = {
4952                         .min_keysize    =       AES_MIN_KEY_SIZE,
4953                         .max_keysize    =       AES_MAX_KEY_SIZE,
4954 @@ -2462,8 +2457,9 @@
4955                 },
4956         },
4957         {
4958 -               .name = "cbc(aes)", .drv_name = "hifn-aes", .bsize = 16,
4959 +               .name = "cbc(aes)", .drv_name = "cbc-aes", .bsize = 16,
4960                 .ablkcipher = {
4961 +                       .ivsize         =       HIFN_AES_IV_LENGTH,
4962                         .min_keysize    =       AES_MIN_KEY_SIZE,
4963                         .max_keysize    =       AES_MAX_KEY_SIZE,
4964                         .setkey         =       hifn_setkey,
4965 @@ -2472,7 +2468,7 @@
4966                 },
4967         },
4968         {
4969 -               .name = "cfb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4970 +               .name = "cfb(aes)", .drv_name = "cfb-aes", .bsize = 16,
4971                 .ablkcipher = {
4972                         .min_keysize    =       AES_MIN_KEY_SIZE,
4973                         .max_keysize    =       AES_MAX_KEY_SIZE,
4974 @@ -2482,7 +2478,7 @@
4975                 },
4976         },
4977         {
4978 -               .name = "ofb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4979 +               .name = "ofb(aes)", .drv_name = "ofb-aes", .bsize = 16,
4980                 .ablkcipher = {
4981                         .min_keysize    =       AES_MIN_KEY_SIZE,
4982                         .max_keysize    =       AES_MAX_KEY_SIZE,
4983 @@ -2514,15 +2510,14 @@
4984                 return -ENOMEM;
4985  
4986         snprintf(alg->alg.cra_name, CRYPTO_MAX_ALG_NAME, "%s", t->name);
4987 -       snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", t->drv_name);
4988 +       snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s-%s",
4989 +                t->drv_name, dev->name);
4990  
4991         alg->alg.cra_priority = 300;
4992         alg->alg.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC;
4993         alg->alg.cra_blocksize = t->bsize;
4994         alg->alg.cra_ctxsize = sizeof(struct hifn_context);
4995 -       alg->alg.cra_alignmask = 15;
4996 -       if (t->bsize == 8)
4997 -               alg->alg.cra_alignmask = 3;
4998 +       alg->alg.cra_alignmask = 0;
4999         alg->alg.cra_type = &crypto_ablkcipher_type;
5000         alg->alg.cra_module = THIS_MODULE;
5001         alg->alg.cra_u.ablkcipher = t->ablkcipher;
5002 --- /dev/null
5003 +++ b/drivers/crypto/ixp4xx_crypto.c
5004 @@ -0,0 +1,1506 @@
5005 +/*
5006 + * Intel IXP4xx NPE-C crypto driver
5007 + *
5008 + * Copyright (C) 2008 Christian Hohnstaedt <chohnstaedt@innominate.com>
5009 + *
5010 + * This program is free software; you can redistribute it and/or modify it
5011 + * under the terms of version 2 of the GNU General Public License
5012 + * as published by the Free Software Foundation.
5013 + *
5014 + */
5015 +
5016 +#include <linux/platform_device.h>
5017 +#include <linux/dma-mapping.h>
5018 +#include <linux/dmapool.h>
5019 +#include <linux/crypto.h>
5020 +#include <linux/kernel.h>
5021 +#include <linux/rtnetlink.h>
5022 +#include <linux/interrupt.h>
5023 +#include <linux/spinlock.h>
5024 +
5025 +#include <crypto/ctr.h>
5026 +#include <crypto/des.h>
5027 +#include <crypto/aes.h>
5028 +#include <crypto/sha.h>
5029 +#include <crypto/algapi.h>
5030 +#include <crypto/aead.h>
5031 +#include <crypto/authenc.h>
5032 +#include <crypto/scatterwalk.h>
5033 +
5034 +#include <asm/arch/npe.h>
5035 +#include <asm/arch/qmgr.h>
5036 +
5037 +#define MAX_KEYLEN 32
5038 +
5039 +/* hash: cfgword + 2 * digestlen; crypt: keylen + cfgword */
5040 +#define NPE_CTX_LEN 80
5041 +#define AES_BLOCK128 16
5042 +
5043 +#define NPE_OP_HASH_VERIFY   0x01
5044 +#define NPE_OP_CCM_ENABLE    0x04
5045 +#define NPE_OP_CRYPT_ENABLE  0x08
5046 +#define NPE_OP_HASH_ENABLE   0x10
5047 +#define NPE_OP_NOT_IN_PLACE  0x20
5048 +#define NPE_OP_HMAC_DISABLE  0x40
5049 +#define NPE_OP_CRYPT_ENCRYPT 0x80
5050 +
5051 +#define NPE_OP_CCM_GEN_MIC   0xcc
5052 +#define NPE_OP_HASH_GEN_ICV  0x50
5053 +#define NPE_OP_ENC_GEN_KEY   0xc9
5054 +
5055 +#define MOD_ECB     0x0000
5056 +#define MOD_CTR     0x1000
5057 +#define MOD_CBC_ENC 0x2000
5058 +#define MOD_CBC_DEC 0x3000
5059 +#define MOD_CCM_ENC 0x4000
5060 +#define MOD_CCM_DEC 0x5000
5061 +
5062 +#define KEYLEN_128  4
5063 +#define KEYLEN_192  6
5064 +#define KEYLEN_256  8
5065 +
5066 +#define CIPH_DECR   0x0000
5067 +#define CIPH_ENCR   0x0400
5068 +
5069 +#define MOD_DES     0x0000
5070 +#define MOD_TDEA2   0x0100
5071 +#define MOD_3DES   0x0200
5072 +#define MOD_AES     0x0800
5073 +#define MOD_AES128  (0x0800 | KEYLEN_128)
5074 +#define MOD_AES192  (0x0900 | KEYLEN_192)
5075 +#define MOD_AES256  (0x0a00 | KEYLEN_256)
5076 +
5077 +#define MAX_IVLEN   16
5078 +#define NPE_ID      2  /* NPE C */
5079 +#define NPE_QLEN    16
5080 +/* Space for registering when the first
5081 + * NPE_QLEN crypt_ctl are busy */
5082 +#define NPE_QLEN_TOTAL 64
5083 +
5084 +#define SEND_QID    29
5085 +#define RECV_QID    30
5086 +
5087 +#define CTL_FLAG_UNUSED                0x0000
5088 +#define CTL_FLAG_USED          0x1000
5089 +#define CTL_FLAG_PERFORM_ABLK  0x0001
5090 +#define CTL_FLAG_GEN_ICV       0x0002
5091 +#define CTL_FLAG_GEN_REVAES    0x0004
5092 +#define CTL_FLAG_PERFORM_AEAD  0x0008
5093 +#define CTL_FLAG_MASK          0x000f
5094 +
5095 +#define HMAC_IPAD_VALUE   0x36
5096 +#define HMAC_OPAD_VALUE   0x5C
5097 +#define HMAC_PAD_BLOCKLEN SHA1_BLOCK_SIZE
5098 +
5099 +#define MD5_DIGEST_SIZE   16
5100 +
5101 +struct buffer_desc {
5102 +       u32 phys_next;
5103 +       u16 buf_len;
5104 +       u16 pkt_len;
5105 +       u32 phys_addr;
5106 +       u32 __reserved[4];
5107 +       struct buffer_desc *next;
5108 +};
5109 +
5110 +struct crypt_ctl {
5111 +       u8 mode;                /* NPE_OP_*  operation mode */
5112 +       u8 init_len;
5113 +       u16 reserved;
5114 +       u8 iv[MAX_IVLEN];       /* IV for CBC mode or CTR IV for CTR mode */
5115 +       u32 icv_rev_aes;        /* icv or rev aes */
5116 +       u32 src_buf;
5117 +       u32 dst_buf;
5118 +       u16 auth_offs;          /* Authentication start offset */
5119 +       u16 auth_len;           /* Authentication data length */
5120 +       u16 crypt_offs;         /* Cryption start offset */
5121 +       u16 crypt_len;          /* Cryption data length */
5122 +       u32 aadAddr;            /* Additional Auth Data Addr for CCM mode */
5123 +       u32 crypto_ctx;         /* NPE Crypto Param structure address */
5124 +
5125 +       /* Used by Host: 4*4 bytes*/
5126 +       unsigned ctl_flags;
5127 +       union {
5128 +               struct ablkcipher_request *ablk_req;
5129 +               struct aead_request *aead_req;
5130 +               struct crypto_tfm *tfm;
5131 +       } data;
5132 +       struct buffer_desc *regist_buf;
5133 +       u8 *regist_ptr;
5134 +};
5135 +
5136 +struct ablk_ctx {
5137 +       struct buffer_desc *src;
5138 +       struct buffer_desc *dst;
5139 +       unsigned src_nents;
5140 +       unsigned dst_nents;
5141 +};
5142 +
5143 +struct aead_ctx {
5144 +       struct buffer_desc *buffer;
5145 +       unsigned short assoc_nents;
5146 +       unsigned short src_nents;
5147 +       struct scatterlist ivlist;
5148 +       /* used when the hmac is not on one sg entry */
5149 +       u8 *hmac_virt;
5150 +       int encrypt;
5151 +};
5152 +
5153 +struct ix_hash_algo {
5154 +       u32 cfgword;
5155 +       unsigned char *icv;
5156 +};
5157 +
5158 +struct ix_sa_dir {
5159 +       unsigned char *npe_ctx;
5160 +       dma_addr_t npe_ctx_phys;
5161 +       int npe_ctx_idx;
5162 +       u8 npe_mode;
5163 +};
5164 +
5165 +struct ixp_ctx {
5166 +       struct ix_sa_dir encrypt;
5167 +       struct ix_sa_dir decrypt;
5168 +       int authkey_len;
5169 +       u8 authkey[MAX_KEYLEN];
5170 +       int enckey_len;
5171 +       u8 enckey[MAX_KEYLEN];
5172 +       u8 salt[MAX_IVLEN];
5173 +       u8 nonce[CTR_RFC3686_NONCE_SIZE];
5174 +       unsigned salted;
5175 +       atomic_t configuring;
5176 +       struct completion completion;
5177 +};
5178 +
5179 +struct ixp_alg {
5180 +       struct crypto_alg crypto;
5181 +       const struct ix_hash_algo *hash;
5182 +       u32 cfg_enc;
5183 +       u32 cfg_dec;
5184 +
5185 +       int registered;
5186 +};
5187 +
5188 +static const struct ix_hash_algo hash_alg_md5 = {
5189 +       .cfgword        = 0xAA010004,
5190 +       .icv            = "\x01\x23\x45\x67\x89\xAB\xCD\xEF"
5191 +                         "\xFE\xDC\xBA\x98\x76\x54\x32\x10",
5192 +};
5193 +static const struct ix_hash_algo hash_alg_sha1 = {
5194 +       .cfgword        = 0x00000005,
5195 +       .icv            = "\x67\x45\x23\x01\xEF\xCD\xAB\x89\x98\xBA"
5196 +                         "\xDC\xFE\x10\x32\x54\x76\xC3\xD2\xE1\xF0",
5197 +};
5198 +
5199 +static struct npe *npe_c;
5200 +static struct dma_pool *buffer_pool = NULL;
5201 +static struct dma_pool *ctx_pool = NULL;
5202 +
5203 +static struct crypt_ctl *crypt_virt = NULL;
5204 +static dma_addr_t crypt_phys;
5205 +
5206 +static int support_aes = 1;
5207 +
5208 +static void dev_release(struct device *dev)
5209 +{
5210 +       return;
5211 +}
5212 +
5213 +#define DRIVER_NAME "ixp4xx_crypto"
5214 +static struct platform_device pseudo_dev = {
5215 +       .name = DRIVER_NAME,
5216 +       .id   = 0,
5217 +       .num_resources = 0,
5218 +       .dev  = {
5219 +               .coherent_dma_mask = DMA_32BIT_MASK,
5220 +               .release = dev_release,
5221 +       }
5222 +};
5223 +
5224 +static struct device *dev = &pseudo_dev.dev;
5225 +
5226 +static inline dma_addr_t crypt_virt2phys(struct crypt_ctl *virt)
5227 +{
5228 +       return crypt_phys + (virt - crypt_virt) * sizeof(struct crypt_ctl);
5229 +}
5230 +
5231 +static inline struct crypt_ctl *crypt_phys2virt(dma_addr_t phys)
5232 +{
5233 +       return crypt_virt + (phys - crypt_phys) / sizeof(struct crypt_ctl);
5234 +}
5235 +
5236 +static inline u32 cipher_cfg_enc(struct crypto_tfm *tfm)
5237 +{
5238 +       return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_enc;
5239 +}
5240 +
5241 +static inline u32 cipher_cfg_dec(struct crypto_tfm *tfm)
5242 +{
5243 +       return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_dec;
5244 +}
5245 +
5246 +static inline const struct ix_hash_algo *ix_hash(struct crypto_tfm *tfm)
5247 +{
5248 +       return container_of(tfm->__crt_alg, struct ixp_alg, crypto)->hash;
5249 +}
5250 +
5251 +static int setup_crypt_desc(void)
5252 +{
5253 +       BUILD_BUG_ON(sizeof(struct crypt_ctl) != 64);
5254 +       crypt_virt = dma_alloc_coherent(dev,
5255 +                       NPE_QLEN * sizeof(struct crypt_ctl),
5256 +                       &crypt_phys, GFP_KERNEL);
5257 +       if (!crypt_virt)
5258 +               return -ENOMEM;
5259 +       memset(crypt_virt, 0, NPE_QLEN * sizeof(struct crypt_ctl));
5260 +       return 0;
5261 +}
5262 +
5263 +static spinlock_t desc_lock;
5264 +static struct crypt_ctl *get_crypt_desc(void)
5265 +{
5266 +       int i;
5267 +       static int idx = 0;
5268 +       unsigned long flags;
5269 +
5270 +       spin_lock_irqsave(&desc_lock, flags);
5271 +
5272 +       if (unlikely(!crypt_virt))
5273 +               setup_crypt_desc();
5274 +       if (unlikely(!crypt_virt)) {
5275 +               spin_unlock_irqrestore(&desc_lock, flags);
5276 +               return NULL;
5277 +       }
5278 +       i = idx;
5279 +       if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5280 +               if (++idx >= NPE_QLEN)
5281 +                       idx = 0;
5282 +               crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5283 +               spin_unlock_irqrestore(&desc_lock, flags);
5284 +               return crypt_virt +i;
5285 +       } else {
5286 +               spin_unlock_irqrestore(&desc_lock, flags);
5287 +               return NULL;
5288 +       }
5289 +}
5290 +
5291 +static spinlock_t emerg_lock;
5292 +static struct crypt_ctl *get_crypt_desc_emerg(void)
5293 +{
5294 +       int i;
5295 +       static int idx = NPE_QLEN;
5296 +       struct crypt_ctl *desc;
5297 +       unsigned long flags;
5298 +
5299 +       desc = get_crypt_desc();
5300 +       if (desc)
5301 +               return desc;
5302 +       if (unlikely(!crypt_virt))
5303 +               return NULL;
5304 +
5305 +       spin_lock_irqsave(&emerg_lock, flags);
5306 +       i = idx;
5307 +       if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5308 +               if (++idx >= NPE_QLEN_TOTAL)
5309 +                       idx = NPE_QLEN;
5310 +               crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5311 +               spin_unlock_irqrestore(&emerg_lock, flags);
5312 +               return crypt_virt +i;
5313 +       } else {
5314 +               spin_unlock_irqrestore(&emerg_lock, flags);
5315 +               return NULL;
5316 +       }
5317 +}
5318 +
5319 +static void free_buf_chain(struct buffer_desc *buf, u32 phys)
5320 +{
5321 +       while (buf) {
5322 +               struct buffer_desc *buf1;
5323 +               u32 phys1;
5324 +
5325 +               buf1 = buf->next;
5326 +               phys1 = buf->phys_next;
5327 +               dma_pool_free(buffer_pool, buf, phys);
5328 +               buf = buf1;
5329 +               phys = phys1;
5330 +       }
5331 +}
5332 +
5333 +static struct tasklet_struct crypto_done_tasklet;
5334 +
5335 +static void finish_scattered_hmac(struct crypt_ctl *crypt)
5336 +{
5337 +       struct aead_request *req = crypt->data.aead_req;
5338 +       struct aead_ctx *req_ctx = aead_request_ctx(req);
5339 +       struct crypto_aead *tfm = crypto_aead_reqtfm(req);
5340 +       int authsize = crypto_aead_authsize(tfm);
5341 +       int decryptlen = req->cryptlen - authsize;
5342 +
5343 +       if (req_ctx->encrypt) {
5344 +               scatterwalk_map_and_copy(req_ctx->hmac_virt,
5345 +                       req->src, decryptlen, authsize, 1);
5346 +       }
5347 +       dma_pool_free(buffer_pool, req_ctx->hmac_virt, crypt->icv_rev_aes);
5348 +}
5349 +
5350 +static void one_packet(dma_addr_t phys)
5351 +{
5352 +       struct crypt_ctl *crypt;
5353 +       struct ixp_ctx *ctx;
5354 +       int failed;
5355 +       enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5356 +
5357 +       failed = phys & 0x1 ? -EBADMSG : 0;
5358 +       phys &= ~0x3;
5359 +       crypt = crypt_phys2virt(phys);
5360 +
5361 +       switch (crypt->ctl_flags & CTL_FLAG_MASK) {
5362 +       case CTL_FLAG_PERFORM_AEAD: {
5363 +               struct aead_request *req = crypt->data.aead_req;
5364 +               struct aead_ctx *req_ctx = aead_request_ctx(req);
5365 +               dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents,
5366 +                               DMA_TO_DEVICE);
5367 +               dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
5368 +               dma_unmap_sg(dev, req->src, req_ctx->src_nents,
5369 +                               DMA_BIDIRECTIONAL);
5370 +
5371 +               free_buf_chain(req_ctx->buffer, crypt->src_buf);
5372 +               if (req_ctx->hmac_virt) {
5373 +                       finish_scattered_hmac(crypt);
5374 +               }
5375 +               req->base.complete(&req->base, failed);
5376 +               break;
5377 +       }
5378 +       case CTL_FLAG_PERFORM_ABLK: {
5379 +               struct ablkcipher_request *req = crypt->data.ablk_req;
5380 +               struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5381 +               int nents;
5382 +               if (req_ctx->dst) {
5383 +                       nents = req_ctx->dst_nents;
5384 +                       dma_unmap_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5385 +                       free_buf_chain(req_ctx->dst, crypt->dst_buf);
5386 +                       src_direction = DMA_TO_DEVICE;
5387 +               }
5388 +               nents = req_ctx->src_nents;
5389 +               dma_unmap_sg(dev, req->src, nents, src_direction);
5390 +               free_buf_chain(req_ctx->src, crypt->src_buf);
5391 +               req->base.complete(&req->base, failed);
5392 +               break;
5393 +       }
5394 +       case CTL_FLAG_GEN_ICV:
5395 +               ctx = crypto_tfm_ctx(crypt->data.tfm);
5396 +               dma_pool_free(ctx_pool, crypt->regist_ptr,
5397 +                               crypt->regist_buf->phys_addr);
5398 +               dma_pool_free(buffer_pool, crypt->regist_buf, crypt->src_buf);
5399 +               if (atomic_dec_and_test(&ctx->configuring))
5400 +                       complete(&ctx->completion);
5401 +               break;
5402 +       case CTL_FLAG_GEN_REVAES:
5403 +               ctx = crypto_tfm_ctx(crypt->data.tfm);
5404 +               *(u32*)ctx->decrypt.npe_ctx &= cpu_to_be32(~CIPH_ENCR);
5405 +               if (atomic_dec_and_test(&ctx->configuring))
5406 +                       complete(&ctx->completion);
5407 +               break;
5408 +       default:
5409 +               BUG();
5410 +       }
5411 +       crypt->ctl_flags = CTL_FLAG_UNUSED;
5412 +}
5413 +
5414 +static void irqhandler(void *_unused)
5415 +{
5416 +       tasklet_schedule(&crypto_done_tasklet);
5417 +}
5418 +
5419 +static void crypto_done_action(unsigned long arg)
5420 +{
5421 +       int i;
5422 +
5423 +       for(i=0; i<4; i++) {
5424 +               dma_addr_t phys = qmgr_get_entry(RECV_QID);
5425 +               if (!phys)
5426 +                       return;
5427 +               one_packet(phys);
5428 +       }
5429 +       tasklet_schedule(&crypto_done_tasklet);
5430 +}
5431 +
5432 +static int init_ixp_crypto(void)
5433 +{
5434 +       int ret = -ENODEV;
5435 +
5436 +       if (! ( ~(*IXP4XX_EXP_CFG2) & (IXP4XX_FEATURE_HASH |
5437 +                               IXP4XX_FEATURE_AES | IXP4XX_FEATURE_DES))) {
5438 +               printk(KERN_ERR "ixp_crypto: No HW crypto available\n");
5439 +               return ret;
5440 +       }
5441 +       npe_c = npe_request(NPE_ID);
5442 +       if (!npe_c)
5443 +               return ret;
5444 +
5445 +       if (!npe_running(npe_c)) {
5446 +               npe_load_firmware(npe_c, npe_name(npe_c), dev);
5447 +       }
5448 +
5449 +       /* buffer_pool will also be used to sometimes store the hmac,
5450 +        * so assure it is large enough
5451 +        */
5452 +       BUILD_BUG_ON(SHA1_DIGEST_SIZE > sizeof(struct buffer_desc));
5453 +       buffer_pool = dma_pool_create("buffer", dev,
5454 +                       sizeof(struct buffer_desc), 32, 0);
5455 +       ret = -ENOMEM;
5456 +       if (!buffer_pool) {
5457 +               goto err;
5458 +       }
5459 +       ctx_pool = dma_pool_create("context", dev,
5460 +                       NPE_CTX_LEN, 16, 0);
5461 +       if (!ctx_pool) {
5462 +               goto err;
5463 +       }
5464 +       ret = qmgr_request_queue(SEND_QID, NPE_QLEN_TOTAL, 0, 0);
5465 +       if (ret)
5466 +               goto err;
5467 +       ret = qmgr_request_queue(RECV_QID, NPE_QLEN, 0, 0);
5468 +       if (ret) {
5469 +               qmgr_release_queue(SEND_QID);
5470 +               goto err;
5471 +       }
5472 +       qmgr_set_irq(RECV_QID, QUEUE_IRQ_SRC_NOT_EMPTY, irqhandler, NULL);
5473 +       tasklet_init(&crypto_done_tasklet, crypto_done_action, 0);
5474 +
5475 +       qmgr_enable_irq(RECV_QID);
5476 +       return 0;
5477 +err:
5478 +       if (ctx_pool)
5479 +               dma_pool_destroy(ctx_pool);
5480 +       if (buffer_pool)
5481 +               dma_pool_destroy(buffer_pool);
5482 +       npe_release(npe_c);
5483 +       return ret;
5484 +}
5485 +
5486 +static void release_ixp_crypto(void)
5487 +{
5488 +       qmgr_disable_irq(RECV_QID);
5489 +       tasklet_kill(&crypto_done_tasklet);
5490 +
5491 +       qmgr_release_queue(SEND_QID);
5492 +       qmgr_release_queue(RECV_QID);
5493 +
5494 +       dma_pool_destroy(ctx_pool);
5495 +       dma_pool_destroy(buffer_pool);
5496 +
5497 +       npe_release(npe_c);
5498 +
5499 +       if (crypt_virt) {
5500 +               dma_free_coherent(dev,
5501 +                       NPE_QLEN_TOTAL * sizeof( struct crypt_ctl),
5502 +                       crypt_virt, crypt_phys);
5503 +       }
5504 +       return;
5505 +}
5506 +
5507 +static void reset_sa_dir(struct ix_sa_dir *dir)
5508 +{
5509 +       memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5510 +       dir->npe_ctx_idx = 0;
5511 +       dir->npe_mode = 0;
5512 +}
5513 +
5514 +static int init_sa_dir(struct ix_sa_dir *dir)
5515 +{
5516 +       dir->npe_ctx = dma_pool_alloc(ctx_pool, GFP_KERNEL, &dir->npe_ctx_phys);
5517 +       if (!dir->npe_ctx) {
5518 +               return -ENOMEM;
5519 +       }
5520 +       reset_sa_dir(dir);
5521 +       return 0;
5522 +}
5523 +
5524 +static void free_sa_dir(struct ix_sa_dir *dir)
5525 +{
5526 +       memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5527 +       dma_pool_free(ctx_pool, dir->npe_ctx, dir->npe_ctx_phys);
5528 +}
5529 +
5530 +static int init_tfm(struct crypto_tfm *tfm)
5531 +{
5532 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5533 +       int ret;
5534 +
5535 +       atomic_set(&ctx->configuring, 0);
5536 +       ret = init_sa_dir(&ctx->encrypt);
5537 +       if (ret)
5538 +               return ret;
5539 +       ret = init_sa_dir(&ctx->decrypt);
5540 +       if (ret) {
5541 +               free_sa_dir(&ctx->encrypt);
5542 +       }
5543 +       return ret;
5544 +}
5545 +
5546 +static int init_tfm_ablk(struct crypto_tfm *tfm)
5547 +{
5548 +       tfm->crt_ablkcipher.reqsize = sizeof(struct ablk_ctx);
5549 +       return init_tfm(tfm);
5550 +}
5551 +
5552 +static int init_tfm_aead(struct crypto_tfm *tfm)
5553 +{
5554 +       tfm->crt_aead.reqsize = sizeof(struct aead_ctx);
5555 +       return init_tfm(tfm);
5556 +}
5557 +
5558 +static void exit_tfm(struct crypto_tfm *tfm)
5559 +{
5560 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5561 +       free_sa_dir(&ctx->encrypt);
5562 +       free_sa_dir(&ctx->decrypt);
5563 +}
5564 +
5565 +static int register_chain_var(struct crypto_tfm *tfm, u8 xpad, u32 target,
5566 +               int init_len, u32 ctx_addr, const u8 *key, int key_len)
5567 +{
5568 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5569 +       struct crypt_ctl *crypt;
5570 +       struct buffer_desc *buf;
5571 +       int i;
5572 +       u8 *pad;
5573 +       u32 pad_phys, buf_phys;
5574 +
5575 +       BUILD_BUG_ON(NPE_CTX_LEN < HMAC_PAD_BLOCKLEN);
5576 +       pad = dma_pool_alloc(ctx_pool, GFP_KERNEL, &pad_phys);
5577 +       if (!pad)
5578 +               return -ENOMEM;
5579 +       buf = dma_pool_alloc(buffer_pool, GFP_KERNEL, &buf_phys);
5580 +       if (!buf) {
5581 +               dma_pool_free(ctx_pool, pad, pad_phys);
5582 +               return -ENOMEM;
5583 +       }
5584 +       crypt = get_crypt_desc_emerg();
5585 +       if (!crypt) {
5586 +               dma_pool_free(ctx_pool, pad, pad_phys);
5587 +               dma_pool_free(buffer_pool, buf, buf_phys);
5588 +               return -EAGAIN;
5589 +       }
5590 +
5591 +       memcpy(pad, key, key_len);
5592 +       memset(pad + key_len, 0, HMAC_PAD_BLOCKLEN - key_len);
5593 +       for (i = 0; i < HMAC_PAD_BLOCKLEN; i++) {
5594 +               pad[i] ^= xpad;
5595 +       }
5596 +
5597 +       crypt->data.tfm = tfm;
5598 +       crypt->regist_ptr = pad;
5599 +       crypt->regist_buf = buf;
5600 +
5601 +       crypt->auth_offs = 0;
5602 +       crypt->auth_len = HMAC_PAD_BLOCKLEN;
5603 +       crypt->crypto_ctx = ctx_addr;
5604 +       crypt->src_buf = buf_phys;
5605 +       crypt->icv_rev_aes = target;
5606 +       crypt->mode = NPE_OP_HASH_GEN_ICV;
5607 +       crypt->init_len = init_len;
5608 +       crypt->ctl_flags |= CTL_FLAG_GEN_ICV;
5609 +
5610 +       buf->next = 0;
5611 +       buf->buf_len = HMAC_PAD_BLOCKLEN;
5612 +       buf->pkt_len = 0;
5613 +       buf->phys_addr = pad_phys;
5614 +
5615 +       atomic_inc(&ctx->configuring);
5616 +       qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5617 +       BUG_ON(qmgr_stat_overflow(SEND_QID));
5618 +       return 0;
5619 +}
5620 +
5621 +static int setup_auth(struct crypto_tfm *tfm, int encrypt, unsigned authsize,
5622 +               const u8 *key, int key_len, unsigned digest_len)
5623 +{
5624 +       u32 itarget, otarget, npe_ctx_addr;
5625 +       unsigned char *cinfo;
5626 +       int init_len, ret = 0;
5627 +       u32 cfgword;
5628 +       struct ix_sa_dir *dir;
5629 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5630 +       const struct ix_hash_algo *algo;
5631 +
5632 +       dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5633 +       cinfo = dir->npe_ctx + dir->npe_ctx_idx;
5634 +       algo = ix_hash(tfm);
5635 +
5636 +       /* write cfg word to cryptinfo */
5637 +       cfgword = algo->cfgword | ( authsize << 6); /* (authsize/4) << 8 */
5638 +       *(u32*)cinfo = cpu_to_be32(cfgword);
5639 +       cinfo += sizeof(cfgword);
5640 +
5641 +       /* write ICV to cryptinfo */
5642 +       memcpy(cinfo, algo->icv, digest_len);
5643 +       cinfo += digest_len;
5644 +
5645 +       itarget = dir->npe_ctx_phys + dir->npe_ctx_idx
5646 +                               + sizeof(algo->cfgword);
5647 +       otarget = itarget + digest_len;
5648 +       init_len = cinfo - (dir->npe_ctx + dir->npe_ctx_idx);
5649 +       npe_ctx_addr = dir->npe_ctx_phys + dir->npe_ctx_idx;
5650 +
5651 +       dir->npe_ctx_idx += init_len;
5652 +       dir->npe_mode |= NPE_OP_HASH_ENABLE;
5653 +
5654 +       if (!encrypt)
5655 +               dir->npe_mode |= NPE_OP_HASH_VERIFY;
5656 +
5657 +       ret = register_chain_var(tfm, HMAC_OPAD_VALUE, otarget,
5658 +                       init_len, npe_ctx_addr, key, key_len);
5659 +       if (ret)
5660 +               return ret;
5661 +       return register_chain_var(tfm, HMAC_IPAD_VALUE, itarget,
5662 +                       init_len, npe_ctx_addr, key, key_len);
5663 +}
5664 +
5665 +static int gen_rev_aes_key(struct crypto_tfm *tfm)
5666 +{
5667 +       struct crypt_ctl *crypt;
5668 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5669 +       struct ix_sa_dir *dir = &ctx->decrypt;
5670 +
5671 +       crypt = get_crypt_desc_emerg();
5672 +       if (!crypt) {
5673 +               return -EAGAIN;
5674 +       }
5675 +       *(u32*)dir->npe_ctx |= cpu_to_be32(CIPH_ENCR);
5676 +
5677 +       crypt->data.tfm = tfm;
5678 +       crypt->crypt_offs = 0;
5679 +       crypt->crypt_len = AES_BLOCK128;
5680 +       crypt->src_buf = 0;
5681 +       crypt->crypto_ctx = dir->npe_ctx_phys;
5682 +       crypt->icv_rev_aes = dir->npe_ctx_phys + sizeof(u32);
5683 +       crypt->mode = NPE_OP_ENC_GEN_KEY;
5684 +       crypt->init_len = dir->npe_ctx_idx;
5685 +       crypt->ctl_flags |= CTL_FLAG_GEN_REVAES;
5686 +
5687 +       atomic_inc(&ctx->configuring);
5688 +       qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5689 +       BUG_ON(qmgr_stat_overflow(SEND_QID));
5690 +       return 0;
5691 +}
5692 +
5693 +static int setup_cipher(struct crypto_tfm *tfm, int encrypt,
5694 +               const u8 *key, int key_len)
5695 +{
5696 +       u8 *cinfo;
5697 +       u32 cipher_cfg;
5698 +       u32 keylen_cfg = 0;
5699 +       struct ix_sa_dir *dir;
5700 +       struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5701 +       u32 *flags = &tfm->crt_flags;
5702 +
5703 +       dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5704 +       cinfo = dir->npe_ctx;
5705 +
5706 +       if (encrypt) {
5707 +               cipher_cfg = cipher_cfg_enc(tfm);
5708 +               dir->npe_mode |= NPE_OP_CRYPT_ENCRYPT;
5709 +       } else {
5710 +               cipher_cfg = cipher_cfg_dec(tfm);
5711 +       }
5712 +       if (cipher_cfg & MOD_AES) {
5713 +               switch (key_len) {
5714 +                       case 16: keylen_cfg = MOD_AES128 | KEYLEN_128; break;
5715 +                       case 24: keylen_cfg = MOD_AES192 | KEYLEN_192; break;
5716 +                       case 32: keylen_cfg = MOD_AES256 | KEYLEN_256; break;
5717 +                       default:
5718 +                               *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
5719 +                               return -EINVAL;
5720 +               }
5721 +               cipher_cfg |= keylen_cfg;
5722 +       } else if (cipher_cfg & MOD_3DES) {
5723 +               const u32 *K = (const u32 *)key;
5724 +               if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
5725 +                            !((K[2] ^ K[4]) | (K[3] ^ K[5]))))
5726 +               {
5727 +                       *flags |= CRYPTO_TFM_RES_BAD_KEY_SCHED;
5728 +                       return -EINVAL;
5729 +               }
5730 +       } else {
5731 +               u32 tmp[DES_EXPKEY_WORDS];
5732 +               if (des_ekey(tmp, key) == 0) {
5733 +                       *flags |= CRYPTO_TFM_RES_WEAK_KEY;
5734 +               }
5735 +       }
5736 +       /* write cfg word to cryptinfo */
5737 +       *(u32*)cinfo = cpu_to_be32(cipher_cfg);
5738 +       cinfo += sizeof(cipher_cfg);
5739 +
5740 +       /* write cipher key to cryptinfo */
5741 +       memcpy(cinfo, key, key_len);
5742 +       /* NPE wants keylen set to DES3_EDE_KEY_SIZE even for single DES */
5743 +       if (key_len < DES3_EDE_KEY_SIZE && !(cipher_cfg & MOD_AES)) {
5744 +               memset(cinfo + key_len, 0, DES3_EDE_KEY_SIZE -key_len);
5745 +               key_len = DES3_EDE_KEY_SIZE;
5746 +       }
5747 +       dir->npe_ctx_idx = sizeof(cipher_cfg) + key_len;
5748 +       dir->npe_mode |= NPE_OP_CRYPT_ENABLE;
5749 +       if ((cipher_cfg & MOD_AES) && !encrypt) {
5750 +               return gen_rev_aes_key(tfm);
5751 +       }
5752 +       return 0;
5753 +}
5754 +
5755 +static int count_sg(struct scatterlist *sg, int nbytes)
5756 +{
5757 +       int i;
5758 +       for (i = 0; nbytes > 0; i++, sg = sg_next(sg))
5759 +               nbytes -= sg->length;
5760 +       return i;
5761 +}
5762 +
5763 +static struct buffer_desc *chainup_buffers(struct scatterlist *sg,
5764 +                       unsigned nbytes, struct buffer_desc *buf, gfp_t flags)
5765 +{
5766 +       int nents = 0;
5767 +
5768 +       while (nbytes > 0) {
5769 +               struct buffer_desc *next_buf;
5770 +               u32 next_buf_phys;
5771 +               unsigned len = min(nbytes, sg_dma_len(sg));
5772 +
5773 +               nents++;
5774 +               nbytes -= len;
5775 +               if (!buf->phys_addr) {
5776 +                       buf->phys_addr = sg_dma_address(sg);
5777 +                       buf->buf_len = len;
5778 +                       buf->next = NULL;
5779 +                       buf->phys_next = 0;
5780 +                       goto next;
5781 +               }
5782 +               /* Two consecutive chunks on one page may be handled by the old
5783 +                * buffer descriptor, increased by the length of the new one
5784 +                */
5785 +               if (sg_dma_address(sg) == buf->phys_addr + buf->buf_len) {
5786 +                       buf->buf_len += len;
5787 +                       goto next;
5788 +               }
5789 +               next_buf = dma_pool_alloc(buffer_pool, flags, &next_buf_phys);
5790 +               if (!next_buf)
5791 +                       return NULL;
5792 +               buf->next = next_buf;
5793 +               buf->phys_next = next_buf_phys;
5794 +
5795 +               buf = next_buf;
5796 +               buf->next = NULL;
5797 +               buf->phys_next = 0;
5798 +               buf->phys_addr = sg_dma_address(sg);
5799 +               buf->buf_len = len;
5800 +next:
5801 +               if (nbytes > 0) {
5802 +                       sg = sg_next(sg);
5803 +               }
5804 +       }
5805 +       return buf;
5806 +}
5807 +
5808 +static int ablk_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5809 +                       unsigned int key_len)
5810 +{
5811 +       struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5812 +       u32 *flags = &tfm->base.crt_flags;
5813 +       int ret;
5814 +
5815 +       init_completion(&ctx->completion);
5816 +       atomic_inc(&ctx->configuring);
5817 +
5818 +       reset_sa_dir(&ctx->encrypt);
5819 +       reset_sa_dir(&ctx->decrypt);
5820 +
5821 +       ctx->encrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5822 +       ctx->decrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5823 +
5824 +       ret = setup_cipher(&tfm->base, 0, key, key_len);
5825 +       if (ret)
5826 +               goto out;
5827 +       ret = setup_cipher(&tfm->base, 1, key, key_len);
5828 +       if (ret)
5829 +               goto out;
5830 +
5831 +       if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
5832 +               if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
5833 +                       ret = -EINVAL;
5834 +               } else {
5835 +                       *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
5836 +               }
5837 +       }
5838 +out:
5839 +       if (!atomic_dec_and_test(&ctx->configuring))
5840 +               wait_for_completion(&ctx->completion);
5841 +       return ret;
5842 +}
5843 +
5844 +static int ablk_rfc3686_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5845 +               unsigned int key_len)
5846 +{
5847 +       struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5848 +
5849 +       /* the nonce is stored in bytes at end of key */
5850 +       if (key_len < CTR_RFC3686_NONCE_SIZE)
5851 +               return -EINVAL;
5852 +
5853 +       memcpy(ctx->nonce, key + (key_len - CTR_RFC3686_NONCE_SIZE),
5854 +                       CTR_RFC3686_NONCE_SIZE);
5855 +
5856 +       key_len -= CTR_RFC3686_NONCE_SIZE;
5857 +       return ablk_setkey(tfm, key, key_len);
5858 +}
5859 +
5860 +static int ablk_perform(struct ablkcipher_request *req, int encrypt)
5861 +{
5862 +       struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5863 +       struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5864 +       unsigned ivsize = crypto_ablkcipher_ivsize(tfm);
5865 +       int ret = -ENOMEM;
5866 +       struct ix_sa_dir *dir;
5867 +       struct crypt_ctl *crypt;
5868 +       unsigned int nbytes = req->nbytes, nents;
5869 +       enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5870 +       struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5871 +       gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
5872 +                               GFP_KERNEL : GFP_ATOMIC;
5873 +
5874 +       if (qmgr_stat_full(SEND_QID))
5875 +               return -EAGAIN;
5876 +       if (atomic_read(&ctx->configuring))
5877 +               return -EAGAIN;
5878 +
5879 +       dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5880 +
5881 +       crypt = get_crypt_desc();
5882 +       if (!crypt)
5883 +               return ret;
5884 +
5885 +       crypt->data.ablk_req = req;
5886 +       crypt->crypto_ctx = dir->npe_ctx_phys;
5887 +       crypt->mode = dir->npe_mode;
5888 +       crypt->init_len = dir->npe_ctx_idx;
5889 +
5890 +       crypt->crypt_offs = 0;
5891 +       crypt->crypt_len = nbytes;
5892 +
5893 +       BUG_ON(ivsize && !req->info);
5894 +       memcpy(crypt->iv, req->info, ivsize);
5895 +       if (req->src != req->dst) {
5896 +               crypt->mode |= NPE_OP_NOT_IN_PLACE;
5897 +               nents = count_sg(req->dst, nbytes);
5898 +               /* This was never tested by Intel
5899 +                * for more than one dst buffer, I think. */
5900 +               BUG_ON(nents != 1);
5901 +               req_ctx->dst_nents = nents;
5902 +               dma_map_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5903 +               req_ctx->dst = dma_pool_alloc(buffer_pool, flags,&crypt->dst_buf);
5904 +               if (!req_ctx->dst)
5905 +                       goto unmap_sg_dest;
5906 +               req_ctx->dst->phys_addr = 0;
5907 +               if (!chainup_buffers(req->dst, nbytes, req_ctx->dst, flags))
5908 +                       goto free_buf_dest;
5909 +               src_direction = DMA_TO_DEVICE;
5910 +       } else {
5911 +               req_ctx->dst = NULL;
5912 +               req_ctx->dst_nents = 0;
5913 +       }
5914 +       nents = count_sg(req->src, nbytes);
5915 +       req_ctx->src_nents = nents;
5916 +       dma_map_sg(dev, req->src, nents, src_direction);
5917 +
5918 +       req_ctx->src = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
5919 +       if (!req_ctx->src)
5920 +               goto unmap_sg_src;
5921 +       req_ctx->src->phys_addr = 0;
5922 +       if (!chainup_buffers(req->src, nbytes, req_ctx->src, flags))
5923 +               goto free_buf_src;
5924 +
5925 +       crypt->ctl_flags |= CTL_FLAG_PERFORM_ABLK;
5926 +       qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5927 +       BUG_ON(qmgr_stat_overflow(SEND_QID));
5928 +       return -EINPROGRESS;
5929 +
5930 +free_buf_src:
5931 +       free_buf_chain(req_ctx->src, crypt->src_buf);
5932 +unmap_sg_src:
5933 +       dma_unmap_sg(dev, req->src, req_ctx->src_nents, src_direction);
5934 +free_buf_dest:
5935 +       if (req->src != req->dst) {
5936 +               free_buf_chain(req_ctx->dst, crypt->dst_buf);
5937 +unmap_sg_dest:
5938 +               dma_unmap_sg(dev, req->src, req_ctx->dst_nents,
5939 +                       DMA_FROM_DEVICE);
5940 +       }
5941 +       crypt->ctl_flags = CTL_FLAG_UNUSED;
5942 +       return ret;
5943 +}
5944 +
5945 +static int ablk_encrypt(struct ablkcipher_request *req)
5946 +{
5947 +       return ablk_perform(req, 1);
5948 +}
5949 +
5950 +static int ablk_decrypt(struct ablkcipher_request *req)
5951 +{
5952 +       return ablk_perform(req, 0);
5953 +}
5954 +
5955 +static int ablk_rfc3686_crypt(struct ablkcipher_request *req)
5956 +{
5957 +       struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5958 +       struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5959 +       u8 iv[CTR_RFC3686_BLOCK_SIZE];
5960 +       u8 *info = req->info;
5961 +       int ret;
5962 +
5963 +       /* set up counter block */
5964 +        memcpy(iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
5965 +       memcpy(iv + CTR_RFC3686_NONCE_SIZE, info, CTR_RFC3686_IV_SIZE);
5966 +
5967 +       /* initialize counter portion of counter block */
5968 +       *(__be32 *)(iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
5969 +               cpu_to_be32(1);
5970 +
5971 +       req->info = iv;
5972 +       ret = ablk_perform(req, 1);
5973 +       req->info = info;
5974 +       return ret;
5975 +}
5976 +
5977 +static int hmac_inconsistent(struct scatterlist *sg, unsigned start,
5978 +               unsigned int nbytes)
5979 +{
5980 +       int offset = 0;
5981 +
5982 +       if (!nbytes)
5983 +               return 0;
5984 +
5985 +       for (;;) {
5986 +               if (start < offset + sg->length)
5987 +                       break;
5988 +
5989 +               offset += sg->length;
5990 +               sg = sg_next(sg);
5991 +       }
5992 +       return (start + nbytes > offset + sg->length);
5993 +}
5994 +
5995 +static int aead_perform(struct aead_request *req, int encrypt,
5996 +               int cryptoffset, int eff_cryptlen, u8 *iv)
5997 +{
5998 +       struct crypto_aead *tfm = crypto_aead_reqtfm(req);
5999 +       struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6000 +       unsigned ivsize = crypto_aead_ivsize(tfm);
6001 +       unsigned authsize = crypto_aead_authsize(tfm);
6002 +       int ret = -ENOMEM;
6003 +       struct ix_sa_dir *dir;
6004 +       struct crypt_ctl *crypt;
6005 +       unsigned int cryptlen, nents;
6006 +       struct buffer_desc *buf;
6007 +       struct aead_ctx *req_ctx = aead_request_ctx(req);
6008 +       gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
6009 +                               GFP_KERNEL : GFP_ATOMIC;
6010 +
6011 +       if (qmgr_stat_full(SEND_QID))
6012 +               return -EAGAIN;
6013 +       if (atomic_read(&ctx->configuring))
6014 +               return -EAGAIN;
6015 +
6016 +       if (encrypt) {
6017 +               dir = &ctx->encrypt;
6018 +               cryptlen = req->cryptlen;
6019 +       } else {
6020 +               dir = &ctx->decrypt;
6021 +               /* req->cryptlen includes the authsize when decrypting */
6022 +               cryptlen = req->cryptlen -authsize;
6023 +               eff_cryptlen -= authsize;
6024 +       }
6025 +       crypt = get_crypt_desc();
6026 +       if (!crypt)
6027 +               return ret;
6028 +
6029 +       crypt->data.aead_req = req;
6030 +       crypt->crypto_ctx = dir->npe_ctx_phys;
6031 +       crypt->mode = dir->npe_mode;
6032 +       crypt->init_len = dir->npe_ctx_idx;
6033 +
6034 +       crypt->crypt_offs = cryptoffset;
6035 +       crypt->crypt_len = eff_cryptlen;
6036 +
6037 +       crypt->auth_offs = 0;
6038 +       crypt->auth_len = req->assoclen + ivsize + cryptlen;
6039 +       BUG_ON(ivsize && !req->iv);
6040 +       memcpy(crypt->iv, req->iv, ivsize);
6041 +
6042 +       if (req->src != req->dst) {
6043 +               BUG(); /* -ENOTSUP because of my lazyness */
6044 +       }
6045 +
6046 +       req_ctx->buffer = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
6047 +       if (!req_ctx->buffer)
6048 +               goto out;
6049 +       req_ctx->buffer->phys_addr = 0;
6050 +       /* ASSOC data */
6051 +       nents = count_sg(req->assoc, req->assoclen);
6052 +       req_ctx->assoc_nents = nents;
6053 +       dma_map_sg(dev, req->assoc, nents, DMA_TO_DEVICE);
6054 +       buf = chainup_buffers(req->assoc, req->assoclen, req_ctx->buffer,flags);
6055 +       if (!buf)
6056 +               goto unmap_sg_assoc;
6057 +       /* IV */
6058 +       sg_init_table(&req_ctx->ivlist, 1);
6059 +       sg_set_buf(&req_ctx->ivlist, iv, ivsize);
6060 +       dma_map_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6061 +       buf = chainup_buffers(&req_ctx->ivlist, ivsize, buf, flags);
6062 +       if (!buf)
6063 +               goto unmap_sg_iv;
6064 +       if (unlikely(hmac_inconsistent(req->src, cryptlen, authsize))) {
6065 +               /* The 12 hmac bytes are scattered,
6066 +                * we need to copy them into a safe buffer */
6067 +               req_ctx->hmac_virt = dma_pool_alloc(buffer_pool, flags,
6068 +                               &crypt->icv_rev_aes);
6069 +               if (unlikely(!req_ctx->hmac_virt))
6070 +                       goto unmap_sg_iv;
6071 +               if (!encrypt) {
6072 +                       scatterwalk_map_and_copy(req_ctx->hmac_virt,
6073 +                               req->src, cryptlen, authsize, 0);
6074 +               }
6075 +               req_ctx->encrypt = encrypt;
6076 +       } else {
6077 +               req_ctx->hmac_virt = NULL;
6078 +       }
6079 +       /* Crypt */
6080 +       nents = count_sg(req->src, cryptlen + authsize);
6081 +       req_ctx->src_nents = nents;
6082 +       dma_map_sg(dev, req->src, nents, DMA_BIDIRECTIONAL);
6083 +       buf = chainup_buffers(req->src, cryptlen + authsize, buf, flags);
6084 +       if (!buf)
6085 +               goto unmap_sg_src;
6086 +       if (!req_ctx->hmac_virt) {
6087 +               crypt->icv_rev_aes = buf->phys_addr + buf->buf_len - authsize;
6088 +       }
6089 +       crypt->ctl_flags |= CTL_FLAG_PERFORM_AEAD;
6090 +       qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
6091 +       BUG_ON(qmgr_stat_overflow(SEND_QID));
6092 +       return -EINPROGRESS;
6093 +unmap_sg_src:
6094 +       dma_unmap_sg(dev, req->src, req_ctx->src_nents, DMA_BIDIRECTIONAL);
6095 +       if (req_ctx->hmac_virt) {
6096 +               dma_pool_free(buffer_pool, req_ctx->hmac_virt,
6097 +                               crypt->icv_rev_aes);
6098 +       }
6099 +unmap_sg_iv:
6100 +       dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6101 +unmap_sg_assoc:
6102 +       dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents, DMA_TO_DEVICE);
6103 +       free_buf_chain(req_ctx->buffer, crypt->src_buf);
6104 +out:
6105 +       crypt->ctl_flags = CTL_FLAG_UNUSED;
6106 +       return ret;
6107 +}
6108 +
6109 +static int aead_setup(struct crypto_aead *tfm, unsigned int authsize)
6110 +{
6111 +       struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6112 +       u32 *flags = &tfm->base.crt_flags;
6113 +       unsigned digest_len = crypto_aead_alg(tfm)->maxauthsize;
6114 +       int ret;
6115 +
6116 +       if (!ctx->enckey_len && !ctx->authkey_len)
6117 +               return 0;
6118 +       init_completion(&ctx->completion);
6119 +       atomic_inc(&ctx->configuring);
6120 +
6121 +       reset_sa_dir(&ctx->encrypt);
6122 +       reset_sa_dir(&ctx->decrypt);
6123 +
6124 +       ret = setup_cipher(&tfm->base, 0, ctx->enckey, ctx->enckey_len);
6125 +       if (ret)
6126 +               goto out;
6127 +       ret = setup_cipher(&tfm->base, 1, ctx->enckey, ctx->enckey_len);
6128 +       if (ret)
6129 +               goto out;
6130 +       ret = setup_auth(&tfm->base, 0, authsize, ctx->authkey,
6131 +                       ctx->authkey_len, digest_len);
6132 +       if (ret)
6133 +               goto out;
6134 +       ret = setup_auth(&tfm->base, 1, authsize,  ctx->authkey,
6135 +                       ctx->authkey_len, digest_len);
6136 +       if (ret)
6137 +               goto out;
6138 +
6139 +       if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
6140 +               if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
6141 +                       ret = -EINVAL;
6142 +                       goto out;
6143 +               } else {
6144 +                       *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
6145 +               }
6146 +       }
6147 +out:
6148 +       if (!atomic_dec_and_test(&ctx->configuring))
6149 +               wait_for_completion(&ctx->completion);
6150 +       return ret;
6151 +}
6152 +
6153 +static int aead_setauthsize(struct crypto_aead *tfm, unsigned int authsize)
6154 +{
6155 +       int max = crypto_aead_alg(tfm)->maxauthsize >> 2;
6156 +
6157 +       if ((authsize>>2) < 1 || (authsize>>2) > max || (authsize & 3))
6158 +               return -EINVAL;
6159 +       return aead_setup(tfm, authsize);
6160 +}
6161 +
6162 +static int aead_setkey(struct crypto_aead *tfm, const u8 *key,
6163 +                       unsigned int keylen)
6164 +{
6165 +       struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6166 +       struct rtattr *rta = (struct rtattr *)key;
6167 +       struct crypto_authenc_key_param *param;
6168 +
6169 +       if (!RTA_OK(rta, keylen))
6170 +               goto badkey;
6171 +       if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
6172 +               goto badkey;
6173 +       if (RTA_PAYLOAD(rta) < sizeof(*param))
6174 +               goto badkey;
6175 +
6176 +       param = RTA_DATA(rta);
6177 +       ctx->enckey_len = be32_to_cpu(param->enckeylen);
6178 +
6179 +       key += RTA_ALIGN(rta->rta_len);
6180 +       keylen -= RTA_ALIGN(rta->rta_len);
6181 +
6182 +       if (keylen < ctx->enckey_len)
6183 +               goto badkey;
6184 +
6185 +       ctx->authkey_len = keylen - ctx->enckey_len;
6186 +       memcpy(ctx->enckey, key + ctx->authkey_len, ctx->enckey_len);
6187 +       memcpy(ctx->authkey, key, ctx->authkey_len);
6188 +
6189 +       return aead_setup(tfm, crypto_aead_authsize(tfm));
6190 +badkey:
6191 +       ctx->enckey_len = 0;
6192 +       crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
6193 +       return -EINVAL;
6194 +}
6195 +
6196 +static int aead_encrypt(struct aead_request *req)
6197 +{
6198 +       unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6199 +       return aead_perform(req, 1, req->assoclen + ivsize,
6200 +                       req->cryptlen, req->iv);
6201 +}
6202 +
6203 +static int aead_decrypt(struct aead_request *req)
6204 +{
6205 +       unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6206 +       return aead_perform(req, 0, req->assoclen + ivsize,
6207 +                       req->cryptlen, req->iv);
6208 +}
6209 +
6210 +static int aead_givencrypt(struct aead_givcrypt_request *req)
6211 +{
6212 +       struct crypto_aead *tfm = aead_givcrypt_reqtfm(req);
6213 +       struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6214 +       unsigned len, ivsize = crypto_aead_ivsize(tfm);
6215 +       __be64 seq;
6216 +
6217 +       /* copied from eseqiv.c */
6218 +       if (!ctx->salted) {
6219 +               get_random_bytes(ctx->salt, ivsize);
6220 +               ctx->salted = 1;
6221 +       }
6222 +       memcpy(req->areq.iv, ctx->salt, ivsize);
6223 +       len = ivsize;
6224 +       if (ivsize > sizeof(u64)) {
6225 +               memset(req->giv, 0, ivsize - sizeof(u64));
6226 +               len = sizeof(u64);
6227 +       }
6228 +       seq = cpu_to_be64(req->seq);
6229 +       memcpy(req->giv + ivsize - len, &seq, len);
6230 +       return aead_perform(&req->areq, 1, req->areq.assoclen,
6231 +                       req->areq.cryptlen +ivsize, req->giv);
6232 +}
6233 +
6234 +static struct ixp_alg ixp4xx_algos[] = {
6235 +{
6236 +       .crypto = {
6237 +               .cra_name       = "cbc(des)",
6238 +               .cra_blocksize  = DES_BLOCK_SIZE,
6239 +               .cra_u          = { .ablkcipher = {
6240 +                       .min_keysize    = DES_KEY_SIZE,
6241 +                       .max_keysize    = DES_KEY_SIZE,
6242 +                       .ivsize         = DES_BLOCK_SIZE,
6243 +                       .geniv          = "eseqiv",
6244 +                       }
6245 +               }
6246 +       },
6247 +       .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6248 +       .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6249 +
6250 +}, {
6251 +       .crypto = {
6252 +               .cra_name       = "ecb(des)",
6253 +               .cra_blocksize  = DES_BLOCK_SIZE,
6254 +               .cra_u          = { .ablkcipher = {
6255 +                       .min_keysize    = DES_KEY_SIZE,
6256 +                       .max_keysize    = DES_KEY_SIZE,
6257 +                       }
6258 +               }
6259 +       },
6260 +       .cfg_enc = CIPH_ENCR | MOD_DES | MOD_ECB | KEYLEN_192,
6261 +       .cfg_dec = CIPH_DECR | MOD_DES | MOD_ECB | KEYLEN_192,
6262 +}, {
6263 +       .crypto = {
6264 +               .cra_name       = "cbc(des3_ede)",
6265 +               .cra_blocksize  = DES3_EDE_BLOCK_SIZE,
6266 +               .cra_u          = { .ablkcipher = {
6267 +                       .min_keysize    = DES3_EDE_KEY_SIZE,
6268 +                       .max_keysize    = DES3_EDE_KEY_SIZE,
6269 +                       .ivsize         = DES3_EDE_BLOCK_SIZE,
6270 +                       .geniv          = "eseqiv",
6271 +                       }
6272 +               }
6273 +       },
6274 +       .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6275 +       .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6276 +}, {
6277 +       .crypto = {
6278 +               .cra_name       = "ecb(des3_ede)",
6279 +               .cra_blocksize  = DES3_EDE_BLOCK_SIZE,
6280 +               .cra_u          = { .ablkcipher = {
6281 +                       .min_keysize    = DES3_EDE_KEY_SIZE,
6282 +                       .max_keysize    = DES3_EDE_KEY_SIZE,
6283 +                       }
6284 +               }
6285 +       },
6286 +       .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_ECB | KEYLEN_192,
6287 +       .cfg_dec = CIPH_DECR | MOD_3DES | MOD_ECB | KEYLEN_192,
6288 +}, {
6289 +       .crypto = {
6290 +               .cra_name       = "cbc(aes)",
6291 +               .cra_blocksize  = AES_BLOCK_SIZE,
6292 +               .cra_u          = { .ablkcipher = {
6293 +                       .min_keysize    = AES_MIN_KEY_SIZE,
6294 +                       .max_keysize    = AES_MAX_KEY_SIZE,
6295 +                       .ivsize         = AES_BLOCK_SIZE,
6296 +                       .geniv          = "eseqiv",
6297 +                       }
6298 +               }
6299 +       },
6300 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6301 +       .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6302 +}, {
6303 +       .crypto = {
6304 +               .cra_name       = "ecb(aes)",
6305 +               .cra_blocksize  = AES_BLOCK_SIZE,
6306 +               .cra_u          = { .ablkcipher = {
6307 +                       .min_keysize    = AES_MIN_KEY_SIZE,
6308 +                       .max_keysize    = AES_MAX_KEY_SIZE,
6309 +                       }
6310 +               }
6311 +       },
6312 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_ECB,
6313 +       .cfg_dec = CIPH_DECR | MOD_AES | MOD_ECB,
6314 +}, {
6315 +       .crypto = {
6316 +               .cra_name       = "ctr(aes)",
6317 +               .cra_blocksize  = AES_BLOCK_SIZE,
6318 +               .cra_u          = { .ablkcipher = {
6319 +                       .min_keysize    = AES_MIN_KEY_SIZE,
6320 +                       .max_keysize    = AES_MAX_KEY_SIZE,
6321 +                       .ivsize         = AES_BLOCK_SIZE,
6322 +                       .geniv          = "eseqiv",
6323 +                       }
6324 +               }
6325 +       },
6326 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6327 +       .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6328 +}, {
6329 +       .crypto = {
6330 +               .cra_name       = "rfc3686(ctr(aes))",
6331 +               .cra_blocksize  = AES_BLOCK_SIZE,
6332 +               .cra_u          = { .ablkcipher = {
6333 +                       .min_keysize    = AES_MIN_KEY_SIZE,
6334 +                       .max_keysize    = AES_MAX_KEY_SIZE,
6335 +                       .ivsize         = AES_BLOCK_SIZE,
6336 +                       .geniv          = "eseqiv",
6337 +                       .setkey         = ablk_rfc3686_setkey,
6338 +                       .encrypt        = ablk_rfc3686_crypt,
6339 +                       .decrypt        = ablk_rfc3686_crypt }
6340 +               }
6341 +       },
6342 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6343 +       .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6344 +}, {
6345 +       .crypto = {
6346 +               .cra_name       = "authenc(hmac(md5),cbc(des))",
6347 +               .cra_blocksize  = DES_BLOCK_SIZE,
6348 +               .cra_u          = { .aead = {
6349 +                       .ivsize         = DES_BLOCK_SIZE,
6350 +                       .maxauthsize    = MD5_DIGEST_SIZE,
6351 +                       }
6352 +               }
6353 +       },
6354 +       .hash = &hash_alg_md5,
6355 +       .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6356 +       .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6357 +}, {
6358 +       .crypto = {
6359 +               .cra_name       = "authenc(hmac(md5),cbc(des3_ede))",
6360 +               .cra_blocksize  = DES3_EDE_BLOCK_SIZE,
6361 +               .cra_u          = { .aead = {
6362 +                       .ivsize         = DES3_EDE_BLOCK_SIZE,
6363 +                       .maxauthsize    = MD5_DIGEST_SIZE,
6364 +                       }
6365 +               }
6366 +       },
6367 +       .hash = &hash_alg_md5,
6368 +       .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6369 +       .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6370 +}, {
6371 +       .crypto = {
6372 +               .cra_name       = "authenc(hmac(sha1),cbc(des))",
6373 +               .cra_blocksize  = DES_BLOCK_SIZE,
6374 +               .cra_u          = { .aead = {
6375 +                       .ivsize         = DES_BLOCK_SIZE,
6376 +                       .maxauthsize    = SHA1_DIGEST_SIZE,
6377 +                       }
6378 +               }
6379 +       },
6380 +       .hash = &hash_alg_sha1,
6381 +       .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6382 +       .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6383 +}, {
6384 +       .crypto = {
6385 +               .cra_name       = "authenc(hmac(sha1),cbc(des3_ede))",
6386 +               .cra_blocksize  = DES3_EDE_BLOCK_SIZE,
6387 +               .cra_u          = { .aead = {
6388 +                       .ivsize         = DES3_EDE_BLOCK_SIZE,
6389 +                       .maxauthsize    = SHA1_DIGEST_SIZE,
6390 +                       }
6391 +               }
6392 +       },
6393 +       .hash = &hash_alg_sha1,
6394 +       .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6395 +       .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6396 +}, {
6397 +       .crypto = {
6398 +               .cra_name       = "authenc(hmac(md5),cbc(aes))",
6399 +               .cra_blocksize  = AES_BLOCK_SIZE,
6400 +               .cra_u          = { .aead = {
6401 +                       .ivsize         = AES_BLOCK_SIZE,
6402 +                       .maxauthsize    = MD5_DIGEST_SIZE,
6403 +                       }
6404 +               }
6405 +       },
6406 +       .hash = &hash_alg_md5,
6407 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6408 +       .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6409 +}, {
6410 +       .crypto = {
6411 +               .cra_name       = "authenc(hmac(sha1),cbc(aes))",
6412 +               .cra_blocksize  = AES_BLOCK_SIZE,
6413 +               .cra_u          = { .aead = {
6414 +                       .ivsize         = AES_BLOCK_SIZE,
6415 +                       .maxauthsize    = SHA1_DIGEST_SIZE,
6416 +                       }
6417 +               }
6418 +       },
6419 +       .hash = &hash_alg_sha1,
6420 +       .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6421 +       .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6422 +} };
6423 +
6424 +#define IXP_POSTFIX "-ixp4xx"
6425 +static int __init ixp_module_init(void)
6426 +{
6427 +       int num = ARRAY_SIZE(ixp4xx_algos);
6428 +       int i,err ;
6429 +
6430 +       if (platform_device_register(&pseudo_dev))
6431 +               return -ENODEV;
6432 +
6433 +       spin_lock_init(&desc_lock);
6434 +       spin_lock_init(&emerg_lock);
6435 +
6436 +       err = init_ixp_crypto();
6437 +       if (err) {
6438 +               platform_device_unregister(&pseudo_dev);
6439 +               return err;
6440 +       }
6441 +       for (i=0; i< num; i++) {
6442 +               struct crypto_alg *cra = &ixp4xx_algos[i].crypto;
6443 +
6444 +               if (snprintf(cra->cra_driver_name, CRYPTO_MAX_ALG_NAME,
6445 +                       "%s"IXP_POSTFIX, cra->cra_name) >=
6446 +                       CRYPTO_MAX_ALG_NAME)
6447 +               {
6448 +                       continue;
6449 +               }
6450 +               if (!support_aes && (ixp4xx_algos[i].cfg_enc & MOD_AES)) {
6451 +                       continue;
6452 +               }
6453 +               if (!ixp4xx_algos[i].hash) {
6454 +                       /* block ciphers */
6455 +                       cra->cra_type = &crypto_ablkcipher_type;
6456 +                       cra->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
6457 +                                        CRYPTO_ALG_ASYNC;
6458 +                       if (!cra->cra_ablkcipher.setkey)
6459 +                               cra->cra_ablkcipher.setkey = ablk_setkey;
6460 +                       if (!cra->cra_ablkcipher.encrypt)
6461 +                               cra->cra_ablkcipher.encrypt = ablk_encrypt;
6462 +                       if (!cra->cra_ablkcipher.decrypt)
6463 +                               cra->cra_ablkcipher.decrypt = ablk_decrypt;
6464 +                       cra->cra_init = init_tfm_ablk;
6465 +               } else {
6466 +                       /* authenc */
6467 +                       cra->cra_type = &crypto_aead_type;
6468 +                       cra->cra_flags = CRYPTO_ALG_TYPE_AEAD |
6469 +                                        CRYPTO_ALG_ASYNC;
6470 +                       cra->cra_aead.setkey = aead_setkey;
6471 +                       cra->cra_aead.setauthsize = aead_setauthsize;
6472 +                       cra->cra_aead.encrypt = aead_encrypt;
6473 +                       cra->cra_aead.decrypt = aead_decrypt;
6474 +                       cra->cra_aead.givencrypt = aead_givencrypt;
6475 +                       cra->cra_init = init_tfm_aead;
6476 +               }
6477 +               cra->cra_ctxsize = sizeof(struct ixp_ctx);
6478 +               cra->cra_module = THIS_MODULE;
6479 +               cra->cra_alignmask = 3;
6480 +               cra->cra_priority = 300;
6481 +               cra->cra_exit = exit_tfm;
6482 +               if (crypto_register_alg(cra))
6483 +                       printk(KERN_ERR "Failed to register '%s'\n",
6484 +                               cra->cra_name);
6485 +               else
6486 +                       ixp4xx_algos[i].registered = 1;
6487 +       }
6488 +       return 0;
6489 +}
6490 +
6491 +static void __exit ixp_module_exit(void)
6492 +{
6493 +       int num = ARRAY_SIZE(ixp4xx_algos);
6494 +       int i;
6495 +
6496 +       for (i=0; i< num; i++) {
6497 +               if (ixp4xx_algos[i].registered)
6498 +                       crypto_unregister_alg(&ixp4xx_algos[i].crypto);
6499 +       }
6500 +       release_ixp_crypto();
6501 +       platform_device_unregister(&pseudo_dev);
6502 +}
6503 +
6504 +module_init(ixp_module_init);
6505 +module_exit(ixp_module_exit);
6506 +
6507 +MODULE_LICENSE("GPL");
6508 +MODULE_AUTHOR("Christian Hohnstaedt <chohnstaedt@innominate.com>");
6509 +MODULE_DESCRIPTION("IXP4xx hardware crypto");
6510 +
6511 --- a/drivers/crypto/padlock-aes.c
6512 +++ b/drivers/crypto/padlock-aes.c
6513 @@ -411,12 +411,12 @@
6514         int ret;
6515  
6516         if (!cpu_has_xcrypt) {
6517 -               printk(KERN_ERR PFX "VIA PadLock not detected.\n");
6518 +               printk(KERN_NOTICE PFX "VIA PadLock not detected.\n");
6519                 return -ENODEV;
6520         }
6521  
6522         if (!cpu_has_xcrypt_enabled) {
6523 -               printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6524 +               printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6525                 return -ENODEV;
6526         }
6527  
6528 --- a/drivers/crypto/padlock-sha.c
6529 +++ b/drivers/crypto/padlock-sha.c
6530 @@ -263,12 +263,12 @@
6531         int rc = -ENODEV;
6532  
6533         if (!cpu_has_phe) {
6534 -               printk(KERN_ERR PFX "VIA PadLock Hash Engine not detected.\n");
6535 +               printk(KERN_NOTICE PFX "VIA PadLock Hash Engine not detected.\n");
6536                 return -ENODEV;
6537         }
6538  
6539         if (!cpu_has_phe_enabled) {
6540 -               printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6541 +               printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6542                 return -ENODEV;
6543         }
6544  
6545 --- /dev/null
6546 +++ b/drivers/crypto/talitos.c
6547 @@ -0,0 +1,1597 @@
6548 +/*
6549 + * talitos - Freescale Integrated Security Engine (SEC) device driver
6550 + *
6551 + * Copyright (c) 2008 Freescale Semiconductor, Inc.
6552 + *
6553 + * Scatterlist Crypto API glue code copied from files with the following:
6554 + * Copyright (c) 2006-2007 Herbert Xu <herbert@gondor.apana.org.au>
6555 + *
6556 + * Crypto algorithm registration code copied from hifn driver:
6557 + * 2007+ Copyright (c) Evgeniy Polyakov <johnpol@2ka.mipt.ru>
6558 + * All rights reserved.
6559 + *
6560 + * This program is free software; you can redistribute it and/or modify
6561 + * it under the terms of the GNU General Public License as published by
6562 + * the Free Software Foundation; either version 2 of the License, or
6563 + * (at your option) any later version.
6564 + *
6565 + * This program is distributed in the hope that it will be useful,
6566 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6567 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
6568 + * GNU General Public License for more details.
6569 + *
6570 + * You should have received a copy of the GNU General Public License
6571 + * along with this program; if not, write to the Free Software
6572 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
6573 + */
6574 +
6575 +#include <linux/kernel.h>
6576 +#include <linux/module.h>
6577 +#include <linux/mod_devicetable.h>
6578 +#include <linux/device.h>
6579 +#include <linux/interrupt.h>
6580 +#include <linux/crypto.h>
6581 +#include <linux/hw_random.h>
6582 +#include <linux/of_platform.h>
6583 +#include <linux/dma-mapping.h>
6584 +#include <linux/io.h>
6585 +#include <linux/spinlock.h>
6586 +#include <linux/rtnetlink.h>
6587 +
6588 +#include <crypto/algapi.h>
6589 +#include <crypto/aes.h>
6590 +#include <crypto/des.h>
6591 +#include <crypto/sha.h>
6592 +#include <crypto/aead.h>
6593 +#include <crypto/authenc.h>
6594 +
6595 +#include "talitos.h"
6596 +
6597 +#define TALITOS_TIMEOUT 100000
6598 +#define TALITOS_MAX_DATA_LEN 65535
6599 +
6600 +#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
6601 +#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
6602 +#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
6603 +
6604 +/* descriptor pointer entry */
6605 +struct talitos_ptr {
6606 +       __be16 len;     /* length */
6607 +       u8 j_extent;    /* jump to sg link table and/or extent */
6608 +       u8 eptr;        /* extended address */
6609 +       __be32 ptr;     /* address */
6610 +};
6611 +
6612 +/* descriptor */
6613 +struct talitos_desc {
6614 +       __be32 hdr;                     /* header high bits */
6615 +       __be32 hdr_lo;                  /* header low bits */
6616 +       struct talitos_ptr ptr[7];      /* ptr/len pair array */
6617 +};
6618 +
6619 +/**
6620 + * talitos_request - descriptor submission request
6621 + * @desc: descriptor pointer (kernel virtual)
6622 + * @dma_desc: descriptor's physical bus address
6623 + * @callback: whom to call when descriptor processing is done
6624 + * @context: caller context (optional)
6625 + */
6626 +struct talitos_request {
6627 +       struct talitos_desc *desc;
6628 +       dma_addr_t dma_desc;
6629 +       void (*callback) (struct device *dev, struct talitos_desc *desc,
6630 +                         void *context, int error);
6631 +       void *context;
6632 +};
6633 +
6634 +struct talitos_private {
6635 +       struct device *dev;
6636 +       struct of_device *ofdev;
6637 +       void __iomem *reg;
6638 +       int irq;
6639 +
6640 +       /* SEC version geometry (from device tree node) */
6641 +       unsigned int num_channels;
6642 +       unsigned int chfifo_len;
6643 +       unsigned int exec_units;
6644 +       unsigned int desc_types;
6645 +
6646 +       /* next channel to be assigned next incoming descriptor */
6647 +       atomic_t last_chan;
6648 +
6649 +       /* per-channel request fifo */
6650 +       struct talitos_request **fifo;
6651 +
6652 +       /*
6653 +        * length of the request fifo
6654 +        * fifo_len is chfifo_len rounded up to next power of 2
6655 +        * so we can use bitwise ops to wrap
6656 +        */
6657 +       unsigned int fifo_len;
6658 +
6659 +       /* per-channel index to next free descriptor request */
6660 +       int *head;
6661 +
6662 +       /* per-channel index to next in-progress/done descriptor request */
6663 +       int *tail;
6664 +
6665 +       /* per-channel request submission (head) and release (tail) locks */
6666 +       spinlock_t *head_lock;
6667 +       spinlock_t *tail_lock;
6668 +
6669 +       /* request callback tasklet */
6670 +       struct tasklet_struct done_task;
6671 +       struct tasklet_struct error_task;
6672 +
6673 +       /* list of registered algorithms */
6674 +       struct list_head alg_list;
6675 +
6676 +       /* hwrng device */
6677 +       struct hwrng rng;
6678 +};
6679 +
6680 +/*
6681 + * map virtual single (contiguous) pointer to h/w descriptor pointer
6682 + */
6683 +static void map_single_talitos_ptr(struct device *dev,
6684 +                                  struct talitos_ptr *talitos_ptr,
6685 +                                  unsigned short len, void *data,
6686 +                                  unsigned char extent,
6687 +                                  enum dma_data_direction dir)
6688 +{
6689 +       talitos_ptr->len = cpu_to_be16(len);
6690 +       talitos_ptr->ptr = cpu_to_be32(dma_map_single(dev, data, len, dir));
6691 +       talitos_ptr->j_extent = extent;
6692 +}
6693 +
6694 +/*
6695 + * unmap bus single (contiguous) h/w descriptor pointer
6696 + */
6697 +static void unmap_single_talitos_ptr(struct device *dev,
6698 +                                    struct talitos_ptr *talitos_ptr,
6699 +                                    enum dma_data_direction dir)
6700 +{
6701 +       dma_unmap_single(dev, be32_to_cpu(talitos_ptr->ptr),
6702 +                        be16_to_cpu(talitos_ptr->len), dir);
6703 +}
6704 +
6705 +static int reset_channel(struct device *dev, int ch)
6706 +{
6707 +       struct talitos_private *priv = dev_get_drvdata(dev);
6708 +       unsigned int timeout = TALITOS_TIMEOUT;
6709 +
6710 +       setbits32(priv->reg + TALITOS_CCCR(ch), TALITOS_CCCR_RESET);
6711 +
6712 +       while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & TALITOS_CCCR_RESET)
6713 +              && --timeout)
6714 +               cpu_relax();
6715 +
6716 +       if (timeout == 0) {
6717 +               dev_err(dev, "failed to reset channel %d\n", ch);
6718 +               return -EIO;
6719 +       }
6720 +
6721 +       /* set done writeback and IRQ */
6722 +       setbits32(priv->reg + TALITOS_CCCR_LO(ch), TALITOS_CCCR_LO_CDWE |
6723 +                 TALITOS_CCCR_LO_CDIE);
6724 +
6725 +       return 0;
6726 +}
6727 +
6728 +static int reset_device(struct device *dev)
6729 +{
6730 +       struct talitos_private *priv = dev_get_drvdata(dev);
6731 +       unsigned int timeout = TALITOS_TIMEOUT;
6732 +
6733 +       setbits32(priv->reg + TALITOS_MCR, TALITOS_MCR_SWR);
6734 +
6735 +       while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR)
6736 +              && --timeout)
6737 +               cpu_relax();
6738 +
6739 +       if (timeout == 0) {
6740 +               dev_err(dev, "failed to reset device\n");
6741 +               return -EIO;
6742 +       }
6743 +
6744 +       return 0;
6745 +}
6746 +
6747 +/*
6748 + * Reset and initialize the device
6749 + */
6750 +static int init_device(struct device *dev)
6751 +{
6752 +       struct talitos_private *priv = dev_get_drvdata(dev);
6753 +       int ch, err;
6754 +
6755 +       /*
6756 +        * Master reset
6757 +        * errata documentation: warning: certain SEC interrupts
6758 +        * are not fully cleared by writing the MCR:SWR bit,
6759 +        * set bit twice to completely reset
6760 +        */
6761 +       err = reset_device(dev);
6762 +       if (err)
6763 +               return err;
6764 +
6765 +       err = reset_device(dev);
6766 +       if (err)
6767 +               return err;
6768 +
6769 +       /* reset channels */
6770 +       for (ch = 0; ch < priv->num_channels; ch++) {
6771 +               err = reset_channel(dev, ch);
6772 +               if (err)
6773 +                       return err;
6774 +       }
6775 +
6776 +       /* enable channel done and error interrupts */
6777 +       setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
6778 +       setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
6779 +
6780 +       return 0;
6781 +}
6782 +
6783 +/**
6784 + * talitos_submit - submits a descriptor to the device for processing
6785 + * @dev:       the SEC device to be used
6786 + * @desc:      the descriptor to be processed by the device
6787 + * @callback:  whom to call when processing is complete
6788 + * @context:   a handle for use by caller (optional)
6789 + *
6790 + * desc must contain valid dma-mapped (bus physical) address pointers.
6791 + * callback must check err and feedback in descriptor header
6792 + * for device processing status.
6793 + */
6794 +static int talitos_submit(struct device *dev, struct talitos_desc *desc,
6795 +                         void (*callback)(struct device *dev,
6796 +                                          struct talitos_desc *desc,
6797 +                                          void *context, int error),
6798 +                         void *context)
6799 +{
6800 +       struct talitos_private *priv = dev_get_drvdata(dev);
6801 +       struct talitos_request *request;
6802 +       unsigned long flags, ch;
6803 +       int head;
6804 +
6805 +       /* select done notification */
6806 +       desc->hdr |= DESC_HDR_DONE_NOTIFY;
6807 +
6808 +       /* emulate SEC's round-robin channel fifo polling scheme */
6809 +       ch = atomic_inc_return(&priv->last_chan) & (priv->num_channels - 1);
6810 +
6811 +       spin_lock_irqsave(&priv->head_lock[ch], flags);
6812 +
6813 +       head = priv->head[ch];
6814 +       request = &priv->fifo[ch][head];
6815 +
6816 +       if (request->desc) {
6817 +               /* request queue is full */
6818 +               spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6819 +               return -EAGAIN;
6820 +       }
6821 +
6822 +       /* map descriptor and save caller data */
6823 +       request->dma_desc = dma_map_single(dev, desc, sizeof(*desc),
6824 +                                          DMA_BIDIRECTIONAL);
6825 +       request->callback = callback;
6826 +       request->context = context;
6827 +
6828 +       /* increment fifo head */
6829 +       priv->head[ch] = (priv->head[ch] + 1) & (priv->fifo_len - 1);
6830 +
6831 +       smp_wmb();
6832 +       request->desc = desc;
6833 +
6834 +       /* GO! */
6835 +       wmb();
6836 +       out_be32(priv->reg + TALITOS_FF_LO(ch), request->dma_desc);
6837 +
6838 +       spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6839 +
6840 +       return -EINPROGRESS;
6841 +}
6842 +
6843 +/*
6844 + * process what was done, notify callback of error if not
6845 + */
6846 +static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
6847 +{
6848 +       struct talitos_private *priv = dev_get_drvdata(dev);
6849 +       struct talitos_request *request, saved_req;
6850 +       unsigned long flags;
6851 +       int tail, status;
6852 +
6853 +       spin_lock_irqsave(&priv->tail_lock[ch], flags);
6854 +
6855 +       tail = priv->tail[ch];
6856 +       while (priv->fifo[ch][tail].desc) {
6857 +               request = &priv->fifo[ch][tail];
6858 +
6859 +               /* descriptors with their done bits set don't get the error */
6860 +               rmb();
6861 +               if ((request->desc->hdr & DESC_HDR_DONE) == DESC_HDR_DONE)
6862 +                       status = 0;
6863 +               else
6864 +                       if (!error)
6865 +                               break;
6866 +                       else
6867 +                               status = error;
6868 +
6869 +               dma_unmap_single(dev, request->dma_desc,
6870 +                       sizeof(struct talitos_desc), DMA_BIDIRECTIONAL);
6871 +
6872 +               /* copy entries so we can call callback outside lock */
6873 +               saved_req.desc = request->desc;
6874 +               saved_req.callback = request->callback;
6875 +               saved_req.context = request->context;
6876 +
6877 +               /* release request entry in fifo */
6878 +               smp_wmb();
6879 +               request->desc = NULL;
6880 +
6881 +               /* increment fifo tail */
6882 +               priv->tail[ch] = (tail + 1) & (priv->fifo_len - 1);
6883 +
6884 +               spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6885 +               saved_req.callback(dev, saved_req.desc, saved_req.context,
6886 +                                  status);
6887 +               /* channel may resume processing in single desc error case */
6888 +               if (error && !reset_ch && status == error)
6889 +                       return;
6890 +               spin_lock_irqsave(&priv->tail_lock[ch], flags);
6891 +               tail = priv->tail[ch];
6892 +       }
6893 +
6894 +       spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6895 +}
6896 +
6897 +/*
6898 + * process completed requests for channels that have done status
6899 + */
6900 +static void talitos_done(unsigned long data)
6901 +{
6902 +       struct device *dev = (struct device *)data;
6903 +       struct talitos_private *priv = dev_get_drvdata(dev);
6904 +       int ch;
6905 +
6906 +       for (ch = 0; ch < priv->num_channels; ch++)
6907 +               flush_channel(dev, ch, 0, 0);
6908 +}
6909 +
6910 +/*
6911 + * locate current (offending) descriptor
6912 + */
6913 +static struct talitos_desc *current_desc(struct device *dev, int ch)
6914 +{
6915 +       struct talitos_private *priv = dev_get_drvdata(dev);
6916 +       int tail = priv->tail[ch];
6917 +       dma_addr_t cur_desc;
6918 +
6919 +       cur_desc = in_be32(priv->reg + TALITOS_CDPR_LO(ch));
6920 +
6921 +       while (priv->fifo[ch][tail].dma_desc != cur_desc) {
6922 +               tail = (tail + 1) & (priv->fifo_len - 1);
6923 +               if (tail == priv->tail[ch]) {
6924 +                       dev_err(dev, "couldn't locate current descriptor\n");
6925 +                       return NULL;
6926 +               }
6927 +       }
6928 +
6929 +       return priv->fifo[ch][tail].desc;
6930 +}
6931 +
6932 +/*
6933 + * user diagnostics; report root cause of error based on execution unit status
6934 + */
6935 +static void report_eu_error(struct device *dev, int ch, struct talitos_desc *desc)
6936 +{
6937 +       struct talitos_private *priv = dev_get_drvdata(dev);
6938 +       int i;
6939 +
6940 +       switch (desc->hdr & DESC_HDR_SEL0_MASK) {
6941 +       case DESC_HDR_SEL0_AFEU:
6942 +               dev_err(dev, "AFEUISR 0x%08x_%08x\n",
6943 +                       in_be32(priv->reg + TALITOS_AFEUISR),
6944 +                       in_be32(priv->reg + TALITOS_AFEUISR_LO));
6945 +               break;
6946 +       case DESC_HDR_SEL0_DEU:
6947 +               dev_err(dev, "DEUISR 0x%08x_%08x\n",
6948 +                       in_be32(priv->reg + TALITOS_DEUISR),
6949 +                       in_be32(priv->reg + TALITOS_DEUISR_LO));
6950 +               break;
6951 +       case DESC_HDR_SEL0_MDEUA:
6952 +       case DESC_HDR_SEL0_MDEUB:
6953 +               dev_err(dev, "MDEUISR 0x%08x_%08x\n",
6954 +                       in_be32(priv->reg + TALITOS_MDEUISR),
6955 +                       in_be32(priv->reg + TALITOS_MDEUISR_LO));
6956 +               break;
6957 +       case DESC_HDR_SEL0_RNG:
6958 +               dev_err(dev, "RNGUISR 0x%08x_%08x\n",
6959 +                       in_be32(priv->reg + TALITOS_RNGUISR),
6960 +                       in_be32(priv->reg + TALITOS_RNGUISR_LO));
6961 +               break;
6962 +       case DESC_HDR_SEL0_PKEU:
6963 +               dev_err(dev, "PKEUISR 0x%08x_%08x\n",
6964 +                       in_be32(priv->reg + TALITOS_PKEUISR),
6965 +                       in_be32(priv->reg + TALITOS_PKEUISR_LO));
6966 +               break;
6967 +       case DESC_HDR_SEL0_AESU:
6968 +               dev_err(dev, "AESUISR 0x%08x_%08x\n",
6969 +                       in_be32(priv->reg + TALITOS_AESUISR),
6970 +                       in_be32(priv->reg + TALITOS_AESUISR_LO));
6971 +               break;
6972 +       case DESC_HDR_SEL0_CRCU:
6973 +               dev_err(dev, "CRCUISR 0x%08x_%08x\n",
6974 +                       in_be32(priv->reg + TALITOS_CRCUISR),
6975 +                       in_be32(priv->reg + TALITOS_CRCUISR_LO));
6976 +               break;
6977 +       case DESC_HDR_SEL0_KEU:
6978 +               dev_err(dev, "KEUISR 0x%08x_%08x\n",
6979 +                       in_be32(priv->reg + TALITOS_KEUISR),
6980 +                       in_be32(priv->reg + TALITOS_KEUISR_LO));
6981 +               break;
6982 +       }
6983 +
6984 +       switch (desc->hdr & DESC_HDR_SEL1_MASK) {
6985 +       case DESC_HDR_SEL1_MDEUA:
6986 +       case DESC_HDR_SEL1_MDEUB:
6987 +               dev_err(dev, "MDEUISR 0x%08x_%08x\n",
6988 +                       in_be32(priv->reg + TALITOS_MDEUISR),
6989 +                       in_be32(priv->reg + TALITOS_MDEUISR_LO));
6990 +               break;
6991 +       case DESC_HDR_SEL1_CRCU:
6992 +               dev_err(dev, "CRCUISR 0x%08x_%08x\n",
6993 +                       in_be32(priv->reg + TALITOS_CRCUISR),
6994 +                       in_be32(priv->reg + TALITOS_CRCUISR_LO));
6995 +               break;
6996 +       }
6997 +
6998 +       for (i = 0; i < 8; i++)
6999 +               dev_err(dev, "DESCBUF 0x%08x_%08x\n",
7000 +                       in_be32(priv->reg + TALITOS_DESCBUF(ch) + 8*i),
7001 +                       in_be32(priv->reg + TALITOS_DESCBUF_LO(ch) + 8*i));
7002 +}
7003 +
7004 +/*
7005 + * recover from error interrupts
7006 + */
7007 +static void talitos_error(unsigned long data)
7008 +{
7009 +       struct device *dev = (struct device *)data;
7010 +       struct talitos_private *priv = dev_get_drvdata(dev);
7011 +       unsigned int timeout = TALITOS_TIMEOUT;
7012 +       int ch, error, reset_dev = 0, reset_ch = 0;
7013 +       u32 isr, isr_lo, v, v_lo;
7014 +
7015 +       isr = in_be32(priv->reg + TALITOS_ISR);
7016 +       isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
7017 +
7018 +       for (ch = 0; ch < priv->num_channels; ch++) {
7019 +               /* skip channels without errors */
7020 +               if (!(isr & (1 << (ch * 2 + 1))))
7021 +                       continue;
7022 +
7023 +               error = -EINVAL;
7024 +
7025 +               v = in_be32(priv->reg + TALITOS_CCPSR(ch));
7026 +               v_lo = in_be32(priv->reg + TALITOS_CCPSR_LO(ch));
7027 +
7028 +               if (v_lo & TALITOS_CCPSR_LO_DOF) {
7029 +                       dev_err(dev, "double fetch fifo overflow error\n");
7030 +                       error = -EAGAIN;
7031 +                       reset_ch = 1;
7032 +               }
7033 +               if (v_lo & TALITOS_CCPSR_LO_SOF) {
7034 +                       /* h/w dropped descriptor */
7035 +                       dev_err(dev, "single fetch fifo overflow error\n");
7036 +                       error = -EAGAIN;
7037 +               }
7038 +               if (v_lo & TALITOS_CCPSR_LO_MDTE)
7039 +                       dev_err(dev, "master data transfer error\n");
7040 +               if (v_lo & TALITOS_CCPSR_LO_SGDLZ)
7041 +                       dev_err(dev, "s/g data length zero error\n");
7042 +               if (v_lo & TALITOS_CCPSR_LO_FPZ)
7043 +                       dev_err(dev, "fetch pointer zero error\n");
7044 +               if (v_lo & TALITOS_CCPSR_LO_IDH)
7045 +                       dev_err(dev, "illegal descriptor header error\n");
7046 +               if (v_lo & TALITOS_CCPSR_LO_IEU)
7047 +                       dev_err(dev, "invalid execution unit error\n");
7048 +               if (v_lo & TALITOS_CCPSR_LO_EU)
7049 +                       report_eu_error(dev, ch, current_desc(dev, ch));
7050 +               if (v_lo & TALITOS_CCPSR_LO_GB)
7051 +                       dev_err(dev, "gather boundary error\n");
7052 +               if (v_lo & TALITOS_CCPSR_LO_GRL)
7053 +                       dev_err(dev, "gather return/length error\n");
7054 +               if (v_lo & TALITOS_CCPSR_LO_SB)
7055 +                       dev_err(dev, "scatter boundary error\n");
7056 +               if (v_lo & TALITOS_CCPSR_LO_SRL)
7057 +                       dev_err(dev, "scatter return/length error\n");
7058 +
7059 +               flush_channel(dev, ch, error, reset_ch);
7060 +
7061 +               if (reset_ch) {
7062 +                       reset_channel(dev, ch);
7063 +               } else {
7064 +                       setbits32(priv->reg + TALITOS_CCCR(ch),
7065 +                                 TALITOS_CCCR_CONT);
7066 +                       setbits32(priv->reg + TALITOS_CCCR_LO(ch), 0);
7067 +                       while ((in_be32(priv->reg + TALITOS_CCCR(ch)) &
7068 +                              TALITOS_CCCR_CONT) && --timeout)
7069 +                               cpu_relax();
7070 +                       if (timeout == 0) {
7071 +                               dev_err(dev, "failed to restart channel %d\n",
7072 +                                       ch);
7073 +                               reset_dev = 1;
7074 +                       }
7075 +               }
7076 +       }
7077 +       if (reset_dev || isr & ~TALITOS_ISR_CHERR || isr_lo) {
7078 +               dev_err(dev, "done overflow, internal time out, or rngu error: "
7079 +                       "ISR 0x%08x_%08x\n", isr, isr_lo);
7080 +
7081 +               /* purge request queues */
7082 +               for (ch = 0; ch < priv->num_channels; ch++)
7083 +                       flush_channel(dev, ch, -EIO, 1);
7084 +
7085 +               /* reset and reinitialize the device */
7086 +               init_device(dev);
7087 +       }
7088 +}
7089 +
7090 +static irqreturn_t talitos_interrupt(int irq, void *data)
7091 +{
7092 +       struct device *dev = data;
7093 +       struct talitos_private *priv = dev_get_drvdata(dev);
7094 +       u32 isr, isr_lo;
7095 +
7096 +       isr = in_be32(priv->reg + TALITOS_ISR);
7097 +       isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
7098 +
7099 +       /* ack */
7100 +       out_be32(priv->reg + TALITOS_ICR, isr);
7101 +       out_be32(priv->reg + TALITOS_ICR_LO, isr_lo);
7102 +
7103 +       if (unlikely((isr & ~TALITOS_ISR_CHDONE) || isr_lo))
7104 +               talitos_error((unsigned long)data);
7105 +       else
7106 +               if (likely(isr & TALITOS_ISR_CHDONE))
7107 +                       tasklet_schedule(&priv->done_task);
7108 +
7109 +       return (isr || isr_lo) ? IRQ_HANDLED : IRQ_NONE;
7110 +}
7111 +
7112 +/*
7113 + * hwrng
7114 + */
7115 +static int talitos_rng_data_present(struct hwrng *rng, int wait)
7116 +{
7117 +       struct device *dev = (struct device *)rng->priv;
7118 +       struct talitos_private *priv = dev_get_drvdata(dev);
7119 +       u32 ofl;
7120 +       int i;
7121 +
7122 +       for (i = 0; i < 20; i++) {
7123 +               ofl = in_be32(priv->reg + TALITOS_RNGUSR_LO) &
7124 +                     TALITOS_RNGUSR_LO_OFL;
7125 +               if (ofl || !wait)
7126 +                       break;
7127 +               udelay(10);
7128 +       }
7129 +
7130 +       return !!ofl;
7131 +}
7132 +
7133 +static int talitos_rng_data_read(struct hwrng *rng, u32 *data)
7134 +{
7135 +       struct device *dev = (struct device *)rng->priv;
7136 +       struct talitos_private *priv = dev_get_drvdata(dev);
7137 +
7138 +       /* rng fifo requires 64-bit accesses */
7139 +       *data = in_be32(priv->reg + TALITOS_RNGU_FIFO);
7140 +       *data = in_be32(priv->reg + TALITOS_RNGU_FIFO_LO);
7141 +
7142 +       return sizeof(u32);
7143 +}
7144 +
7145 +static int talitos_rng_init(struct hwrng *rng)
7146 +{
7147 +       struct device *dev = (struct device *)rng->priv;
7148 +       struct talitos_private *priv = dev_get_drvdata(dev);
7149 +       unsigned int timeout = TALITOS_TIMEOUT;
7150 +
7151 +       setbits32(priv->reg + TALITOS_RNGURCR_LO, TALITOS_RNGURCR_LO_SR);
7152 +       while (!(in_be32(priv->reg + TALITOS_RNGUSR_LO) & TALITOS_RNGUSR_LO_RD)
7153 +              && --timeout)
7154 +               cpu_relax();
7155 +       if (timeout == 0) {
7156 +               dev_err(dev, "failed to reset rng hw\n");
7157 +               return -ENODEV;
7158 +       }
7159 +
7160 +       /* start generating */
7161 +       setbits32(priv->reg + TALITOS_RNGUDSR_LO, 0);
7162 +
7163 +       return 0;
7164 +}
7165 +
7166 +static int talitos_register_rng(struct device *dev)
7167 +{
7168 +       struct talitos_private *priv = dev_get_drvdata(dev);
7169 +
7170 +       priv->rng.name          = dev_driver_string(dev),
7171 +       priv->rng.init          = talitos_rng_init,
7172 +       priv->rng.data_present  = talitos_rng_data_present,
7173 +       priv->rng.data_read     = talitos_rng_data_read,
7174 +       priv->rng.priv          = (unsigned long)dev;
7175 +
7176 +       return hwrng_register(&priv->rng);
7177 +}
7178 +
7179 +static void talitos_unregister_rng(struct device *dev)
7180 +{
7181 +       struct talitos_private *priv = dev_get_drvdata(dev);
7182 +
7183 +       hwrng_unregister(&priv->rng);
7184 +}
7185 +
7186 +/*
7187 + * crypto alg
7188 + */
7189 +#define TALITOS_CRA_PRIORITY           3000
7190 +#define TALITOS_MAX_KEY_SIZE           64
7191 +#define TALITOS_MAX_IV_LENGTH          16 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
7192 +
7193 +#define MD5_DIGEST_SIZE   16
7194 +
7195 +struct talitos_ctx {
7196 +       struct device *dev;
7197 +       __be32 desc_hdr_template;
7198 +       u8 key[TALITOS_MAX_KEY_SIZE];
7199 +       u8 iv[TALITOS_MAX_IV_LENGTH];
7200 +       unsigned int keylen;
7201 +       unsigned int enckeylen;
7202 +       unsigned int authkeylen;
7203 +       unsigned int authsize;
7204 +};
7205 +
7206 +static int aead_authenc_setauthsize(struct crypto_aead *authenc,
7207 +                                                unsigned int authsize)
7208 +{
7209 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7210 +
7211 +       ctx->authsize = authsize;
7212 +
7213 +       return 0;
7214 +}
7215 +
7216 +static int aead_authenc_setkey(struct crypto_aead *authenc,
7217 +                                           const u8 *key, unsigned int keylen)
7218 +{
7219 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7220 +       struct rtattr *rta = (void *)key;
7221 +       struct crypto_authenc_key_param *param;
7222 +       unsigned int authkeylen;
7223 +       unsigned int enckeylen;
7224 +
7225 +       if (!RTA_OK(rta, keylen))
7226 +               goto badkey;
7227 +
7228 +       if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
7229 +               goto badkey;
7230 +
7231 +       if (RTA_PAYLOAD(rta) < sizeof(*param))
7232 +               goto badkey;
7233 +
7234 +       param = RTA_DATA(rta);
7235 +       enckeylen = be32_to_cpu(param->enckeylen);
7236 +
7237 +       key += RTA_ALIGN(rta->rta_len);
7238 +       keylen -= RTA_ALIGN(rta->rta_len);
7239 +
7240 +       if (keylen < enckeylen)
7241 +               goto badkey;
7242 +
7243 +       authkeylen = keylen - enckeylen;
7244 +
7245 +       if (keylen > TALITOS_MAX_KEY_SIZE)
7246 +               goto badkey;
7247 +
7248 +       memcpy(&ctx->key, key, keylen);
7249 +
7250 +       ctx->keylen = keylen;
7251 +       ctx->enckeylen = enckeylen;
7252 +       ctx->authkeylen = authkeylen;
7253 +
7254 +       return 0;
7255 +
7256 +badkey:
7257 +       crypto_aead_set_flags(authenc, CRYPTO_TFM_RES_BAD_KEY_LEN);
7258 +       return -EINVAL;
7259 +}
7260 +
7261 +/*
7262 + * ipsec_esp_edesc - s/w-extended ipsec_esp descriptor
7263 + * @src_nents: number of segments in input scatterlist
7264 + * @dst_nents: number of segments in output scatterlist
7265 + * @dma_len: length of dma mapped link_tbl space
7266 + * @dma_link_tbl: bus physical address of link_tbl
7267 + * @desc: h/w descriptor
7268 + * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1)
7269 + *
7270 + * if decrypting (with authcheck), or either one of src_nents or dst_nents
7271 + * is greater than 1, an integrity check value is concatenated to the end
7272 + * of link_tbl data
7273 + */
7274 +struct ipsec_esp_edesc {
7275 +       int src_nents;
7276 +       int dst_nents;
7277 +       int dma_len;
7278 +       dma_addr_t dma_link_tbl;
7279 +       struct talitos_desc desc;
7280 +       struct talitos_ptr link_tbl[0];
7281 +};
7282 +
7283 +static void ipsec_esp_unmap(struct device *dev,
7284 +                           struct ipsec_esp_edesc *edesc,
7285 +                           struct aead_request *areq)
7286 +{
7287 +       unmap_single_talitos_ptr(dev, &edesc->desc.ptr[6], DMA_FROM_DEVICE);
7288 +       unmap_single_talitos_ptr(dev, &edesc->desc.ptr[3], DMA_TO_DEVICE);
7289 +       unmap_single_talitos_ptr(dev, &edesc->desc.ptr[2], DMA_TO_DEVICE);
7290 +       unmap_single_talitos_ptr(dev, &edesc->desc.ptr[0], DMA_TO_DEVICE);
7291 +
7292 +       dma_unmap_sg(dev, areq->assoc, 1, DMA_TO_DEVICE);
7293 +
7294 +       if (areq->src != areq->dst) {
7295 +               dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7296 +                            DMA_TO_DEVICE);
7297 +               dma_unmap_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7298 +                            DMA_FROM_DEVICE);
7299 +       } else {
7300 +               dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7301 +                            DMA_BIDIRECTIONAL);
7302 +       }
7303 +
7304 +       if (edesc->dma_len)
7305 +               dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
7306 +                                DMA_BIDIRECTIONAL);
7307 +}
7308 +
7309 +/*
7310 + * ipsec_esp descriptor callbacks
7311 + */
7312 +static void ipsec_esp_encrypt_done(struct device *dev,
7313 +                                  struct talitos_desc *desc, void *context,
7314 +                                  int err)
7315 +{
7316 +       struct aead_request *areq = context;
7317 +       struct ipsec_esp_edesc *edesc =
7318 +                container_of(desc, struct ipsec_esp_edesc, desc);
7319 +       struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7320 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7321 +       struct scatterlist *sg;
7322 +       void *icvdata;
7323 +
7324 +       ipsec_esp_unmap(dev, edesc, areq);
7325 +
7326 +       /* copy the generated ICV to dst */
7327 +       if (edesc->dma_len) {
7328 +               icvdata = &edesc->link_tbl[edesc->src_nents +
7329 +                                          edesc->dst_nents + 1];
7330 +               sg = sg_last(areq->dst, edesc->dst_nents);
7331 +               memcpy((char *)sg_virt(sg) + sg->length - ctx->authsize,
7332 +                      icvdata, ctx->authsize);
7333 +       }
7334 +
7335 +       kfree(edesc);
7336 +
7337 +       aead_request_complete(areq, err);
7338 +}
7339 +
7340 +static void ipsec_esp_decrypt_done(struct device *dev,
7341 +                                  struct talitos_desc *desc, void *context,
7342 +                                  int err)
7343 +{
7344 +       struct aead_request *req = context;
7345 +       struct ipsec_esp_edesc *edesc =
7346 +                container_of(desc, struct ipsec_esp_edesc, desc);
7347 +       struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7348 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7349 +       struct scatterlist *sg;
7350 +       void *icvdata;
7351 +
7352 +       ipsec_esp_unmap(dev, edesc, req);
7353 +
7354 +       if (!err) {
7355 +               /* auth check */
7356 +               if (edesc->dma_len)
7357 +                       icvdata = &edesc->link_tbl[edesc->src_nents +
7358 +                                                  edesc->dst_nents + 1];
7359 +               else
7360 +                       icvdata = &edesc->link_tbl[0];
7361 +
7362 +               sg = sg_last(req->dst, edesc->dst_nents ? : 1);
7363 +               err = memcmp(icvdata, (char *)sg_virt(sg) + sg->length -
7364 +                            ctx->authsize, ctx->authsize) ? -EBADMSG : 0;
7365 +       }
7366 +
7367 +       kfree(edesc);
7368 +
7369 +       aead_request_complete(req, err);
7370 +}
7371 +
7372 +/*
7373 + * convert scatterlist to SEC h/w link table format
7374 + * stop at cryptlen bytes
7375 + */
7376 +static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
7377 +                          int cryptlen, struct talitos_ptr *link_tbl_ptr)
7378 +{
7379 +       int n_sg = sg_count;
7380 +
7381 +       while (n_sg--) {
7382 +               link_tbl_ptr->ptr = cpu_to_be32(sg_dma_address(sg));
7383 +               link_tbl_ptr->len = cpu_to_be16(sg_dma_len(sg));
7384 +               link_tbl_ptr->j_extent = 0;
7385 +               link_tbl_ptr++;
7386 +               cryptlen -= sg_dma_len(sg);
7387 +               sg = sg_next(sg);
7388 +       }
7389 +
7390 +       /* adjust (decrease) last one (or two) entry's len to cryptlen */
7391 +       link_tbl_ptr--;
7392 +       while (link_tbl_ptr->len <= (-cryptlen)) {
7393 +               /* Empty this entry, and move to previous one */
7394 +               cryptlen += be16_to_cpu(link_tbl_ptr->len);
7395 +               link_tbl_ptr->len = 0;
7396 +               sg_count--;
7397 +               link_tbl_ptr--;
7398 +       }
7399 +       link_tbl_ptr->len = cpu_to_be16(be16_to_cpu(link_tbl_ptr->len)
7400 +                                       + cryptlen);
7401 +
7402 +       /* tag end of link table */
7403 +       link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7404 +
7405 +       return sg_count;
7406 +}
7407 +
7408 +/*
7409 + * fill in and submit ipsec_esp descriptor
7410 + */
7411 +static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
7412 +                    u8 *giv, u64 seq,
7413 +                    void (*callback) (struct device *dev,
7414 +                                      struct talitos_desc *desc,
7415 +                                      void *context, int error))
7416 +{
7417 +       struct crypto_aead *aead = crypto_aead_reqtfm(areq);
7418 +       struct talitos_ctx *ctx = crypto_aead_ctx(aead);
7419 +       struct device *dev = ctx->dev;
7420 +       struct talitos_desc *desc = &edesc->desc;
7421 +       unsigned int cryptlen = areq->cryptlen;
7422 +       unsigned int authsize = ctx->authsize;
7423 +       unsigned int ivsize;
7424 +       int sg_count;
7425 +
7426 +       /* hmac key */
7427 +       map_single_talitos_ptr(dev, &desc->ptr[0], ctx->authkeylen, &ctx->key,
7428 +                              0, DMA_TO_DEVICE);
7429 +       /* hmac data */
7430 +       map_single_talitos_ptr(dev, &desc->ptr[1], sg_virt(areq->src) -
7431 +                              sg_virt(areq->assoc), sg_virt(areq->assoc), 0,
7432 +                              DMA_TO_DEVICE);
7433 +       /* cipher iv */
7434 +       ivsize = crypto_aead_ivsize(aead);
7435 +       map_single_talitos_ptr(dev, &desc->ptr[2], ivsize, giv ?: areq->iv, 0,
7436 +                              DMA_TO_DEVICE);
7437 +
7438 +       /* cipher key */
7439 +       map_single_talitos_ptr(dev, &desc->ptr[3], ctx->enckeylen,
7440 +                              (char *)&ctx->key + ctx->authkeylen, 0,
7441 +                              DMA_TO_DEVICE);
7442 +
7443 +       /*
7444 +        * cipher in
7445 +        * map and adjust cipher len to aead request cryptlen.
7446 +        * extent is bytes of HMAC postpended to ciphertext,
7447 +        * typically 12 for ipsec
7448 +        */
7449 +       desc->ptr[4].len = cpu_to_be16(cryptlen);
7450 +       desc->ptr[4].j_extent = authsize;
7451 +
7452 +       if (areq->src == areq->dst)
7453 +               sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7454 +                                     DMA_BIDIRECTIONAL);
7455 +       else
7456 +               sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7457 +                                     DMA_TO_DEVICE);
7458 +
7459 +       if (sg_count == 1) {
7460 +               desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7461 +       } else {
7462 +               sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
7463 +                                         &edesc->link_tbl[0]);
7464 +               if (sg_count > 1) {
7465 +                       desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
7466 +                       desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
7467 +                       dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7468 +                                                  edesc->dma_len, DMA_BIDIRECTIONAL);
7469 +               } else {
7470 +                       /* Only one segment now, so no link tbl needed */
7471 +                       desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7472 +               }
7473 +       }
7474 +
7475 +       /* cipher out */
7476 +       desc->ptr[5].len = cpu_to_be16(cryptlen);
7477 +       desc->ptr[5].j_extent = authsize;
7478 +
7479 +       if (areq->src != areq->dst) {
7480 +               sg_count = dma_map_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7481 +                                     DMA_FROM_DEVICE);
7482 +       }
7483 +
7484 +       if (sg_count == 1) {
7485 +               desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
7486 +       } else {
7487 +               struct talitos_ptr *link_tbl_ptr =
7488 +                       &edesc->link_tbl[edesc->src_nents];
7489 +               struct scatterlist *sg;
7490 +
7491 +               desc->ptr[5].ptr = cpu_to_be32((struct talitos_ptr *)
7492 +                                              edesc->dma_link_tbl +
7493 +                                              edesc->src_nents);
7494 +               if (areq->src == areq->dst) {
7495 +                       memcpy(link_tbl_ptr, &edesc->link_tbl[0],
7496 +                              edesc->src_nents * sizeof(struct talitos_ptr));
7497 +               } else {
7498 +                       sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
7499 +                                                 link_tbl_ptr);
7500 +               }
7501 +               link_tbl_ptr += sg_count - 1;
7502 +
7503 +               /* handle case where sg_last contains the ICV exclusively */
7504 +               sg = sg_last(areq->dst, edesc->dst_nents);
7505 +               if (sg->length == ctx->authsize)
7506 +                       link_tbl_ptr--;
7507 +
7508 +               link_tbl_ptr->j_extent = 0;
7509 +               link_tbl_ptr++;
7510 +               link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7511 +               link_tbl_ptr->len = cpu_to_be16(authsize);
7512 +
7513 +               /* icv data follows link tables */
7514 +               link_tbl_ptr->ptr = cpu_to_be32((struct talitos_ptr *)
7515 +                                               edesc->dma_link_tbl +
7516 +                                               edesc->src_nents +
7517 +                                               edesc->dst_nents + 1);
7518 +
7519 +               desc->ptr[5].j_extent |= DESC_PTR_LNKTBL_JUMP;
7520 +               dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7521 +                                          edesc->dma_len, DMA_BIDIRECTIONAL);
7522 +       }
7523 +
7524 +       /* iv out */
7525 +       map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv, 0,
7526 +                              DMA_FROM_DEVICE);
7527 +
7528 +       return talitos_submit(dev, desc, callback, areq);
7529 +}
7530 +
7531 +
7532 +/*
7533 + * derive number of elements in scatterlist
7534 + */
7535 +static int sg_count(struct scatterlist *sg_list, int nbytes)
7536 +{
7537 +       struct scatterlist *sg = sg_list;
7538 +       int sg_nents = 0;
7539 +
7540 +       while (nbytes) {
7541 +               sg_nents++;
7542 +               nbytes -= sg->length;
7543 +               sg = sg_next(sg);
7544 +       }
7545 +
7546 +       return sg_nents;
7547 +}
7548 +
7549 +/*
7550 + * allocate and map the ipsec_esp extended descriptor
7551 + */
7552 +static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
7553 +                                                    int icv_stashing)
7554 +{
7555 +       struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7556 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7557 +       struct ipsec_esp_edesc *edesc;
7558 +       int src_nents, dst_nents, alloc_len, dma_len;
7559 +
7560 +       if (areq->cryptlen + ctx->authsize > TALITOS_MAX_DATA_LEN) {
7561 +               dev_err(ctx->dev, "cryptlen exceeds h/w max limit\n");
7562 +               return ERR_PTR(-EINVAL);
7563 +       }
7564 +
7565 +       src_nents = sg_count(areq->src, areq->cryptlen + ctx->authsize);
7566 +       src_nents = (src_nents == 1) ? 0 : src_nents;
7567 +
7568 +       if (areq->dst == areq->src) {
7569 +               dst_nents = src_nents;
7570 +       } else {
7571 +               dst_nents = sg_count(areq->dst, areq->cryptlen + ctx->authsize);
7572 +               dst_nents = (dst_nents == 1) ? 0 : src_nents;
7573 +       }
7574 +
7575 +       /*
7576 +        * allocate space for base edesc plus the link tables,
7577 +        * allowing for a separate entry for the generated ICV (+ 1),
7578 +        * and the ICV data itself
7579 +        */
7580 +       alloc_len = sizeof(struct ipsec_esp_edesc);
7581 +       if (src_nents || dst_nents) {
7582 +               dma_len = (src_nents + dst_nents + 1) *
7583 +                                sizeof(struct talitos_ptr) + ctx->authsize;
7584 +               alloc_len += dma_len;
7585 +       } else {
7586 +               dma_len = 0;
7587 +               alloc_len += icv_stashing ? ctx->authsize : 0;
7588 +       }
7589 +
7590 +       edesc = kmalloc(alloc_len, GFP_DMA);
7591 +       if (!edesc) {
7592 +               dev_err(ctx->dev, "could not allocate edescriptor\n");
7593 +               return ERR_PTR(-ENOMEM);
7594 +       }
7595 +
7596 +       edesc->src_nents = src_nents;
7597 +       edesc->dst_nents = dst_nents;
7598 +       edesc->dma_len = dma_len;
7599 +       edesc->dma_link_tbl = dma_map_single(ctx->dev, &edesc->link_tbl[0],
7600 +                                            edesc->dma_len, DMA_BIDIRECTIONAL);
7601 +
7602 +       return edesc;
7603 +}
7604 +
7605 +static int aead_authenc_encrypt(struct aead_request *req)
7606 +{
7607 +       struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7608 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7609 +       struct ipsec_esp_edesc *edesc;
7610 +
7611 +       /* allocate extended descriptor */
7612 +       edesc = ipsec_esp_edesc_alloc(req, 0);
7613 +       if (IS_ERR(edesc))
7614 +               return PTR_ERR(edesc);
7615 +
7616 +       /* set encrypt */
7617 +       edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7618 +
7619 +       return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_encrypt_done);
7620 +}
7621 +
7622 +static int aead_authenc_decrypt(struct aead_request *req)
7623 +{
7624 +       struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7625 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7626 +       unsigned int authsize = ctx->authsize;
7627 +       struct ipsec_esp_edesc *edesc;
7628 +       struct scatterlist *sg;
7629 +       void *icvdata;
7630 +
7631 +       req->cryptlen -= authsize;
7632 +
7633 +       /* allocate extended descriptor */
7634 +       edesc = ipsec_esp_edesc_alloc(req, 1);
7635 +       if (IS_ERR(edesc))
7636 +               return PTR_ERR(edesc);
7637 +
7638 +       /* stash incoming ICV for later cmp with ICV generated by the h/w */
7639 +       if (edesc->dma_len)
7640 +               icvdata = &edesc->link_tbl[edesc->src_nents +
7641 +                                          edesc->dst_nents + 1];
7642 +       else
7643 +               icvdata = &edesc->link_tbl[0];
7644 +
7645 +       sg = sg_last(req->src, edesc->src_nents ? : 1);
7646 +
7647 +       memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
7648 +              ctx->authsize);
7649 +
7650 +       /* decrypt */
7651 +       edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
7652 +
7653 +       return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_done);
7654 +}
7655 +
7656 +static int aead_authenc_givencrypt(
7657 +       struct aead_givcrypt_request *req)
7658 +{
7659 +       struct aead_request *areq = &req->areq;
7660 +       struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7661 +       struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7662 +       struct ipsec_esp_edesc *edesc;
7663 +
7664 +       /* allocate extended descriptor */
7665 +       edesc = ipsec_esp_edesc_alloc(areq, 0);
7666 +       if (IS_ERR(edesc))
7667 +               return PTR_ERR(edesc);
7668 +
7669 +       /* set encrypt */
7670 +       edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7671 +
7672 +       memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
7673 +
7674 +       return ipsec_esp(edesc, areq, req->giv, req->seq,
7675 +                        ipsec_esp_encrypt_done);
7676 +}
7677 +
7678 +struct talitos_alg_template {
7679 +       char name[CRYPTO_MAX_ALG_NAME];
7680 +       char driver_name[CRYPTO_MAX_ALG_NAME];
7681 +       unsigned int blocksize;
7682 +       struct aead_alg aead;
7683 +       struct device *dev;
7684 +       __be32 desc_hdr_template;
7685 +};
7686 +
7687 +static struct talitos_alg_template driver_algs[] = {
7688 +       /* single-pass ipsec_esp descriptor */
7689 +       {
7690 +               .name = "authenc(hmac(sha1),cbc(aes))",
7691 +               .driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
7692 +               .blocksize = AES_BLOCK_SIZE,
7693 +               .aead = {
7694 +                       .setkey = aead_authenc_setkey,
7695 +                       .setauthsize = aead_authenc_setauthsize,
7696 +                       .encrypt = aead_authenc_encrypt,
7697 +                       .decrypt = aead_authenc_decrypt,
7698 +                       .givencrypt = aead_authenc_givencrypt,
7699 +                       .geniv = "<built-in>",
7700 +                       .ivsize = AES_BLOCK_SIZE,
7701 +                       .maxauthsize = SHA1_DIGEST_SIZE,
7702 +                       },
7703 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7704 +                                    DESC_HDR_SEL0_AESU |
7705 +                                    DESC_HDR_MODE0_AESU_CBC |
7706 +                                    DESC_HDR_SEL1_MDEUA |
7707 +                                    DESC_HDR_MODE1_MDEU_INIT |
7708 +                                    DESC_HDR_MODE1_MDEU_PAD |
7709 +                                    DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7710 +       },
7711 +       {
7712 +               .name = "authenc(hmac(sha1),cbc(des3_ede))",
7713 +               .driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
7714 +               .blocksize = DES3_EDE_BLOCK_SIZE,
7715 +               .aead = {
7716 +                       .setkey = aead_authenc_setkey,
7717 +                       .setauthsize = aead_authenc_setauthsize,
7718 +                       .encrypt = aead_authenc_encrypt,
7719 +                       .decrypt = aead_authenc_decrypt,
7720 +                       .givencrypt = aead_authenc_givencrypt,
7721 +                       .geniv = "<built-in>",
7722 +                       .ivsize = DES3_EDE_BLOCK_SIZE,
7723 +                       .maxauthsize = SHA1_DIGEST_SIZE,
7724 +                       },
7725 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7726 +                                    DESC_HDR_SEL0_DEU |
7727 +                                    DESC_HDR_MODE0_DEU_CBC |
7728 +                                    DESC_HDR_MODE0_DEU_3DES |
7729 +                                    DESC_HDR_SEL1_MDEUA |
7730 +                                    DESC_HDR_MODE1_MDEU_INIT |
7731 +                                    DESC_HDR_MODE1_MDEU_PAD |
7732 +                                    DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7733 +       },
7734 +       {
7735 +               .name = "authenc(hmac(sha256),cbc(aes))",
7736 +               .driver_name = "authenc-hmac-sha256-cbc-aes-talitos",
7737 +               .blocksize = AES_BLOCK_SIZE,
7738 +               .aead = {
7739 +                       .setkey = aead_authenc_setkey,
7740 +                       .setauthsize = aead_authenc_setauthsize,
7741 +                       .encrypt = aead_authenc_encrypt,
7742 +                       .decrypt = aead_authenc_decrypt,
7743 +                       .givencrypt = aead_authenc_givencrypt,
7744 +                       .geniv = "<built-in>",
7745 +                       .ivsize = AES_BLOCK_SIZE,
7746 +                       .maxauthsize = SHA256_DIGEST_SIZE,
7747 +                       },
7748 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7749 +                                    DESC_HDR_SEL0_AESU |
7750 +                                    DESC_HDR_MODE0_AESU_CBC |
7751 +                                    DESC_HDR_SEL1_MDEUA |
7752 +                                    DESC_HDR_MODE1_MDEU_INIT |
7753 +                                    DESC_HDR_MODE1_MDEU_PAD |
7754 +                                    DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7755 +       },
7756 +       {
7757 +               .name = "authenc(hmac(sha256),cbc(des3_ede))",
7758 +               .driver_name = "authenc-hmac-sha256-cbc-3des-talitos",
7759 +               .blocksize = DES3_EDE_BLOCK_SIZE,
7760 +               .aead = {
7761 +                       .setkey = aead_authenc_setkey,
7762 +                       .setauthsize = aead_authenc_setauthsize,
7763 +                       .encrypt = aead_authenc_encrypt,
7764 +                       .decrypt = aead_authenc_decrypt,
7765 +                       .givencrypt = aead_authenc_givencrypt,
7766 +                       .geniv = "<built-in>",
7767 +                       .ivsize = DES3_EDE_BLOCK_SIZE,
7768 +                       .maxauthsize = SHA256_DIGEST_SIZE,
7769 +                       },
7770 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7771 +                                    DESC_HDR_SEL0_DEU |
7772 +                                    DESC_HDR_MODE0_DEU_CBC |
7773 +                                    DESC_HDR_MODE0_DEU_3DES |
7774 +                                    DESC_HDR_SEL1_MDEUA |
7775 +                                    DESC_HDR_MODE1_MDEU_INIT |
7776 +                                    DESC_HDR_MODE1_MDEU_PAD |
7777 +                                    DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7778 +       },
7779 +       {
7780 +               .name = "authenc(hmac(md5),cbc(aes))",
7781 +               .driver_name = "authenc-hmac-md5-cbc-aes-talitos",
7782 +               .blocksize = AES_BLOCK_SIZE,
7783 +               .aead = {
7784 +                       .setkey = aead_authenc_setkey,
7785 +                       .setauthsize = aead_authenc_setauthsize,
7786 +                       .encrypt = aead_authenc_encrypt,
7787 +                       .decrypt = aead_authenc_decrypt,
7788 +                       .givencrypt = aead_authenc_givencrypt,
7789 +                       .geniv = "<built-in>",
7790 +                       .ivsize = AES_BLOCK_SIZE,
7791 +                       .maxauthsize = MD5_DIGEST_SIZE,
7792 +                       },
7793 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7794 +                                    DESC_HDR_SEL0_AESU |
7795 +                                    DESC_HDR_MODE0_AESU_CBC |
7796 +                                    DESC_HDR_SEL1_MDEUA |
7797 +                                    DESC_HDR_MODE1_MDEU_INIT |
7798 +                                    DESC_HDR_MODE1_MDEU_PAD |
7799 +                                    DESC_HDR_MODE1_MDEU_MD5_HMAC,
7800 +       },
7801 +       {
7802 +               .name = "authenc(hmac(md5),cbc(des3_ede))",
7803 +               .driver_name = "authenc-hmac-md5-cbc-3des-talitos",
7804 +               .blocksize = DES3_EDE_BLOCK_SIZE,
7805 +               .aead = {
7806 +                       .setkey = aead_authenc_setkey,
7807 +                       .setauthsize = aead_authenc_setauthsize,
7808 +                       .encrypt = aead_authenc_encrypt,
7809 +                       .decrypt = aead_authenc_decrypt,
7810 +                       .givencrypt = aead_authenc_givencrypt,
7811 +                       .geniv = "<built-in>",
7812 +                       .ivsize = DES3_EDE_BLOCK_SIZE,
7813 +                       .maxauthsize = MD5_DIGEST_SIZE,
7814 +                       },
7815 +               .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7816 +                                    DESC_HDR_SEL0_DEU |
7817 +                                    DESC_HDR_MODE0_DEU_CBC |
7818 +                                    DESC_HDR_MODE0_DEU_3DES |
7819 +                                    DESC_HDR_SEL1_MDEUA |
7820 +                                    DESC_HDR_MODE1_MDEU_INIT |
7821 +                                    DESC_HDR_MODE1_MDEU_PAD |
7822 +                                    DESC_HDR_MODE1_MDEU_MD5_HMAC,
7823 +       }
7824 +};
7825 +
7826 +struct talitos_crypto_alg {
7827 +       struct list_head entry;
7828 +       struct device *dev;
7829 +       __be32 desc_hdr_template;
7830 +       struct crypto_alg crypto_alg;
7831 +};
7832 +
7833 +static int talitos_cra_init(struct crypto_tfm *tfm)
7834 +{
7835 +       struct crypto_alg *alg = tfm->__crt_alg;
7836 +       struct talitos_crypto_alg *talitos_alg =
7837 +                container_of(alg, struct talitos_crypto_alg, crypto_alg);
7838 +       struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
7839 +
7840 +       /* update context with ptr to dev */
7841 +       ctx->dev = talitos_alg->dev;
7842 +       /* copy descriptor header template value */
7843 +       ctx->desc_hdr_template = talitos_alg->desc_hdr_template;
7844 +
7845 +       /* random first IV */
7846 +       get_random_bytes(ctx->iv, TALITOS_MAX_IV_LENGTH);
7847 +
7848 +       return 0;
7849 +}
7850 +
7851 +/*
7852 + * given the alg's descriptor header template, determine whether descriptor
7853 + * type and primary/secondary execution units required match the hw
7854 + * capabilities description provided in the device tree node.
7855 + */
7856 +static int hw_supports(struct device *dev, __be32 desc_hdr_template)
7857 +{
7858 +       struct talitos_private *priv = dev_get_drvdata(dev);
7859 +       int ret;
7860 +
7861 +       ret = (1 << DESC_TYPE(desc_hdr_template) & priv->desc_types) &&
7862 +             (1 << PRIMARY_EU(desc_hdr_template) & priv->exec_units);
7863 +
7864 +       if (SECONDARY_EU(desc_hdr_template))
7865 +               ret = ret && (1 << SECONDARY_EU(desc_hdr_template)
7866 +                             & priv->exec_units);
7867 +
7868 +       return ret;
7869 +}
7870 +
7871 +static int __devexit talitos_remove(struct of_device *ofdev)
7872 +{
7873 +       struct device *dev = &ofdev->dev;
7874 +       struct talitos_private *priv = dev_get_drvdata(dev);
7875 +       struct talitos_crypto_alg *t_alg, *n;
7876 +       int i;
7877 +
7878 +       list_for_each_entry_safe(t_alg, n, &priv->alg_list, entry) {
7879 +               crypto_unregister_alg(&t_alg->crypto_alg);
7880 +               list_del(&t_alg->entry);
7881 +               kfree(t_alg);
7882 +       }
7883 +
7884 +       if (hw_supports(dev, DESC_HDR_SEL0_RNG))
7885 +               talitos_unregister_rng(dev);
7886 +
7887 +       kfree(priv->tail);
7888 +       kfree(priv->head);
7889 +
7890 +       if (priv->fifo)
7891 +               for (i = 0; i < priv->num_channels; i++)
7892 +                       kfree(priv->fifo[i]);
7893 +
7894 +       kfree(priv->fifo);
7895 +       kfree(priv->head_lock);
7896 +       kfree(priv->tail_lock);
7897 +
7898 +       if (priv->irq != NO_IRQ) {
7899 +               free_irq(priv->irq, dev);
7900 +               irq_dispose_mapping(priv->irq);
7901 +       }
7902 +
7903 +       tasklet_kill(&priv->done_task);
7904 +       tasklet_kill(&priv->error_task);
7905 +
7906 +       iounmap(priv->reg);
7907 +
7908 +       dev_set_drvdata(dev, NULL);
7909 +
7910 +       kfree(priv);
7911 +
7912 +       return 0;
7913 +}
7914 +
7915 +static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
7916 +                                                   struct talitos_alg_template
7917 +                                                          *template)
7918 +{
7919 +       struct talitos_crypto_alg *t_alg;
7920 +       struct crypto_alg *alg;
7921 +
7922 +       t_alg = kzalloc(sizeof(struct talitos_crypto_alg), GFP_KERNEL);
7923 +       if (!t_alg)
7924 +               return ERR_PTR(-ENOMEM);
7925 +
7926 +       alg = &t_alg->crypto_alg;
7927 +
7928 +       snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
7929 +       snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
7930 +                template->driver_name);
7931 +       alg->cra_module = THIS_MODULE;
7932 +       alg->cra_init = talitos_cra_init;
7933 +       alg->cra_priority = TALITOS_CRA_PRIORITY;
7934 +       alg->cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
7935 +       alg->cra_blocksize = template->blocksize;
7936 +       alg->cra_alignmask = 0;
7937 +       alg->cra_type = &crypto_aead_type;
7938 +       alg->cra_ctxsize = sizeof(struct talitos_ctx);
7939 +       alg->cra_u.aead = template->aead;
7940 +
7941 +       t_alg->desc_hdr_template = template->desc_hdr_template;
7942 +       t_alg->dev = dev;
7943 +
7944 +       return t_alg;
7945 +}
7946 +
7947 +static int talitos_probe(struct of_device *ofdev,
7948 +                        const struct of_device_id *match)
7949 +{
7950 +       struct device *dev = &ofdev->dev;
7951 +       struct device_node *np = ofdev->node;
7952 +       struct talitos_private *priv;
7953 +       const unsigned int *prop;
7954 +       int i, err;
7955 +
7956 +       priv = kzalloc(sizeof(struct talitos_private), GFP_KERNEL);
7957 +       if (!priv)
7958 +               return -ENOMEM;
7959 +
7960 +       dev_set_drvdata(dev, priv);
7961 +
7962 +       priv->ofdev = ofdev;
7963 +
7964 +       tasklet_init(&priv->done_task, talitos_done, (unsigned long)dev);
7965 +       tasklet_init(&priv->error_task, talitos_error, (unsigned long)dev);
7966 +
7967 +       priv->irq = irq_of_parse_and_map(np, 0);
7968 +
7969 +       if (priv->irq == NO_IRQ) {
7970 +               dev_err(dev, "failed to map irq\n");
7971 +               err = -EINVAL;
7972 +               goto err_out;
7973 +       }
7974 +
7975 +       /* get the irq line */
7976 +       err = request_irq(priv->irq, talitos_interrupt, 0,
7977 +                         dev_driver_string(dev), dev);
7978 +       if (err) {
7979 +               dev_err(dev, "failed to request irq %d\n", priv->irq);
7980 +               irq_dispose_mapping(priv->irq);
7981 +               priv->irq = NO_IRQ;
7982 +               goto err_out;
7983 +       }
7984 +
7985 +       priv->reg = of_iomap(np, 0);
7986 +       if (!priv->reg) {
7987 +               dev_err(dev, "failed to of_iomap\n");
7988 +               err = -ENOMEM;
7989 +               goto err_out;
7990 +       }
7991 +
7992 +       /* get SEC version capabilities from device tree */
7993 +       prop = of_get_property(np, "fsl,num-channels", NULL);
7994 +       if (prop)
7995 +               priv->num_channels = *prop;
7996 +
7997 +       prop = of_get_property(np, "fsl,channel-fifo-len", NULL);
7998 +       if (prop)
7999 +               priv->chfifo_len = *prop;
8000 +
8001 +       prop = of_get_property(np, "fsl,exec-units-mask", NULL);
8002 +       if (prop)
8003 +               priv->exec_units = *prop;
8004 +
8005 +       prop = of_get_property(np, "fsl,descriptor-types-mask", NULL);
8006 +       if (prop)
8007 +               priv->desc_types = *prop;
8008 +
8009 +       if (!is_power_of_2(priv->num_channels) || !priv->chfifo_len ||
8010 +           !priv->exec_units || !priv->desc_types) {
8011 +               dev_err(dev, "invalid property data in device tree node\n");
8012 +               err = -EINVAL;
8013 +               goto err_out;
8014 +       }
8015 +
8016 +       of_node_put(np);
8017 +       np = NULL;
8018 +
8019 +       priv->head_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8020 +                                 GFP_KERNEL);
8021 +       priv->tail_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8022 +                                 GFP_KERNEL);
8023 +       if (!priv->head_lock || !priv->tail_lock) {
8024 +               dev_err(dev, "failed to allocate fifo locks\n");
8025 +               err = -ENOMEM;
8026 +               goto err_out;
8027 +       }
8028 +
8029 +       for (i = 0; i < priv->num_channels; i++) {
8030 +               spin_lock_init(&priv->head_lock[i]);
8031 +               spin_lock_init(&priv->tail_lock[i]);
8032 +       }
8033 +
8034 +       priv->fifo = kmalloc(sizeof(struct talitos_request *) *
8035 +                            priv->num_channels, GFP_KERNEL);
8036 +       if (!priv->fifo) {
8037 +               dev_err(dev, "failed to allocate request fifo\n");
8038 +               err = -ENOMEM;
8039 +               goto err_out;
8040 +       }
8041 +
8042 +       priv->fifo_len = roundup_pow_of_two(priv->chfifo_len);
8043 +
8044 +       for (i = 0; i < priv->num_channels; i++) {
8045 +               priv->fifo[i] = kzalloc(sizeof(struct talitos_request) *
8046 +                                       priv->fifo_len, GFP_KERNEL);
8047 +               if (!priv->fifo[i]) {
8048 +                       dev_err(dev, "failed to allocate request fifo %d\n", i);
8049 +                       err = -ENOMEM;
8050 +                       goto err_out;
8051 +               }
8052 +       }
8053 +
8054 +       priv->head = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8055 +       priv->tail = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8056 +       if (!priv->head || !priv->tail) {
8057 +               dev_err(dev, "failed to allocate request index space\n");
8058 +               err = -ENOMEM;
8059 +               goto err_out;
8060 +       }
8061 +
8062 +       /* reset and initialize the h/w */
8063 +       err = init_device(dev);
8064 +       if (err) {
8065 +               dev_err(dev, "failed to initialize device\n");
8066 +               goto err_out;
8067 +       }
8068 +
8069 +       /* register the RNG, if available */
8070 +       if (hw_supports(dev, DESC_HDR_SEL0_RNG)) {
8071 +               err = talitos_register_rng(dev);
8072 +               if (err) {
8073 +                       dev_err(dev, "failed to register hwrng: %d\n", err);
8074 +                       goto err_out;
8075 +               } else
8076 +                       dev_info(dev, "hwrng\n");
8077 +       }
8078 +
8079 +       /* register crypto algorithms the device supports */
8080 +       INIT_LIST_HEAD(&priv->alg_list);
8081 +
8082 +       for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
8083 +               if (hw_supports(dev, driver_algs[i].desc_hdr_template)) {
8084 +                       struct talitos_crypto_alg *t_alg;
8085 +
8086 +                       t_alg = talitos_alg_alloc(dev, &driver_algs[i]);
8087 +                       if (IS_ERR(t_alg)) {
8088 +                               err = PTR_ERR(t_alg);
8089 +                               goto err_out;
8090 +                       }
8091 +
8092 +                       err = crypto_register_alg(&t_alg->crypto_alg);
8093 +                       if (err) {
8094 +                               dev_err(dev, "%s alg registration failed\n",
8095 +                                       t_alg->crypto_alg.cra_driver_name);
8096 +                               kfree(t_alg);
8097 +                       } else {
8098 +                               list_add_tail(&t_alg->entry, &priv->alg_list);
8099 +                               dev_info(dev, "%s\n",
8100 +                                        t_alg->crypto_alg.cra_driver_name);
8101 +                       }
8102 +               }
8103 +       }
8104 +
8105 +       return 0;
8106 +
8107 +err_out:
8108 +       talitos_remove(ofdev);
8109 +       if (np)
8110 +               of_node_put(np);
8111 +
8112 +       return err;
8113 +}
8114 +
8115 +static struct of_device_id talitos_match[] = {
8116 +       {
8117 +               .compatible = "fsl,sec2.0",
8118 +       },
8119 +       {},
8120 +};
8121 +MODULE_DEVICE_TABLE(of, talitos_match);
8122 +
8123 +static struct of_platform_driver talitos_driver = {
8124 +       .name = "talitos",
8125 +       .match_table = talitos_match,
8126 +       .probe = talitos_probe,
8127 +       .remove = __devexit_p(talitos_remove),
8128 +};
8129 +
8130 +static int __init talitos_init(void)
8131 +{
8132 +       return of_register_platform_driver(&talitos_driver);
8133 +}
8134 +module_init(talitos_init);
8135 +
8136 +static void __exit talitos_exit(void)
8137 +{
8138 +       of_unregister_platform_driver(&talitos_driver);
8139 +}
8140 +module_exit(talitos_exit);
8141 +
8142 +MODULE_LICENSE("GPL");
8143 +MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>");
8144 +MODULE_DESCRIPTION("Freescale integrated security engine (SEC) driver");
8145 --- /dev/null
8146 +++ b/drivers/crypto/talitos.h
8147 @@ -0,0 +1,199 @@
8148 +/*
8149 + * Freescale SEC (talitos) device register and descriptor header defines
8150 + *
8151 + * Copyright (c) 2006-2008 Freescale Semiconductor, Inc.
8152 + *
8153 + * Redistribution and use in source and binary forms, with or without
8154 + * modification, are permitted provided that the following conditions
8155 + * are met:
8156 + *
8157 + * 1. Redistributions of source code must retain the above copyright
8158 + *    notice, this list of conditions and the following disclaimer.
8159 + * 2. Redistributions in binary form must reproduce the above copyright
8160 + *    notice, this list of conditions and the following disclaimer in the
8161 + *    documentation and/or other materials provided with the distribution.
8162 + * 3. The name of the author may not be used to endorse or promote products
8163 + *    derived from this software without specific prior written permission.
8164 + *
8165 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
8166 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8167 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
8168 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
8169 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
8170 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
8171 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
8172 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8173 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
8174 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8175 + *
8176 + */
8177 +
8178 +/*
8179 + * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
8180 + */
8181 +
8182 +/* global register offset addresses */
8183 +#define TALITOS_MCR                    0x1030  /* master control register */
8184 +#define TALITOS_MCR_LO                 0x1038
8185 +#define   TALITOS_MCR_SWR              0x1     /* s/w reset */
8186 +#define TALITOS_IMR                    0x1008  /* interrupt mask register */
8187 +#define   TALITOS_IMR_INIT             0x10fff /* enable channel IRQs */
8188 +#define TALITOS_IMR_LO                 0x100C
8189 +#define   TALITOS_IMR_LO_INIT          0x20000 /* allow RNGU error IRQs */
8190 +#define TALITOS_ISR                    0x1010  /* interrupt status register */
8191 +#define   TALITOS_ISR_CHERR            0xaa    /* channel errors mask */
8192 +#define   TALITOS_ISR_CHDONE           0x55    /* channel done mask */
8193 +#define TALITOS_ISR_LO                 0x1014
8194 +#define TALITOS_ICR                    0x1018  /* interrupt clear register */
8195 +#define TALITOS_ICR_LO                 0x101C
8196 +
8197 +/* channel register address stride */
8198 +#define TALITOS_CH_STRIDE              0x100
8199 +
8200 +/* channel configuration register  */
8201 +#define TALITOS_CCCR(ch)               (ch * TALITOS_CH_STRIDE + 0x1108)
8202 +#define   TALITOS_CCCR_CONT            0x2    /* channel continue */
8203 +#define   TALITOS_CCCR_RESET           0x1    /* channel reset */
8204 +#define TALITOS_CCCR_LO(ch)            (ch * TALITOS_CH_STRIDE + 0x110c)
8205 +#define   TALITOS_CCCR_LO_CDWE         0x10   /* chan. done writeback enab. */
8206 +#define   TALITOS_CCCR_LO_NT           0x4    /* notification type */
8207 +#define   TALITOS_CCCR_LO_CDIE         0x2    /* channel done IRQ enable */
8208 +
8209 +/* CCPSR: channel pointer status register */
8210 +#define TALITOS_CCPSR(ch)              (ch * TALITOS_CH_STRIDE + 0x1110)
8211 +#define TALITOS_CCPSR_LO(ch)           (ch * TALITOS_CH_STRIDE + 0x1114)
8212 +#define   TALITOS_CCPSR_LO_DOF         0x8000 /* double FF write oflow error */
8213 +#define   TALITOS_CCPSR_LO_SOF         0x4000 /* single FF write oflow error */
8214 +#define   TALITOS_CCPSR_LO_MDTE                0x2000 /* master data transfer error */
8215 +#define   TALITOS_CCPSR_LO_SGDLZ       0x1000 /* s/g data len zero error */
8216 +#define   TALITOS_CCPSR_LO_FPZ         0x0800 /* fetch ptr zero error */
8217 +#define   TALITOS_CCPSR_LO_IDH         0x0400 /* illegal desc hdr error */
8218 +#define   TALITOS_CCPSR_LO_IEU         0x0200 /* invalid EU error */
8219 +#define   TALITOS_CCPSR_LO_EU          0x0100 /* EU error detected */
8220 +#define   TALITOS_CCPSR_LO_GB          0x0080 /* gather boundary error */
8221 +#define   TALITOS_CCPSR_LO_GRL         0x0040 /* gather return/length error */
8222 +#define   TALITOS_CCPSR_LO_SB          0x0020 /* scatter boundary error */
8223 +#define   TALITOS_CCPSR_LO_SRL         0x0010 /* scatter return/length error */
8224 +
8225 +/* channel fetch fifo register */
8226 +#define TALITOS_FF(ch)                 (ch * TALITOS_CH_STRIDE + 0x1148)
8227 +#define TALITOS_FF_LO(ch)              (ch * TALITOS_CH_STRIDE + 0x114c)
8228 +
8229 +/* current descriptor pointer register */
8230 +#define TALITOS_CDPR(ch)               (ch * TALITOS_CH_STRIDE + 0x1140)
8231 +#define TALITOS_CDPR_LO(ch)            (ch * TALITOS_CH_STRIDE + 0x1144)
8232 +
8233 +/* descriptor buffer register */
8234 +#define TALITOS_DESCBUF(ch)            (ch * TALITOS_CH_STRIDE + 0x1180)
8235 +#define TALITOS_DESCBUF_LO(ch)         (ch * TALITOS_CH_STRIDE + 0x1184)
8236 +
8237 +/* gather link table */
8238 +#define TALITOS_GATHER(ch)             (ch * TALITOS_CH_STRIDE + 0x11c0)
8239 +#define TALITOS_GATHER_LO(ch)          (ch * TALITOS_CH_STRIDE + 0x11c4)
8240 +
8241 +/* scatter link table */
8242 +#define TALITOS_SCATTER(ch)            (ch * TALITOS_CH_STRIDE + 0x11e0)
8243 +#define TALITOS_SCATTER_LO(ch)         (ch * TALITOS_CH_STRIDE + 0x11e4)
8244 +
8245 +/* execution unit interrupt status registers */
8246 +#define TALITOS_DEUISR                 0x2030 /* DES unit */
8247 +#define TALITOS_DEUISR_LO              0x2034
8248 +#define TALITOS_AESUISR                        0x4030 /* AES unit */
8249 +#define TALITOS_AESUISR_LO             0x4034
8250 +#define TALITOS_MDEUISR                        0x6030 /* message digest unit */
8251 +#define TALITOS_MDEUISR_LO             0x6034
8252 +#define TALITOS_AFEUISR                        0x8030 /* arc4 unit */
8253 +#define TALITOS_AFEUISR_LO             0x8034
8254 +#define TALITOS_RNGUISR                        0xa030 /* random number unit */
8255 +#define TALITOS_RNGUISR_LO             0xa034
8256 +#define TALITOS_RNGUSR                 0xa028 /* rng status */
8257 +#define TALITOS_RNGUSR_LO              0xa02c
8258 +#define   TALITOS_RNGUSR_LO_RD         0x1     /* reset done */
8259 +#define   TALITOS_RNGUSR_LO_OFL                0xff0000/* output FIFO length */
8260 +#define TALITOS_RNGUDSR                        0xa010  /* data size */
8261 +#define TALITOS_RNGUDSR_LO             0xa014
8262 +#define TALITOS_RNGU_FIFO              0xa800  /* output FIFO */
8263 +#define TALITOS_RNGU_FIFO_LO           0xa804  /* output FIFO */
8264 +#define TALITOS_RNGURCR                        0xa018  /* reset control */
8265 +#define TALITOS_RNGURCR_LO             0xa01c
8266 +#define   TALITOS_RNGURCR_LO_SR                0x1     /* software reset */
8267 +#define TALITOS_PKEUISR                        0xc030 /* public key unit */
8268 +#define TALITOS_PKEUISR_LO             0xc034
8269 +#define TALITOS_KEUISR                 0xe030 /* kasumi unit */
8270 +#define TALITOS_KEUISR_LO              0xe034
8271 +#define TALITOS_CRCUISR                        0xf030 /* cyclic redundancy check unit*/
8272 +#define TALITOS_CRCUISR_LO             0xf034
8273 +
8274 +/*
8275 + * talitos descriptor header (hdr) bits
8276 + */
8277 +
8278 +/* written back when done */
8279 +#define DESC_HDR_DONE                  __constant_cpu_to_be32(0xff000000)
8280 +
8281 +/* primary execution unit select */
8282 +#define        DESC_HDR_SEL0_MASK              __constant_cpu_to_be32(0xf0000000)
8283 +#define        DESC_HDR_SEL0_AFEU              __constant_cpu_to_be32(0x10000000)
8284 +#define        DESC_HDR_SEL0_DEU               __constant_cpu_to_be32(0x20000000)
8285 +#define        DESC_HDR_SEL0_MDEUA             __constant_cpu_to_be32(0x30000000)
8286 +#define        DESC_HDR_SEL0_MDEUB             __constant_cpu_to_be32(0xb0000000)
8287 +#define        DESC_HDR_SEL0_RNG               __constant_cpu_to_be32(0x40000000)
8288 +#define        DESC_HDR_SEL0_PKEU              __constant_cpu_to_be32(0x50000000)
8289 +#define        DESC_HDR_SEL0_AESU              __constant_cpu_to_be32(0x60000000)
8290 +#define        DESC_HDR_SEL0_KEU               __constant_cpu_to_be32(0x70000000)
8291 +#define        DESC_HDR_SEL0_CRCU              __constant_cpu_to_be32(0x80000000)
8292 +
8293 +/* primary execution unit mode (MODE0) and derivatives */
8294 +#define        DESC_HDR_MODE0_ENCRYPT          __constant_cpu_to_be32(0x00100000)
8295 +#define        DESC_HDR_MODE0_AESU_CBC         __constant_cpu_to_be32(0x00200000)
8296 +#define        DESC_HDR_MODE0_DEU_CBC          __constant_cpu_to_be32(0x00400000)
8297 +#define        DESC_HDR_MODE0_DEU_3DES         __constant_cpu_to_be32(0x00200000)
8298 +#define        DESC_HDR_MODE0_MDEU_INIT        __constant_cpu_to_be32(0x01000000)
8299 +#define        DESC_HDR_MODE0_MDEU_HMAC        __constant_cpu_to_be32(0x00800000)
8300 +#define        DESC_HDR_MODE0_MDEU_PAD         __constant_cpu_to_be32(0x00400000)
8301 +#define        DESC_HDR_MODE0_MDEU_MD5         __constant_cpu_to_be32(0x00200000)
8302 +#define        DESC_HDR_MODE0_MDEU_SHA256      __constant_cpu_to_be32(0x00100000)
8303 +#define        DESC_HDR_MODE0_MDEU_SHA1        __constant_cpu_to_be32(0x00000000)
8304 +#define        DESC_HDR_MODE0_MDEU_MD5_HMAC    (DESC_HDR_MODE0_MDEU_MD5 | \
8305 +                                        DESC_HDR_MODE0_MDEU_HMAC)
8306 +#define        DESC_HDR_MODE0_MDEU_SHA256_HMAC (DESC_HDR_MODE0_MDEU_SHA256 | \
8307 +                                        DESC_HDR_MODE0_MDEU_HMAC)
8308 +#define        DESC_HDR_MODE0_MDEU_SHA1_HMAC   (DESC_HDR_MODE0_MDEU_SHA1 | \
8309 +                                        DESC_HDR_MODE0_MDEU_HMAC)
8310 +
8311 +/* secondary execution unit select (SEL1) */
8312 +#define        DESC_HDR_SEL1_MASK              __constant_cpu_to_be32(0x000f0000)
8313 +#define        DESC_HDR_SEL1_MDEUA             __constant_cpu_to_be32(0x00030000)
8314 +#define        DESC_HDR_SEL1_MDEUB             __constant_cpu_to_be32(0x000b0000)
8315 +#define        DESC_HDR_SEL1_CRCU              __constant_cpu_to_be32(0x00080000)
8316 +
8317 +/* secondary execution unit mode (MODE1) and derivatives */
8318 +#define        DESC_HDR_MODE1_MDEU_INIT        __constant_cpu_to_be32(0x00001000)
8319 +#define        DESC_HDR_MODE1_MDEU_HMAC        __constant_cpu_to_be32(0x00000800)
8320 +#define        DESC_HDR_MODE1_MDEU_PAD         __constant_cpu_to_be32(0x00000400)
8321 +#define        DESC_HDR_MODE1_MDEU_MD5         __constant_cpu_to_be32(0x00000200)
8322 +#define        DESC_HDR_MODE1_MDEU_SHA256      __constant_cpu_to_be32(0x00000100)
8323 +#define        DESC_HDR_MODE1_MDEU_SHA1        __constant_cpu_to_be32(0x00000000)
8324 +#define        DESC_HDR_MODE1_MDEU_MD5_HMAC    (DESC_HDR_MODE1_MDEU_MD5 | \
8325 +                                        DESC_HDR_MODE1_MDEU_HMAC)
8326 +#define        DESC_HDR_MODE1_MDEU_SHA256_HMAC (DESC_HDR_MODE1_MDEU_SHA256 | \
8327 +                                        DESC_HDR_MODE1_MDEU_HMAC)
8328 +#define        DESC_HDR_MODE1_MDEU_SHA1_HMAC   (DESC_HDR_MODE1_MDEU_SHA1 | \
8329 +                                        DESC_HDR_MODE1_MDEU_HMAC)
8330 +
8331 +/* direction of overall data flow (DIR) */
8332 +#define        DESC_HDR_DIR_INBOUND            __constant_cpu_to_be32(0x00000002)
8333 +
8334 +/* request done notification (DN) */
8335 +#define        DESC_HDR_DONE_NOTIFY            __constant_cpu_to_be32(0x00000001)
8336 +
8337 +/* descriptor types */
8338 +#define DESC_HDR_TYPE_AESU_CTR_NONSNOOP                __constant_cpu_to_be32(0 << 3)
8339 +#define DESC_HDR_TYPE_IPSEC_ESP                        __constant_cpu_to_be32(1 << 3)
8340 +#define DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU  __constant_cpu_to_be32(2 << 3)
8341 +#define DESC_HDR_TYPE_HMAC_SNOOP_NO_AFEU       __constant_cpu_to_be32(4 << 3)
8342 +
8343 +/* link table extent field bits */
8344 +#define DESC_PTR_LNKTBL_JUMP                   0x80
8345 +#define DESC_PTR_LNKTBL_RETURN                 0x02
8346 +#define DESC_PTR_LNKTBL_NEXT                   0x01
8347 --- /dev/null
8348 +++ b/include/crypto/hash.h
8349 @@ -0,0 +1,154 @@
8350 +/*
8351 + * Hash: Hash algorithms under the crypto API
8352 + *
8353 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8354 + *
8355 + * This program is free software; you can redistribute it and/or modify it
8356 + * under the terms of the GNU General Public License as published by the Free
8357 + * Software Foundation; either version 2 of the License, or (at your option)
8358 + * any later version.
8359 + *
8360 + */
8361 +
8362 +#ifndef _CRYPTO_HASH_H
8363 +#define _CRYPTO_HASH_H
8364 +
8365 +#include <linux/crypto.h>
8366 +
8367 +struct crypto_ahash {
8368 +       struct crypto_tfm base;
8369 +};
8370 +
8371 +static inline struct crypto_ahash *__crypto_ahash_cast(struct crypto_tfm *tfm)
8372 +{
8373 +       return (struct crypto_ahash *)tfm;
8374 +}
8375 +
8376 +static inline struct crypto_ahash *crypto_alloc_ahash(const char *alg_name,
8377 +                                                     u32 type, u32 mask)
8378 +{
8379 +       type &= ~CRYPTO_ALG_TYPE_MASK;
8380 +       mask &= ~CRYPTO_ALG_TYPE_MASK;
8381 +       type |= CRYPTO_ALG_TYPE_AHASH;
8382 +       mask |= CRYPTO_ALG_TYPE_AHASH_MASK;
8383 +
8384 +       return __crypto_ahash_cast(crypto_alloc_base(alg_name, type, mask));
8385 +}
8386 +
8387 +static inline struct crypto_tfm *crypto_ahash_tfm(struct crypto_ahash *tfm)
8388 +{
8389 +       return &tfm->base;
8390 +}
8391 +
8392 +static inline void crypto_free_ahash(struct crypto_ahash *tfm)
8393 +{
8394 +       crypto_free_tfm(crypto_ahash_tfm(tfm));
8395 +}
8396 +
8397 +static inline unsigned int crypto_ahash_alignmask(
8398 +       struct crypto_ahash *tfm)
8399 +{
8400 +       return crypto_tfm_alg_alignmask(crypto_ahash_tfm(tfm));
8401 +}
8402 +
8403 +static inline struct ahash_tfm *crypto_ahash_crt(struct crypto_ahash *tfm)
8404 +{
8405 +       return &crypto_ahash_tfm(tfm)->crt_ahash;
8406 +}
8407 +
8408 +static inline unsigned int crypto_ahash_digestsize(struct crypto_ahash *tfm)
8409 +{
8410 +       return crypto_ahash_crt(tfm)->digestsize;
8411 +}
8412 +
8413 +static inline u32 crypto_ahash_get_flags(struct crypto_ahash *tfm)
8414 +{
8415 +       return crypto_tfm_get_flags(crypto_ahash_tfm(tfm));
8416 +}
8417 +
8418 +static inline void crypto_ahash_set_flags(struct crypto_ahash *tfm, u32 flags)
8419 +{
8420 +       crypto_tfm_set_flags(crypto_ahash_tfm(tfm), flags);
8421 +}
8422 +
8423 +static inline void crypto_ahash_clear_flags(struct crypto_ahash *tfm, u32 flags)
8424 +{
8425 +       crypto_tfm_clear_flags(crypto_ahash_tfm(tfm), flags);
8426 +}
8427 +
8428 +static inline struct crypto_ahash *crypto_ahash_reqtfm(
8429 +       struct ahash_request *req)
8430 +{
8431 +       return __crypto_ahash_cast(req->base.tfm);
8432 +}
8433 +
8434 +static inline unsigned int crypto_ahash_reqsize(struct crypto_ahash *tfm)
8435 +{
8436 +       return crypto_ahash_crt(tfm)->reqsize;
8437 +}
8438 +
8439 +static inline int crypto_ahash_setkey(struct crypto_ahash *tfm,
8440 +                                     const u8 *key, unsigned int keylen)
8441 +{
8442 +       struct ahash_tfm *crt = crypto_ahash_crt(tfm);
8443 +
8444 +       return crt->setkey(tfm, key, keylen);
8445 +}
8446 +
8447 +static inline int crypto_ahash_digest(struct ahash_request *req)
8448 +{
8449 +       struct ahash_tfm *crt = crypto_ahash_crt(crypto_ahash_reqtfm(req));
8450 +       return crt->digest(req);
8451 +}
8452 +
8453 +static inline void ahash_request_set_tfm(struct ahash_request *req,
8454 +                                        struct crypto_ahash *tfm)
8455 +{
8456 +       req->base.tfm = crypto_ahash_tfm(tfm);
8457 +}
8458 +
8459 +static inline struct ahash_request *ahash_request_alloc(
8460 +       struct crypto_ahash *tfm, gfp_t gfp)
8461 +{
8462 +       struct ahash_request *req;
8463 +
8464 +       req = kmalloc(sizeof(struct ahash_request) +
8465 +                     crypto_ahash_reqsize(tfm), gfp);
8466 +
8467 +       if (likely(req))
8468 +               ahash_request_set_tfm(req, tfm);
8469 +
8470 +       return req;
8471 +}
8472 +
8473 +static inline void ahash_request_free(struct ahash_request *req)
8474 +{
8475 +       kfree(req);
8476 +}
8477 +
8478 +static inline struct ahash_request *ahash_request_cast(
8479 +       struct crypto_async_request *req)
8480 +{
8481 +       return container_of(req, struct ahash_request, base);
8482 +}
8483 +
8484 +static inline void ahash_request_set_callback(struct ahash_request *req,
8485 +                                             u32 flags,
8486 +                                             crypto_completion_t complete,
8487 +                                             void *data)
8488 +{
8489 +       req->base.complete = complete;
8490 +       req->base.data = data;
8491 +       req->base.flags = flags;
8492 +}
8493 +
8494 +static inline void ahash_request_set_crypt(struct ahash_request *req,
8495 +                                          struct scatterlist *src, u8 *result,
8496 +                                          unsigned int nbytes)
8497 +{
8498 +       req->src = src;
8499 +       req->nbytes = nbytes;
8500 +       req->result = result;
8501 +}
8502 +
8503 +#endif /* _CRYPTO_HASH_H */
8504 --- /dev/null
8505 +++ b/include/crypto/internal/hash.h
8506 @@ -0,0 +1,78 @@
8507 +/*
8508 + * Hash algorithms.
8509 + *
8510 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8511 + *
8512 + * This program is free software; you can redistribute it and/or modify it
8513 + * under the terms of the GNU General Public License as published by the Free
8514 + * Software Foundation; either version 2 of the License, or (at your option)
8515 + * any later version.
8516 + *
8517 + */
8518 +
8519 +#ifndef _CRYPTO_INTERNAL_HASH_H
8520 +#define _CRYPTO_INTERNAL_HASH_H
8521 +
8522 +#include <crypto/algapi.h>
8523 +#include <crypto/hash.h>
8524 +
8525 +struct ahash_request;
8526 +struct scatterlist;
8527 +
8528 +struct crypto_hash_walk {
8529 +       char *data;
8530 +
8531 +       unsigned int offset;
8532 +       unsigned int alignmask;
8533 +
8534 +       struct page *pg;
8535 +       unsigned int entrylen;
8536 +
8537 +       unsigned int total;
8538 +       struct scatterlist *sg;
8539 +
8540 +       unsigned int flags;
8541 +};
8542 +
8543 +extern const struct crypto_type crypto_ahash_type;
8544 +
8545 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err);
8546 +int crypto_hash_walk_first(struct ahash_request *req,
8547 +                          struct crypto_hash_walk *walk);
8548 +
8549 +static inline void *crypto_ahash_ctx(struct crypto_ahash *tfm)
8550 +{
8551 +       return crypto_tfm_ctx(&tfm->base);
8552 +}
8553 +
8554 +static inline struct ahash_alg *crypto_ahash_alg(
8555 +       struct crypto_ahash *tfm)
8556 +{
8557 +       return &crypto_ahash_tfm(tfm)->__crt_alg->cra_ahash;
8558 +}
8559 +
8560 +static inline int ahash_enqueue_request(struct crypto_queue *queue,
8561 +                                            struct ahash_request *request)
8562 +{
8563 +       return crypto_enqueue_request(queue, &request->base);
8564 +}
8565 +
8566 +static inline struct ahash_request *ahash_dequeue_request(
8567 +       struct crypto_queue *queue)
8568 +{
8569 +       return ahash_request_cast(crypto_dequeue_request(queue));
8570 +}
8571 +
8572 +static inline void *ahash_request_ctx(struct ahash_request *req)
8573 +{
8574 +       return req->__ctx;
8575 +}
8576 +
8577 +static inline int ahash_tfm_in_queue(struct crypto_queue *queue,
8578 +                                         struct crypto_ahash *tfm)
8579 +{
8580 +       return crypto_tfm_in_queue(queue, crypto_ahash_tfm(tfm));
8581 +}
8582 +
8583 +#endif /* _CRYPTO_INTERNAL_HASH_H */
8584 +
8585 --- a/include/linux/crypto.h
8586 +++ b/include/linux/crypto.h
8587 @@ -30,15 +30,17 @@
8588   */
8589  #define CRYPTO_ALG_TYPE_MASK           0x0000000f
8590  #define CRYPTO_ALG_TYPE_CIPHER         0x00000001
8591 -#define CRYPTO_ALG_TYPE_DIGEST         0x00000002
8592 -#define CRYPTO_ALG_TYPE_HASH           0x00000003
8593 +#define CRYPTO_ALG_TYPE_COMPRESS       0x00000002
8594 +#define CRYPTO_ALG_TYPE_AEAD           0x00000003
8595  #define CRYPTO_ALG_TYPE_BLKCIPHER      0x00000004
8596  #define CRYPTO_ALG_TYPE_ABLKCIPHER     0x00000005
8597  #define CRYPTO_ALG_TYPE_GIVCIPHER      0x00000006
8598 -#define CRYPTO_ALG_TYPE_COMPRESS       0x00000008
8599 -#define CRYPTO_ALG_TYPE_AEAD           0x00000009
8600 +#define CRYPTO_ALG_TYPE_DIGEST         0x00000008
8601 +#define CRYPTO_ALG_TYPE_HASH           0x00000009
8602 +#define CRYPTO_ALG_TYPE_AHASH          0x0000000a
8603  
8604  #define CRYPTO_ALG_TYPE_HASH_MASK      0x0000000e
8605 +#define CRYPTO_ALG_TYPE_AHASH_MASK     0x0000000c
8606  #define CRYPTO_ALG_TYPE_BLKCIPHER_MASK 0x0000000c
8607  
8608  #define CRYPTO_ALG_LARVAL              0x00000010
8609 @@ -102,6 +104,7 @@
8610  struct crypto_aead;
8611  struct crypto_blkcipher;
8612  struct crypto_hash;
8613 +struct crypto_ahash;
8614  struct crypto_tfm;
8615  struct crypto_type;
8616  struct aead_givcrypt_request;
8617 @@ -131,6 +134,16 @@
8618         void *__ctx[] CRYPTO_MINALIGN_ATTR;
8619  };
8620  
8621 +struct ahash_request {
8622 +       struct crypto_async_request base;
8623 +
8624 +       unsigned int nbytes;
8625 +       struct scatterlist *src;
8626 +       u8                 *result;
8627 +
8628 +       void *__ctx[] CRYPTO_MINALIGN_ATTR;
8629 +};
8630 +
8631  /**
8632   *     struct aead_request - AEAD request
8633   *     @base: Common attributes for async crypto requests
8634 @@ -195,6 +208,17 @@
8635         unsigned int ivsize;
8636  };
8637  
8638 +struct ahash_alg {
8639 +       int (*init)(struct ahash_request *req);
8640 +       int (*update)(struct ahash_request *req);
8641 +       int (*final)(struct ahash_request *req);
8642 +       int (*digest)(struct ahash_request *req);
8643 +       int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8644 +                       unsigned int keylen);
8645 +
8646 +       unsigned int digestsize;
8647 +};
8648 +
8649  struct aead_alg {
8650         int (*setkey)(struct crypto_aead *tfm, const u8 *key,
8651                       unsigned int keylen);
8652 @@ -272,6 +296,7 @@
8653  #define cra_cipher     cra_u.cipher
8654  #define cra_digest     cra_u.digest
8655  #define cra_hash       cra_u.hash
8656 +#define cra_ahash      cra_u.ahash
8657  #define cra_compress   cra_u.compress
8658  
8659  struct crypto_alg {
8660 @@ -298,6 +323,7 @@
8661                 struct cipher_alg cipher;
8662                 struct digest_alg digest;
8663                 struct hash_alg hash;
8664 +               struct ahash_alg ahash;
8665                 struct compress_alg compress;
8666         } cra_u;
8667  
8668 @@ -383,6 +409,18 @@
8669         unsigned int digestsize;
8670  };
8671  
8672 +struct ahash_tfm {
8673 +       int (*init)(struct ahash_request *req);
8674 +       int (*update)(struct ahash_request *req);
8675 +       int (*final)(struct ahash_request *req);
8676 +       int (*digest)(struct ahash_request *req);
8677 +       int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8678 +                       unsigned int keylen);
8679 +
8680 +       unsigned int digestsize;
8681 +       unsigned int reqsize;
8682 +};
8683 +
8684  struct compress_tfm {
8685         int (*cot_compress)(struct crypto_tfm *tfm,
8686                             const u8 *src, unsigned int slen,
8687 @@ -397,6 +435,7 @@
8688  #define crt_blkcipher  crt_u.blkcipher
8689  #define crt_cipher     crt_u.cipher
8690  #define crt_hash       crt_u.hash
8691 +#define crt_ahash      crt_u.ahash
8692  #define crt_compress   crt_u.compress
8693  
8694  struct crypto_tfm {
8695 @@ -409,6 +448,7 @@
8696                 struct blkcipher_tfm blkcipher;
8697                 struct cipher_tfm cipher;
8698                 struct hash_tfm hash;
8699 +               struct ahash_tfm ahash;
8700                 struct compress_tfm compress;
8701         } crt_u;
8702