1 --- a/drivers/mtd/chips/Config.in
2 +++ b/drivers/mtd/chips/Config.in
4 dep_tristate ' Support for Intel/Sharp flash chips' CONFIG_MTD_CFI_INTELEXT $CONFIG_MTD_GEN_PROBE
5 dep_tristate ' Support for AMD/Fujitsu flash chips' CONFIG_MTD_CFI_AMDSTD $CONFIG_MTD_GEN_PROBE
6 dep_tristate ' Support for ST (Advanced Architecture) flash chips' CONFIG_MTD_CFI_STAA $CONFIG_MTD_GEN_PROBE
7 +dep_tristate ' Support for SST flash chips' CONFIG_MTD_CFI_SSTSTD $CONFIG_MTD_GEN_PROBE
9 dep_tristate ' Support for RAM chips in bus mapping' CONFIG_MTD_RAM $CONFIG_MTD
10 dep_tristate ' Support for ROM chips in bus mapping' CONFIG_MTD_ROM $CONFIG_MTD
11 --- a/drivers/mtd/chips/Makefile
12 +++ b/drivers/mtd/chips/Makefile
13 @@ -18,6 +18,7 @@ obj-$(CONFIG_MTD) += chipreg.o
14 obj-$(CONFIG_MTD_AMDSTD) += amd_flash.o
15 obj-$(CONFIG_MTD_CFI) += cfi_probe.o
16 obj-$(CONFIG_MTD_CFI_STAA) += cfi_cmdset_0020.o
17 +obj-$(CONFIG_MTD_CFI_SSTSTD) += cfi_cmdset_0701.o
18 obj-$(CONFIG_MTD_CFI_AMDSTD) += cfi_cmdset_0002.o
19 obj-$(CONFIG_MTD_CFI_INTELEXT) += cfi_cmdset_0001.o
20 obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o
22 +++ b/drivers/mtd/chips/cfi_cmdset_0701.c
25 + * Common Flash Interface support:
26 + * SST Standard Vendor Command Set (ID 0x0701)
28 + * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
30 + * 2_by_8 routines added by Simon Munton
34 + * $Id: cfi_cmdset_0701.c,v 1.1 2005/03/16 13:50:00 wbx Exp $
38 +#include <linux/module.h>
39 +#include <linux/types.h>
40 +#include <linux/kernel.h>
41 +#include <linux/sched.h>
43 +#include <asm/byteorder.h>
45 +#include <linux/errno.h>
46 +#include <linux/slab.h>
47 +#include <linux/delay.h>
48 +#include <linux/interrupt.h>
49 +#include <linux/mtd/map.h>
50 +#include <linux/mtd/cfi.h>
52 +static int cfi_sststd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
53 +static int cfi_sststd_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
54 +static int cfi_sststd_erase_onesize(struct mtd_info *, struct erase_info *);
55 +static int cfi_sststd_erase_varsize(struct mtd_info *, struct erase_info *);
56 +static void cfi_sststd_sync (struct mtd_info *);
57 +static int cfi_sststd_suspend (struct mtd_info *);
58 +static void cfi_sststd_resume (struct mtd_info *);
60 +static void cfi_sststd_destroy(struct mtd_info *);
62 +struct mtd_info *cfi_cmdset_0701(struct map_info *, int);
63 +static struct mtd_info *cfi_sststd_setup (struct map_info *);
66 +static struct mtd_chip_driver cfi_sststd_chipdrv = {
67 + probe: NULL, /* Not usable directly */
68 + destroy: cfi_sststd_destroy,
69 + name: "cfi_cmdset_0701",
73 +struct mtd_info *cfi_cmdset_0701(struct map_info *map, int primary)
75 + struct cfi_private *cfi = map->fldrv_priv;
76 + int ofs_factor = cfi->interleave * cfi->device_type;
79 + __u32 base = cfi->chips[0].start;
81 + if (cfi->cfi_mode==1){
82 + __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
84 + cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
85 + cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
86 + cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
88 + major = cfi_read_query(map, base + (adr+3)*ofs_factor);
89 + minor = cfi_read_query(map, base + (adr+4)*ofs_factor);
91 + printk(" SST Query Table v%c.%c at 0x%4.4X\n",
93 + cfi_send_gen_cmd(0xf0, 0x5555, base, map, cfi, cfi->device_type, NULL);
95 + cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
96 + cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
97 + cfi_send_gen_cmd(0x90, 0x5555, base, map, cfi, cfi->device_type, NULL);
98 + cfi->mfr = cfi_read_query(map, base);
99 + cfi->id = cfi_read_query(map, base + ofs_factor);
101 + cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
102 + cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
103 + cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
105 + switch (cfi->device_type) {
106 + case CFI_DEVICETYPE_X16:
107 + cfi->addr_unlock1 = 0x5555;
108 + cfi->addr_unlock2 = 0x2AAA;
111 + printk(KERN_NOTICE "Eep. Unknown cfi_cmdset_0701 device type %d\n", cfi->device_type);
116 + for (i=0; i< cfi->numchips; i++) {
117 + cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
118 + cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
119 + cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
122 + map->fldrv = &cfi_sststd_chipdrv;
125 + cfi_send_gen_cmd(0xf0, 0x5555, base, map, cfi, cfi->device_type, NULL);
126 + return cfi_sststd_setup(map);
129 +static struct mtd_info *cfi_sststd_setup(struct map_info *map)
131 + struct cfi_private *cfi = map->fldrv_priv;
132 + struct mtd_info *mtd;
133 + unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
135 + mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
136 + printk("number of %s chips: %d\n", (cfi->cfi_mode)?"JEDEC":"CFI",cfi->numchips);
139 + printk("Failed to allocate memory for MTD device\n");
140 + kfree(cfi->cmdset_priv);
144 + memset(mtd, 0, sizeof(*mtd));
146 + mtd->type = MTD_NORFLASH;
147 + /* Also select the correct geometry setup too */
148 + mtd->size = devsize * cfi->numchips;
150 + if (cfi->cfiq->NumEraseRegions == 1) {
151 + /* No need to muck about with multiple erase sizes */
152 + mtd->erasesize = ((cfi->cfiq->EraseRegionInfo[0] >> 8) & ~0xff) * cfi->interleave;
154 + unsigned long offset = 0;
157 + mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
158 + mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) * mtd->numeraseregions, GFP_KERNEL);
159 + if (!mtd->eraseregions) {
160 + printk("Failed to allocate memory for MTD erase region info\n");
161 + kfree(cfi->cmdset_priv);
165 + for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
166 + unsigned long ernum, ersize;
167 + ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
168 + ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
170 + if (mtd->erasesize < ersize) {
171 + mtd->erasesize = ersize;
173 + for (j=0; j<cfi->numchips; j++) {
174 + mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
175 + mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
176 + mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
178 + offset += (ersize * ernum);
182 + for (i=0; i<mtd->numeraseregions;i++){
183 + printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",
184 + i,mtd->eraseregions[i].offset,
185 + mtd->eraseregions[i].erasesize,
186 + mtd->eraseregions[i].numblocks);
190 + switch (CFIDEV_BUSWIDTH)
195 + if (mtd->numeraseregions > 1)
196 + mtd->erase = cfi_sststd_erase_varsize;
198 + mtd->erase = cfi_sststd_erase_onesize;
199 + mtd->read = cfi_sststd_read;
200 + mtd->write = cfi_sststd_write;
204 + printk("Unsupported buswidth\n");
206 + kfree(cfi->cmdset_priv);
210 + mtd->sync = cfi_sststd_sync;
211 + mtd->suspend = cfi_sststd_suspend;
212 + mtd->resume = cfi_sststd_resume;
213 + mtd->flags = MTD_CAP_NORFLASH;
214 + map->fldrv = &cfi_sststd_chipdrv;
215 + mtd->name = map->name;
220 +static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
222 + DECLARE_WAITQUEUE(wait, current);
223 + unsigned long timeo = jiffies + HZ;
226 + cfi_spin_lock(chip->mutex);
228 + if (chip->state != FL_READY){
229 + printk("Waiting for chip to read, status = %d\n", chip->state);
230 + set_current_state(TASK_UNINTERRUPTIBLE);
231 + add_wait_queue(&chip->wq, &wait);
233 + cfi_spin_unlock(chip->mutex);
236 + remove_wait_queue(&chip->wq, &wait);
237 + timeo = jiffies + HZ;
242 + adr += chip->start;
244 + chip->state = FL_READY;
246 + map->copy_from(map, buf, adr, len);
248 + wake_up(&chip->wq);
249 + cfi_spin_unlock(chip->mutex);
254 +static int cfi_sststd_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
256 + struct map_info *map = mtd->priv;
257 + struct cfi_private *cfi = map->fldrv_priv;
262 + /* ofs: offset within the first chip that the first read should start */
264 + chipnum = (from >> cfi->chipshift);
265 + ofs = from - (chipnum << cfi->chipshift);
271 + unsigned long thislen;
273 + if (chipnum >= cfi->numchips)
276 + if ((len + ofs -1) >> cfi->chipshift)
277 + thislen = (1<<cfi->chipshift) - ofs;
281 + ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
285 + *retlen += thislen;
295 +static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, __u32 datum, int fast)
297 + unsigned long timeo = jiffies + HZ;
298 + unsigned int Last[4];
299 + unsigned long Count = 0;
300 + struct cfi_private *cfi = map->fldrv_priv;
301 + DECLARE_WAITQUEUE(wait, current);
305 + cfi_spin_lock(chip->mutex);
307 + if (chip->state != FL_READY){
308 + printk("Waiting for chip to write, status = %d\n", chip->state);
309 + set_current_state(TASK_UNINTERRUPTIBLE);
310 + add_wait_queue(&chip->wq, &wait);
312 + cfi_spin_unlock(chip->mutex);
315 + remove_wait_queue(&chip->wq, &wait);
316 + printk("Wake up to write:\n");
317 + timeo = jiffies + HZ;
322 + chip->state = FL_WRITING;
324 + adr += chip->start;
326 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
327 + cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
328 + cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
330 + cfi_write(map, datum, adr);
332 + cfi_spin_unlock(chip->mutex);
333 + cfi_udelay(chip->word_write_time);
334 + cfi_spin_lock(chip->mutex);
336 + Last[0] = cfi_read(map, adr);
337 + // printk("Last[0] is %x\n", Last[0]);
338 + Last[1] = cfi_read(map, adr);
339 + // printk("Last[1] is %x\n", Last[1]);
340 + Last[2] = cfi_read(map, adr);
341 + // printk("Last[2] is %x\n", Last[2]);
343 + for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] && Count < 10000; Count++){
344 + cfi_spin_unlock(chip->mutex);
346 + cfi_spin_lock(chip->mutex);
348 + Last[Count % 4] = cfi_read(map, adr);
349 + // printk("Last[%d%%4] is %x\n", Count, Last[Count%4]);
352 + if (Last[(Count - 1) % 4] != datum){
353 + printk("Last[%ld] is %x, datum is %x\n",(Count - 1) % 4,Last[(Count - 1) % 4],datum);
354 + cfi_send_gen_cmd(0xF0, 0, chip->start, map, cfi, cfi->device_type, NULL);
359 + chip->state = FL_READY;
360 + wake_up(&chip->wq);
361 + cfi_spin_unlock(chip->mutex);
366 +static int cfi_sststd_write (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
368 + struct map_info *map = mtd->priv;
369 + struct cfi_private *cfi = map->fldrv_priv;
372 + unsigned long ofs, chipstart;
378 + chipnum = to >> cfi->chipshift;
379 + ofs = to - (chipnum << cfi->chipshift);
380 + chipstart = cfi->chips[chipnum].start;
382 + /* If it's not bus-aligned, do the first byte write */
383 + if (ofs & (CFIDEV_BUSWIDTH-1)) {
384 + unsigned long bus_ofs = ofs & ~(CFIDEV_BUSWIDTH-1);
385 + int i = ofs - bus_ofs;
390 + map->copy_from(map, tmp_buf, bus_ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);
391 + while (len && i < CFIDEV_BUSWIDTH)
392 + tmp_buf[i++] = buf[n++], len--;
394 + if (cfi_buswidth_is_2()) {
395 + datum = *(__u16*)tmp_buf;
396 + } else if (cfi_buswidth_is_4()) {
397 + datum = *(__u32*)tmp_buf;
399 + return -EINVAL; /* should never happen, but be safe */
402 + ret = do_write_oneword(map, &cfi->chips[chipnum],
403 + bus_ofs, datum, 0);
411 + if (ofs >> cfi->chipshift) {
414 + if (chipnum == cfi->numchips)
419 + /* We are now aligned, write as much as possible */
420 + while(len >= CFIDEV_BUSWIDTH) {
423 + if (cfi_buswidth_is_1()) {
424 + datum = *(__u8*)buf;
425 + } else if (cfi_buswidth_is_2()) {
426 + datum = *(__u16*)buf;
427 + } else if (cfi_buswidth_is_4()) {
428 + datum = *(__u32*)buf;
432 + ret = do_write_oneword(map, &cfi->chips[chipnum],
433 + ofs, datum, cfi->fast_prog);
438 + ofs += CFIDEV_BUSWIDTH;
439 + buf += CFIDEV_BUSWIDTH;
440 + (*retlen) += CFIDEV_BUSWIDTH;
441 + len -= CFIDEV_BUSWIDTH;
443 + if (ofs >> cfi->chipshift) {
446 + if (chipnum == cfi->numchips)
448 + chipstart = cfi->chips[chipnum].start;
452 + if (len & (CFIDEV_BUSWIDTH-1)) {
457 + map->copy_from(map, tmp_buf, ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);
459 + tmp_buf[i++] = buf[n++];
461 + if (cfi_buswidth_is_2()) {
462 + datum = *(__u16*)tmp_buf;
463 + } else if (cfi_buswidth_is_4()) {
464 + datum = *(__u32*)tmp_buf;
466 + return -EINVAL; /* should never happen, but be safe */
469 + ret = do_write_oneword(map, &cfi->chips[chipnum],
480 +static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
482 + unsigned int status;
483 + unsigned long timeo = jiffies + HZ;
484 + struct cfi_private *cfi = map->fldrv_priv;
485 + unsigned int rdy_mask;
486 + DECLARE_WAITQUEUE(wait, current);
489 + cfi_spin_lock(chip->mutex);
491 + if (chip->state != FL_READY){
492 + set_current_state(TASK_UNINTERRUPTIBLE);
493 + add_wait_queue(&chip->wq, &wait);
495 + cfi_spin_unlock(chip->mutex);
498 + remove_wait_queue(&chip->wq, &wait);
499 + timeo = jiffies + HZ;
504 + chip->state = FL_ERASING;
506 + adr += chip->start;
508 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
509 + cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
510 + cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
511 + cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
512 + cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
513 + cfi_write(map, CMD(0x30), adr);
515 + timeo = jiffies + (HZ*20);
517 + cfi_spin_unlock(chip->mutex);
518 + schedule_timeout(HZ);
519 + cfi_spin_lock(chip->mutex);
521 + rdy_mask = CMD(0x80);
523 + /* Once the state machine's known to be working I'll do that */
525 + while ( ( (status = cfi_read(map,adr)) & rdy_mask ) != rdy_mask ) {
528 + if (chip->state != FL_ERASING) {
529 + /* Someone's suspended the erase. Sleep */
530 + set_current_state(TASK_UNINTERRUPTIBLE);
531 + add_wait_queue(&chip->wq, &wait);
533 + cfi_spin_unlock(chip->mutex);
534 + printk("erase suspended. Sleeping\n");
537 + remove_wait_queue(&chip->wq, &wait);
538 + timeo = jiffies + (HZ*2);
539 + cfi_spin_lock(chip->mutex);
543 + /* OK Still waiting */
544 + if (time_after(jiffies, timeo)) {
545 + chip->state = FL_READY;
546 + cfi_spin_unlock(chip->mutex);
547 + printk("waiting for erase to complete timed out.");
552 + /* Latency issues. Drop the lock, wait a while and retry */
553 + cfi_spin_unlock(chip->mutex);
556 + if ( 0 && !(z % 100 ))
557 + printk("chip not ready yet after erase. looping\n");
561 + cfi_spin_lock(chip->mutex);
565 + /* Done and happy. */
567 + chip->state = FL_READY;
568 + wake_up(&chip->wq);
569 + cfi_spin_unlock(chip->mutex);
573 +static int cfi_sststd_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
575 + struct map_info *map = mtd->priv;
576 + struct cfi_private *cfi = map->fldrv_priv;
577 + unsigned long adr, len;
578 + int chipnum, ret = 0;
580 + struct mtd_erase_region_info *regions = mtd->eraseregions;
582 + if (instr->addr > mtd->size)
585 + if ((instr->len + instr->addr) > mtd->size)
588 + /* Check that both start and end of the requested erase are
589 + * aligned with the erasesize at the appropriate addresses.
594 + /* Skip all erase regions which are ended before the start of
595 + the requested erase. Actually, to save on the calculations,
596 + we skip to the first erase region which starts after the
597 + start of the requested erase, and then go back one.
600 + while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)
604 + /* OK, now i is pointing at the erase region in which this
605 + erase request starts. Check the start of the requested
606 + erase range is aligned with the erase size which is in
610 + if (instr->addr & (regions[i].erasesize-1))
613 + /* Remember the erase region we start on */
616 + /* Next, check that the end of the requested erase is aligned
617 + * with the erase region at that address.
620 + while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)
623 + /* As before, drop back one to point at the region in which
624 + the address actually falls
628 + if ((instr->addr + instr->len) & (regions[i].erasesize-1))
631 + chipnum = instr->addr >> cfi->chipshift;
632 + adr = instr->addr - (chipnum << cfi->chipshift);
638 + ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
643 + adr += regions[i].erasesize;
644 + len -= regions[i].erasesize;
646 + if (adr % (1<< cfi->chipshift) == ((regions[i].offset + (regions[i].erasesize * regions[i].numblocks)) %( 1<< cfi->chipshift)))
649 + if (adr >> cfi->chipshift) {
653 + if (chipnum >= cfi->numchips)
658 + instr->state = MTD_ERASE_DONE;
659 + if (instr->callback)
660 + instr->callback(instr);
665 +static int cfi_sststd_erase_onesize(struct mtd_info *mtd, struct erase_info *instr)
667 + struct map_info *map = mtd->priv;
668 + struct cfi_private *cfi = map->fldrv_priv;
669 + unsigned long adr, len;
670 + int chipnum, ret = 0;
672 + if (instr->addr & (mtd->erasesize - 1))
675 + if (instr->len & (mtd->erasesize -1))
678 + if ((instr->len + instr->addr) > mtd->size)
681 + chipnum = instr->addr >> cfi->chipshift;
682 + adr = instr->addr - (chipnum << cfi->chipshift);
686 + ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
691 + adr += mtd->erasesize;
692 + len -= mtd->erasesize;
694 + if (adr >> cfi->chipshift) {
698 + if (chipnum >= cfi->numchips)
703 + instr->state = MTD_ERASE_DONE;
704 + if (instr->callback)
705 + instr->callback(instr);
710 +static void cfi_sststd_sync (struct mtd_info *mtd)
712 + struct map_info *map = mtd->priv;
713 + struct cfi_private *cfi = map->fldrv_priv;
715 + struct flchip *chip;
717 + DECLARE_WAITQUEUE(wait, current);
719 + for (i=0; !ret && i<cfi->numchips; i++) {
720 + chip = &cfi->chips[i];
723 + cfi_spin_lock(chip->mutex);
725 + switch(chip->state) {
729 + case FL_JEDEC_QUERY:
730 + chip->oldstate = chip->state;
731 + chip->state = FL_SYNCING;
732 + /* No need to wake_up() on this state change -
733 + * as the whole point is that nobody can do anything
734 + * with the chip now anyway.
737 + cfi_spin_unlock(chip->mutex);
741 + /* Not an idle state */
742 + add_wait_queue(&chip->wq, &wait);
744 + cfi_spin_unlock(chip->mutex);
748 + remove_wait_queue(&chip->wq, &wait);
754 + /* Unlock the chips again */
756 + for (i--; i >=0; i--) {
757 + chip = &cfi->chips[i];
759 + cfi_spin_lock(chip->mutex);
761 + if (chip->state == FL_SYNCING) {
762 + chip->state = chip->oldstate;
763 + wake_up(&chip->wq);
765 + cfi_spin_unlock(chip->mutex);
770 +static int cfi_sststd_suspend(struct mtd_info *mtd)
772 + struct map_info *map = mtd->priv;
773 + struct cfi_private *cfi = map->fldrv_priv;
775 + struct flchip *chip;
777 +//printk("suspend\n");
779 + for (i=0; !ret && i<cfi->numchips; i++) {
780 + chip = &cfi->chips[i];
782 + cfi_spin_lock(chip->mutex);
784 + switch(chip->state) {
788 + case FL_JEDEC_QUERY:
789 + chip->oldstate = chip->state;
790 + chip->state = FL_PM_SUSPENDED;
791 + /* No need to wake_up() on this state change -
792 + * as the whole point is that nobody can do anything
793 + * with the chip now anyway.
795 + case FL_PM_SUSPENDED:
802 + cfi_spin_unlock(chip->mutex);
805 + /* Unlock the chips again */
808 + for (i--; i >=0; i--) {
809 + chip = &cfi->chips[i];
811 + cfi_spin_lock(chip->mutex);
813 + if (chip->state == FL_PM_SUSPENDED) {
814 + chip->state = chip->oldstate;
815 + wake_up(&chip->wq);
817 + cfi_spin_unlock(chip->mutex);
824 +static void cfi_sststd_resume(struct mtd_info *mtd)
826 + struct map_info *map = mtd->priv;
827 + struct cfi_private *cfi = map->fldrv_priv;
829 + struct flchip *chip;
830 +//printk("resume\n");
832 + for (i=0; i<cfi->numchips; i++) {
834 + chip = &cfi->chips[i];
836 + cfi_spin_lock(chip->mutex);
838 + if (chip->state == FL_PM_SUSPENDED) {
839 + chip->state = FL_READY;
840 + cfi_write(map, CMD(0xF0), chip->start);
841 + wake_up(&chip->wq);
844 + printk("Argh. Chip not in PM_SUSPENDED state upon resume()\n");
846 + cfi_spin_unlock(chip->mutex);
850 +static void cfi_sststd_destroy(struct mtd_info *mtd)
852 + struct map_info *map = mtd->priv;
853 + struct cfi_private *cfi = map->fldrv_priv;
854 + kfree(cfi->cmdset_priv);
858 +#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
859 +#define cfi_sststd_init init_module
860 +#define cfi_sststd_exit cleanup_module
863 +static char im_name[]="cfi_cmdset_0701";
865 +mod_init_t cfi_sststd_init(void)
867 + inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0701);
871 +mod_exit_t cfi_sststd_exit(void)
873 + inter_module_unregister(im_name);
876 +module_init(cfi_sststd_init);
877 +module_exit(cfi_sststd_exit);
879 --- a/drivers/mtd/chips/cfi_probe.c
880 +++ b/drivers/mtd/chips/cfi_probe.c
881 @@ -67,8 +67,15 @@ static int cfi_probe_chip(struct map_inf
882 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
883 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);
885 - if (!qry_present(map,base,cfi))
887 + if (!qry_present(map,base,cfi)) {
888 + /* rather broken SST cfi probe (requires SST unlock) */
889 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
890 + cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
891 + cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
892 + cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
893 + if (!qry_present(map,base,cfi))
897 if (!cfi->numchips) {
898 /* This is the first time we're called. Set up the CFI
899 --- a/drivers/mtd/chips/gen_probe.c
900 +++ b/drivers/mtd/chips/gen_probe.c
901 @@ -328,13 +328,18 @@ static struct mtd_info *check_cmd_set(st
902 return cfi_cmdset_0001(map, primary);
904 #ifdef CONFIG_MTD_CFI_AMDSTD
907 return cfi_cmdset_0002(map, primary);
909 #ifdef CONFIG_MTD_CFI_STAA
912 return cfi_cmdset_0020(map, primary);
914 +#ifdef CONFIG_MTD_CFI_SSTSTD
916 + return cfi_cmdset_0701(map, primary);
920 return cfi_cmdset_unknown(map, primary);