1 commit 152a2a8b5e1d4cbe91a7c66f1028db15164a3766
2 Author: David Woodhouse <David.Woodhouse@intel.com>
3 Date: Wed Dec 19 11:01:21 2012 +0000
5 solos-pci: ensure all TX packets are aligned to 4 bytes
7 The FPGA can't handled unaligned DMA (yet). So copy into an aligned buffer,
8 if skb->data isn't suitably aligned.
10 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
13 commit 13af816469db3449c072afbae6c4c1bd9ccecccb
14 Author: Nathan Williams <nathan@traverse.com.au>
15 Date: Wed Dec 19 11:01:20 2012 +0000
17 solos-pci: add firmware upgrade support for new models
19 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
20 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
21 Signed-off-by: David S. Miller <davem@davemloft.net>
23 commit 7fbdadb5e951e4f0c0fc991ff5f50295568786e6
24 Author: Nathan Williams <nathan@traverse.com.au>
25 Date: Wed Dec 19 11:01:19 2012 +0000
27 solos-pci: remove superfluous debug output
29 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
30 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
31 Signed-off-by: David S. Miller <davem@davemloft.net>
33 commit f9baad02e7411d9f38d5ebe1a1cdcde4ceec100d
34 Author: Nathan Williams <nathan@traverse.com.au>
35 Date: Wed Dec 19 11:01:18 2012 +0000
37 solos-pci: add GPIO support for newer versions on Geos board
39 dwmw2: Tidy up a little, simpler matching on which GPIO is being accessed,
40 only register on newer boards, register under PCI device instead of
41 duplicating them under each ATM device.
43 Signed-off-by: Nathan Williams <nathan@traverse.com.au>
44 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
45 Signed-off-by: David S. Miller <davem@davemloft.net>
48 There is a typo here so we do a double lock instead of an unlock.
50 Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
52 Only needed in linux-next. Introduced in f9baad02e7411d9 [14/17]
53 solos-pci: add GPIO support for newer versions on Geos board
56 --- a/drivers/atm/solos-pci.c
57 +++ b/drivers/atm/solos-pci.c
59 #include <linux/swab.h>
60 #include <linux/slab.h>
62 -#define VERSION "0.07"
63 +#define VERSION "1.04"
64 +#define DRIVER_VERSION 0x01
65 #define PTAG "solos-pci"
67 #define CONFIG_RAM_SIZE 128
69 #define FLASH_BUSY 0x60
70 #define FPGA_MODE 0x5C
71 #define FLASH_MODE 0x58
72 +#define GPIO_STATUS 0x54
73 +#define DRIVER_VER 0x50
74 #define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
75 #define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
77 #define DATA_RAM_SIZE 32768
79 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
80 -#define FPGA_PAGE 528 /* FPGA flash page size*/
81 -#define SOLOS_PAGE 512 /* Solos flash page size*/
82 -#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
83 -#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
84 +/* Old boards use ATMEL AD45DB161D flash */
85 +#define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
86 +#define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
87 +#define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
88 +#define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
89 +/* Current boards use M25P/M25PE SPI flash */
90 +#define SPI_FLASH_BLOCK (256 * 64)
92 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
93 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
94 @@ -123,11 +129,14 @@ struct solos_card {
95 struct sk_buff_head cli_queue[4];
96 struct sk_buff *tx_skb[4];
97 struct sk_buff *rx_skb[4];
98 + unsigned char *dma_bounce;
99 wait_queue_head_t param_wq;
100 wait_queue_head_t fw_wq;
109 @@ -452,7 +461,6 @@ static ssize_t console_show(struct devic
112 memcpy(buf, skb->data, len);
113 - dev_dbg(&card->dev->dev, "len: %d\n", len);
117 @@ -499,6 +507,78 @@ static ssize_t console_store(struct devi
121 +struct geos_gpio_attr {
122 + struct device_attribute attr;
126 +#define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \
127 + struct geos_gpio_attr gpio_attr_##_name = { \
128 + .attr = __ATTR(_name, _mode, _show, _store), \
129 + .offset = _offset }
131 +static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
132 + const char *buf, size_t count)
134 + struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
135 + struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
136 + struct solos_card *card = pci_get_drvdata(pdev);
139 + if (count != 1 && (count != 2 || buf[1] != '\n'))
142 + spin_lock_irq(&card->param_queue_lock);
143 + data32 = ioread32(card->config_regs + GPIO_STATUS);
144 + if (buf[0] == '1') {
145 + data32 |= 1 << gattr->offset;
146 + iowrite32(data32, card->config_regs + GPIO_STATUS);
147 + } else if (buf[0] == '0') {
148 + data32 &= ~(1 << gattr->offset);
149 + iowrite32(data32, card->config_regs + GPIO_STATUS);
153 + spin_unlock_irq(&card->param_queue_lock);
157 +static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
160 + struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
161 + struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
162 + struct solos_card *card = pci_get_drvdata(pdev);
165 + data32 = ioread32(card->config_regs + GPIO_STATUS);
166 + data32 = (data32 >> gattr->offset) & 1;
168 + return sprintf(buf, "%d\n", data32);
171 +static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
174 + struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
175 + struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
176 + struct solos_card *card = pci_get_drvdata(pdev);
179 + data32 = ioread32(card->config_regs + GPIO_STATUS);
180 + switch (gattr->offset) {
182 + /* HardwareVersion */
183 + data32 = data32 & 0x1F;
186 + /* HardwareVariant */
187 + data32 = (data32 >> 5) & 0x0F;
190 + return sprintf(buf, "%d\n", data32);
193 static DEVICE_ATTR(console, 0644, console_show, console_store);
196 @@ -507,6 +587,14 @@ static DEVICE_ATTR(console, 0644, consol
198 #include "solos-attrlist.c"
200 +static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
201 +static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
202 +static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
203 +static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
204 +static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
205 +static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
206 +static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
207 +static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
211 @@ -523,6 +611,23 @@ static struct attribute_group solos_attr
212 .name = "parameters",
215 +static struct attribute *gpio_attrs[] = {
216 + &gpio_attr_GPIO1.attr.attr,
217 + &gpio_attr_GPIO2.attr.attr,
218 + &gpio_attr_GPIO3.attr.attr,
219 + &gpio_attr_GPIO4.attr.attr,
220 + &gpio_attr_GPIO5.attr.attr,
221 + &gpio_attr_PushButton.attr.attr,
222 + &gpio_attr_HardwareVersion.attr.attr,
223 + &gpio_attr_HardwareVariant.attr.attr,
227 +static struct attribute_group gpio_attr_group = {
228 + .attrs = gpio_attrs,
232 static int flash_upgrade(struct solos_card *card, int chip)
234 const struct firmware *fw;
235 @@ -534,16 +639,25 @@ static int flash_upgrade(struct solos_ca
238 fw_name = "solos-FPGA.bin";
239 - blocksize = FPGA_BLOCK;
240 + if (card->atmel_flash)
241 + blocksize = ATMEL_FPGA_BLOCK;
243 + blocksize = SPI_FLASH_BLOCK;
246 fw_name = "solos-Firmware.bin";
247 - blocksize = SOLOS_BLOCK;
248 + if (card->atmel_flash)
249 + blocksize = ATMEL_SOLOS_BLOCK;
251 + blocksize = SPI_FLASH_BLOCK;
254 if (card->fpga_version > LEGACY_BUFFERS){
255 fw_name = "solos-db-FPGA.bin";
256 - blocksize = FPGA_BLOCK;
257 + if (card->atmel_flash)
258 + blocksize = ATMEL_FPGA_BLOCK;
260 + blocksize = SPI_FLASH_BLOCK;
262 dev_info(&card->dev->dev, "FPGA version doesn't support"
263 " daughter board upgrades\n");
264 @@ -553,7 +667,10 @@ static int flash_upgrade(struct solos_ca
266 if (card->fpga_version > LEGACY_BUFFERS){
267 fw_name = "solos-Firmware.bin";
268 - blocksize = SOLOS_BLOCK;
269 + if (card->atmel_flash)
270 + blocksize = ATMEL_SOLOS_BLOCK;
272 + blocksize = SPI_FLASH_BLOCK;
274 dev_info(&card->dev->dev, "FPGA version doesn't support"
275 " daughter board upgrades\n");
276 @@ -569,6 +686,9 @@ static int flash_upgrade(struct solos_ca
278 dev_info(&card->dev->dev, "Flash upgrade starting\n");
280 + /* New FPGAs require driver version before permitting flash upgrades */
281 + iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
283 numblocks = fw->size / blocksize;
284 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
285 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
286 @@ -598,9 +718,13 @@ static int flash_upgrade(struct solos_ca
287 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
288 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
290 - /* Copy block to buffer, swapping each 16 bits */
291 + /* Copy block to buffer, swapping each 16 bits for Atmel flash */
292 for(i = 0; i < blocksize; i += 4) {
293 - uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
295 + if (card->atmel_flash)
296 + word = swahb32p((uint32_t *)(fw->data + offset + i));
298 + word = *(uint32_t *)(fw->data + offset + i);
299 if(card->fpga_version > LEGACY_BUFFERS)
300 iowrite32(word, FLASH_BUF + i);
302 @@ -961,7 +1085,12 @@ static uint32_t fpga_tx(struct solos_car
303 tx_started |= 1 << port;
304 oldskb = skb; /* We're done with this skb already */
305 } else if (skb && card->using_dma) {
306 - SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
307 + unsigned char *data = skb->data;
308 + if ((unsigned long)data & card->dma_alignment) {
309 + data = card->dma_bounce + (BUF_SIZE * port);
310 + memcpy(data, skb->data, skb->len);
312 + SKB_CB(skb)->dma_addr = pci_map_single(card->dev, data,
313 skb->len, PCI_DMA_TODEVICE);
314 card->tx_skb[port] = skb;
315 iowrite32(SKB_CB(skb)->dma_addr,
316 @@ -1135,18 +1264,33 @@ static int fpga_probe(struct pci_dev *de
317 db_fpga_upgrade = db_firmware_upgrade = 0;
320 + /* Stopped using Atmel flash after 0.03-38 */
322 + card->atmel_flash = 1;
324 + card->atmel_flash = 0;
326 + data32 = ioread32(card->config_regs + PORTS);
327 + card->nr_ports = (data32 & 0x000000FF);
329 if (card->fpga_version >= DMA_SUPPORTED) {
332 + if (1) { /* All known FPGA versions so far */
333 + card->dma_alignment = 3;
334 + card->dma_bounce = kmalloc(card->nr_ports * BUF_SIZE, GFP_KERNEL);
335 + if (!card->dma_bounce) {
336 + dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
337 + /* Fallback to MMIO doesn't work */
338 + goto out_unmap_both;
343 /* Set RX empty flag for all ports */
344 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
347 - data32 = ioread32(card->config_regs + PORTS);
348 - card->nr_ports = (data32 & 0x000000FF);
350 pci_set_drvdata(dev, card);
352 tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
353 @@ -1181,6 +1325,10 @@ static int fpga_probe(struct pci_dev *de
357 + if (card->fpga_version >= DMA_SUPPORTED &&
358 + sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
359 + dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
364 @@ -1189,6 +1337,7 @@ static int fpga_probe(struct pci_dev *de
365 tasklet_kill(&card->tlet);
368 + kfree(card->dma_bounce);
369 pci_set_drvdata(dev, NULL);
370 pci_iounmap(dev, card->buffers);
372 @@ -1291,11 +1440,16 @@ static void fpga_remove(struct pci_dev *
373 iowrite32(1, card->config_regs + FPGA_MODE);
374 (void)ioread32(card->config_regs + FPGA_MODE);
376 + if (card->fpga_version >= DMA_SUPPORTED)
377 + sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
381 free_irq(dev->irq, card);
382 tasklet_kill(&card->tlet);
384 + kfree(card->dma_bounce);
386 /* Release device from reset */
387 iowrite32(0, card->config_regs + FPGA_MODE);
388 (void)ioread32(card->config_regs + FPGA_MODE);