1 --- a/drivers/ssb/Kconfig
2 +++ b/drivers/ssb/Kconfig
3 @@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
6 depends on SSB && GPIOLIB
7 + select IRQ_DOMAIN if SSB_EMBEDDED
9 Driver to provide access to the GPIO pins on the bus.
11 --- a/drivers/ssb/driver_chipcommon_sflash.c
12 +++ b/drivers/ssb/driver_chipcommon_sflash.c
13 @@ -37,7 +37,7 @@ static const struct ssb_sflash_tbl_e ssb
14 { "M25P32", 0x15, 0x10000, 64, },
15 { "M25P64", 0x16, 0x10000, 128, },
16 { "M25FL128", 0x17, 0x10000, 256, },
21 static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
22 @@ -55,7 +55,7 @@ static const struct ssb_sflash_tbl_e ssb
23 { "SST25VF016", 0x41, 0x1000, 512, },
24 { "SST25VF032", 0x4a, 0x1000, 1024, },
25 { "SST25VF064", 0x4b, 0x1000, 2048, },
30 static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
31 @@ -66,7 +66,7 @@ static const struct ssb_sflash_tbl_e ssb
32 { "AT45DB161", 0x2c, 512, 4096, },
33 { "AT45DB321", 0x34, 512, 8192, },
34 { "AT45DB642", 0x3c, 1024, 8192, },
39 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
40 --- a/drivers/ssb/driver_gpio.c
41 +++ b/drivers/ssb/driver_gpio.c
45 #include <linux/gpio.h>
46 +#include <linux/irq.h>
47 +#include <linux/interrupt.h>
48 +#include <linux/irqdomain.h>
49 #include <linux/export.h>
50 #include <linux/ssb/ssb.h>
52 #include "ssb_private.h"
55 +/**************************************************
57 + **************************************************/
59 static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
61 return container_of(chip, struct ssb_bus, gpio);
64 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
65 +static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
67 + struct ssb_bus *bus = ssb_gpio_get_bus(chip);
69 + if (bus->bustype == SSB_BUSTYPE_SSB)
70 + return irq_find_mapping(bus->irq_domain, gpio);
76 +/**************************************************
78 + **************************************************/
80 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
82 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
83 @@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
84 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
87 -static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
88 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
89 +static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
91 - struct ssb_bus *bus = ssb_gpio_get_bus(chip);
92 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
93 + int gpio = irqd_to_hwirq(d);
95 - if (bus->bustype == SSB_BUSTYPE_SSB)
96 - return ssb_mips_irq(bus->chipco.dev) + 2;
99 + ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
102 +static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
104 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
105 + int gpio = irqd_to_hwirq(d);
106 + u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
108 + ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
109 + ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
112 +static struct irq_chip ssb_gpio_irq_chipco_chip = {
113 + .name = "SSB-GPIO-CC",
114 + .irq_mask = ssb_gpio_irq_chipco_mask,
115 + .irq_unmask = ssb_gpio_irq_chipco_unmask,
118 +static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
120 + struct ssb_bus *bus = dev_id;
121 + struct ssb_chipcommon *chipco = &bus->chipco;
122 + u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
123 + u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
124 + u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
125 + unsigned long irqs = (val ^ pol) & mask;
131 + for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
132 + generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
133 + ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
135 + return IRQ_HANDLED;
138 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
140 + struct ssb_chipcommon *chipco = &bus->chipco;
141 + struct gpio_chip *chip = &bus->gpio;
142 + int gpio, hwirq, err;
144 + if (bus->bustype != SSB_BUSTYPE_SSB)
147 + bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
148 + &irq_domain_simple_ops, chipco);
149 + if (!bus->irq_domain) {
151 + goto err_irq_domain;
153 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
154 + int irq = irq_create_mapping(bus->irq_domain, gpio);
156 + irq_set_chip_data(irq, bus);
157 + irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
158 + handle_simple_irq);
161 + hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
162 + err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
167 + ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
168 + chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
173 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
174 + int irq = irq_find_mapping(bus->irq_domain, gpio);
176 + irq_dispose_mapping(irq);
178 + irq_domain_remove(bus->irq_domain);
183 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
185 + struct ssb_chipcommon *chipco = &bus->chipco;
186 + struct gpio_chip *chip = &bus->gpio;
189 + if (bus->bustype != SSB_BUSTYPE_SSB)
192 + chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
193 + free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
194 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
195 + int irq = irq_find_mapping(bus->irq_domain, gpio);
197 + irq_dispose_mapping(irq);
199 + irq_domain_remove(bus->irq_domain);
202 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
207 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
212 static int ssb_gpio_chipco_init(struct ssb_bus *bus)
214 struct gpio_chip *chip = &bus->gpio;
217 chip->label = "ssb_chipco_gpio";
218 chip->owner = THIS_MODULE;
219 @@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
220 chip->set = ssb_gpio_chipco_set_value;
221 chip->direction_input = ssb_gpio_chipco_direction_input;
222 chip->direction_output = ssb_gpio_chipco_direction_output;
223 - chip->to_irq = ssb_gpio_chipco_to_irq;
224 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
225 + chip->to_irq = ssb_gpio_to_irq;
228 /* There is just one SoC in one device and its GPIO addresses should be
229 * deterministic to address them more easily. The other buses could get
230 @@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
234 - return gpiochip_add(chip);
235 + err = ssb_gpio_irq_chipco_domain_init(bus);
239 + err = gpiochip_add(chip);
241 + ssb_gpio_irq_chipco_domain_exit(bus);
248 +/**************************************************
250 + **************************************************/
252 #ifdef CONFIG_SSB_DRIVER_EXTIF
254 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
255 @@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
259 -static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
260 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
261 +static void ssb_gpio_irq_extif_mask(struct irq_data *d)
263 - struct ssb_bus *bus = ssb_gpio_get_bus(chip);
264 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
265 + int gpio = irqd_to_hwirq(d);
267 - if (bus->bustype == SSB_BUSTYPE_SSB)
268 - return ssb_mips_irq(bus->extif.dev) + 2;
271 + ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
274 +static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
276 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
277 + int gpio = irqd_to_hwirq(d);
278 + u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
280 + ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
281 + ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
284 +static struct irq_chip ssb_gpio_irq_extif_chip = {
285 + .name = "SSB-GPIO-EXTIF",
286 + .irq_mask = ssb_gpio_irq_extif_mask,
287 + .irq_unmask = ssb_gpio_irq_extif_unmask,
290 +static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
292 + struct ssb_bus *bus = dev_id;
293 + struct ssb_extif *extif = &bus->extif;
294 + u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
295 + u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
296 + u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
297 + unsigned long irqs = (val ^ pol) & mask;
303 + for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
304 + generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
305 + ssb_extif_gpio_polarity(extif, irqs, val & irqs);
307 + return IRQ_HANDLED;
310 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
312 + struct ssb_extif *extif = &bus->extif;
313 + struct gpio_chip *chip = &bus->gpio;
314 + int gpio, hwirq, err;
316 + if (bus->bustype != SSB_BUSTYPE_SSB)
319 + bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
320 + &irq_domain_simple_ops, extif);
321 + if (!bus->irq_domain) {
323 + goto err_irq_domain;
325 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
326 + int irq = irq_create_mapping(bus->irq_domain, gpio);
328 + irq_set_chip_data(irq, bus);
329 + irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
330 + handle_simple_irq);
333 + hwirq = ssb_mips_irq(bus->extif.dev) + 2;
334 + err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
339 + ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
344 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
345 + int irq = irq_find_mapping(bus->irq_domain, gpio);
347 + irq_dispose_mapping(irq);
349 + irq_domain_remove(bus->irq_domain);
354 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
356 + struct ssb_extif *extif = &bus->extif;
357 + struct gpio_chip *chip = &bus->gpio;
360 + if (bus->bustype != SSB_BUSTYPE_SSB)
363 + free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
364 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
365 + int irq = irq_find_mapping(bus->irq_domain, gpio);
367 + irq_dispose_mapping(irq);
369 + irq_domain_remove(bus->irq_domain);
372 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
377 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
382 static int ssb_gpio_extif_init(struct ssb_bus *bus)
384 struct gpio_chip *chip = &bus->gpio;
387 chip->label = "ssb_extif_gpio";
388 chip->owner = THIS_MODULE;
389 @@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
390 chip->set = ssb_gpio_extif_set_value;
391 chip->direction_input = ssb_gpio_extif_direction_input;
392 chip->direction_output = ssb_gpio_extif_direction_output;
393 - chip->to_irq = ssb_gpio_extif_to_irq;
394 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
395 + chip->to_irq = ssb_gpio_to_irq;
398 /* There is just one SoC in one device and its GPIO addresses should be
399 * deterministic to address them more easily. The other buses could get
400 @@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
404 - return gpiochip_add(chip);
405 + err = ssb_gpio_irq_extif_domain_init(bus);
409 + err = gpiochip_add(chip);
411 + ssb_gpio_irq_extif_domain_exit(bus);
419 @@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
423 +/**************************************************
425 + **************************************************/
427 int ssb_gpio_init(struct ssb_bus *bus)
429 if (ssb_chipco_available(&bus->chipco))
430 --- a/drivers/ssb/main.c
431 +++ b/drivers/ssb/main.c
432 @@ -593,6 +593,13 @@ static int ssb_attach_queued_buses(void)
433 ssb_pcicore_init(&bus->pcicore);
434 if (bus->bustype == SSB_BUSTYPE_SSB)
435 ssb_watchdog_register(bus);
437 + err = ssb_gpio_init(bus);
438 + if (err == -ENOTSUPP)
439 + ssb_dbg("GPIO driver not activated\n");
441 + ssb_dbg("Error registering GPIO driver: %i\n", err);
443 ssb_bus_may_powerdown(bus);
445 err = ssb_devices_register(bus);
446 @@ -830,11 +837,6 @@ static int ssb_bus_register(struct ssb_b
447 ssb_chipcommon_init(&bus->chipco);
448 ssb_extif_init(&bus->extif);
449 ssb_mipscore_init(&bus->mipscore);
450 - err = ssb_gpio_init(bus);
451 - if (err == -ENOTSUPP)
452 - ssb_dbg("GPIO driver not activated\n");
454 - ssb_dbg("Error registering GPIO driver: %i\n", err);
455 err = ssb_fetch_invariants(bus, get_invariants);
457 ssb_bus_may_powerdown(bus);
458 --- a/drivers/ssb/pci.c
459 +++ b/drivers/ssb/pci.c
460 @@ -326,13 +326,13 @@ err_ctlreg:
464 -static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
465 - u16 mask, u16 shift)
466 +static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
467 + u16 mask, u16 shift)
472 - v = in[SPOFF(SSB_SPROM1_AGAIN)];
473 + v = in[SPOFF(offset)];
474 gain = (v & mask) >> shift;
476 gain = 2; /* If unset use 2dBm */
477 @@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss
478 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
480 /* Extract the antenna gain values. */
481 - out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
482 - SSB_SPROM1_AGAIN_BG,
483 - SSB_SPROM1_AGAIN_BG_SHIFT);
484 - out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
485 - SSB_SPROM1_AGAIN_A,
486 - SSB_SPROM1_AGAIN_A_SHIFT);
487 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
489 + SSB_SPROM1_AGAIN_BG,
490 + SSB_SPROM1_AGAIN_BG_SHIFT);
491 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
493 + SSB_SPROM1_AGAIN_A,
494 + SSB_SPROM1_AGAIN_A_SHIFT);
495 if (out->revision >= 2)
496 sprom_extract_r23(out, in);
498 @@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss
500 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
502 + static const u16 pwr_info_offset[] = {
503 + SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
504 + SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
509 + BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
510 + ARRAY_SIZE(out->core_pwr_info));
512 if (out->revision == 4)
513 il0mac_offset = SSB_SPROM4_IL0MAC;
514 @@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb
517 /* Extract the antenna gain values. */
518 - SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
519 - SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
520 - SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
521 - SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
522 - SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
523 - SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
524 - SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
525 - SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
526 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
527 + SSB_SPROM4_AGAIN01,
529 + SSB_SPROM4_AGAIN0_SHIFT);
530 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
531 + SSB_SPROM4_AGAIN01,
533 + SSB_SPROM4_AGAIN1_SHIFT);
534 + out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
535 + SSB_SPROM4_AGAIN23,
537 + SSB_SPROM4_AGAIN2_SHIFT);
538 + out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
539 + SSB_SPROM4_AGAIN23,
541 + SSB_SPROM4_AGAIN3_SHIFT);
543 + /* Extract cores power info info */
544 + for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
545 + u16 o = pwr_info_offset[i];
547 + SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
548 + SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
549 + SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
550 + SSB_SPROM4_2G_MAXP, 0);
552 + SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
553 + SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
554 + SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
555 + SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
557 + SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
558 + SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
559 + SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
560 + SSB_SPROM4_5G_MAXP, 0);
561 + SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
562 + SSB_SPROM4_5GH_MAXP, 0);
563 + SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
564 + SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
566 + SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
567 + SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
568 + SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
569 + SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
570 + SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
571 + SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
572 + SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
573 + SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
574 + SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
575 + SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
576 + SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
577 + SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
580 sprom_extract_r458(out, in);
582 @@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_
583 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
585 /* Extract the antenna gain values. */
586 - SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
587 - SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
588 - SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
589 - SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
590 - SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
591 - SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
592 - SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
593 - SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
594 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
595 + SSB_SPROM8_AGAIN01,
597 + SSB_SPROM8_AGAIN0_SHIFT);
598 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
599 + SSB_SPROM8_AGAIN01,
601 + SSB_SPROM8_AGAIN1_SHIFT);
602 + out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
603 + SSB_SPROM8_AGAIN23,
605 + SSB_SPROM8_AGAIN2_SHIFT);
606 + out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
607 + SSB_SPROM8_AGAIN23,
609 + SSB_SPROM8_AGAIN3_SHIFT);
611 /* Extract cores power info info */
612 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
613 --- a/include/linux/ssb/ssb.h
614 +++ b/include/linux/ssb/ssb.h
615 @@ -33,6 +33,7 @@ struct ssb_sprom {
616 u8 et1phyaddr; /* MII address for enet1 */
617 u8 et0mdcport; /* MDIO for enet0 */
618 u8 et1mdcport; /* MDIO for enet1 */
619 + u16 dev_id; /* Device ID overriding e.g. PCI ID */
620 u16 board_rev; /* Board revision number from SPROM. */
621 u16 board_num; /* Board number from SPROM. */
622 u16 board_type; /* Board type from SPROM. */
623 @@ -486,6 +487,7 @@ struct ssb_bus {
624 #endif /* EMBEDDED */
625 #ifdef CONFIG_SSB_DRIVER_GPIO
626 struct gpio_chip gpio;
627 + struct irq_domain *irq_domain;
628 #endif /* DRIVER_GPIO */
630 /* Internal-only stuff follows. Do not touch. */
631 --- a/include/linux/ssb/ssb_regs.h
632 +++ b/include/linux/ssb/ssb_regs.h
634 #define SSB_SPROM4_TXPID5GH2_SHIFT 0
635 #define SSB_SPROM4_TXPID5GH3 0xFF00
636 #define SSB_SPROM4_TXPID5GH3_SHIFT 8
638 +/* There are 4 blocks with power info sharing the same layout */
639 +#define SSB_SPROM4_PWR_INFO_CORE0 0x0080
640 +#define SSB_SPROM4_PWR_INFO_CORE1 0x00AE
641 +#define SSB_SPROM4_PWR_INFO_CORE2 0x00DC
642 +#define SSB_SPROM4_PWR_INFO_CORE3 0x010A
644 +#define SSB_SPROM4_2G_MAXP_ITSSI 0x00 /* 2 GHz ITSSI and 2 GHz Max Power */
645 +#define SSB_SPROM4_2G_MAXP 0x00FF
646 +#define SSB_SPROM4_2G_ITSSI 0xFF00
647 +#define SSB_SPROM4_2G_ITSSI_SHIFT 8
648 +#define SSB_SPROM4_2G_PA_0 0x02 /* 2 GHz power amp */
649 +#define SSB_SPROM4_2G_PA_1 0x04
650 +#define SSB_SPROM4_2G_PA_2 0x06
651 +#define SSB_SPROM4_2G_PA_3 0x08
652 +#define SSB_SPROM4_5G_MAXP_ITSSI 0x0A /* 5 GHz ITSSI and 5.3 GHz Max Power */
653 +#define SSB_SPROM4_5G_MAXP 0x00FF
654 +#define SSB_SPROM4_5G_ITSSI 0xFF00
655 +#define SSB_SPROM4_5G_ITSSI_SHIFT 8
656 +#define SSB_SPROM4_5GHL_MAXP 0x0C /* 5.2 GHz and 5.8 GHz Max Power */
657 +#define SSB_SPROM4_5GH_MAXP 0x00FF
658 +#define SSB_SPROM4_5GL_MAXP 0xFF00
659 +#define SSB_SPROM4_5GL_MAXP_SHIFT 8
660 +#define SSB_SPROM4_5G_PA_0 0x0E /* 5.3 GHz power amp */
661 +#define SSB_SPROM4_5G_PA_1 0x10
662 +#define SSB_SPROM4_5G_PA_2 0x12
663 +#define SSB_SPROM4_5G_PA_3 0x14
664 +#define SSB_SPROM4_5GL_PA_0 0x16 /* 5.2 GHz power amp */
665 +#define SSB_SPROM4_5GL_PA_1 0x18
666 +#define SSB_SPROM4_5GL_PA_2 0x1A
667 +#define SSB_SPROM4_5GL_PA_3 0x1C
668 +#define SSB_SPROM4_5GH_PA_0 0x1E /* 5.8 GHz power amp */
669 +#define SSB_SPROM4_5GH_PA_1 0x20
670 +#define SSB_SPROM4_5GH_PA_2 0x22
671 +#define SSB_SPROM4_5GH_PA_3 0x24
673 +/* TODO: Make it deprecated */
674 #define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
675 #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
676 #define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
677 --- a/arch/mips/bcm47xx/sprom.c
678 +++ b/arch/mips/bcm47xx/sprom.c
679 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
680 static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
681 const char *prefix, bool fallback)
683 + nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
684 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
685 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
686 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);