2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
43 struct switch_dev dev;
44 struct phy_device *phy;
45 u32 (*read)(struct ar8216_priv *priv, int reg);
46 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
47 const struct net_device_ops *ndo_old;
48 struct net_device_ops ndo;
49 struct mutex reg_mutex;
51 const struct ar8xxx_chip *chip;
58 /* all fields below are cleared on reset */
60 u16 vlan_id[AR8X16_MAX_VLANS];
61 u8 vlan_table[AR8X16_MAX_VLANS];
63 u16 pvid[AR8216_NUM_PORTS];
66 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
69 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
78 *page = regaddr & 0x1ff;
82 ar8216_mii_read(struct ar8216_priv *priv, int reg)
84 struct phy_device *phy = priv->phy;
85 struct mii_bus *bus = phy->bus;
89 split_addr((u32) reg, &r1, &r2, &page);
91 mutex_lock(&bus->mdio_lock);
93 bus->write(bus, 0x18, 0, page);
94 usleep_range(1000, 2000); /* wait for the page switch to propagate */
95 lo = bus->read(bus, 0x10 | r2, r1);
96 hi = bus->read(bus, 0x10 | r2, r1 + 1);
98 mutex_unlock(&bus->mdio_lock);
100 return (hi << 16) | lo;
104 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
106 struct phy_device *phy = priv->phy;
107 struct mii_bus *bus = phy->bus;
111 split_addr((u32) reg, &r1, &r2, &r3);
113 hi = (u16) (val >> 16);
115 mutex_lock(&bus->mdio_lock);
117 bus->write(bus, 0x18, 0, r3);
118 usleep_range(1000, 2000); /* wait for the page switch to propagate */
119 bus->write(bus, 0x10 | r2, r1 + 1, hi);
120 bus->write(bus, 0x10 | r2, r1, lo);
122 mutex_unlock(&bus->mdio_lock);
126 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
127 u16 dbg_addr, u16 dbg_data)
129 struct mii_bus *bus = priv->phy->bus;
131 mutex_lock(&bus->mdio_lock);
132 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
133 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
134 mutex_unlock(&bus->mdio_lock);
138 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
142 lockdep_assert_held(&priv->reg_mutex);
144 v = priv->read(priv, reg);
147 priv->write(priv, reg, v);
153 ar8216_read_port_link(struct ar8216_priv *priv, int port,
154 struct switch_port_link *link)
159 memset(link, '\0', sizeof(*link));
161 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
163 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
165 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
172 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
173 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
174 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
176 speed = (status & AR8216_PORT_STATUS_SPEED) >>
177 AR8216_PORT_STATUS_SPEED_S;
180 case AR8216_PORT_SPEED_10M:
181 link->speed = SWITCH_PORT_SPEED_10;
183 case AR8216_PORT_SPEED_100M:
184 link->speed = SWITCH_PORT_SPEED_100;
186 case AR8216_PORT_SPEED_1000M:
187 link->speed = SWITCH_PORT_SPEED_1000;
190 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
196 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
197 struct switch_val *val)
199 struct ar8216_priv *priv = to_ar8216(dev);
200 priv->vlan = !!val->value.i;
205 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
206 struct switch_val *val)
208 struct ar8216_priv *priv = to_ar8216(dev);
209 val->value.i = priv->vlan;
215 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
217 struct ar8216_priv *priv = to_ar8216(dev);
219 /* make sure no invalid PVIDs get set */
221 if (vlan >= dev->vlans)
224 priv->pvid[port] = vlan;
229 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
231 struct ar8216_priv *priv = to_ar8216(dev);
232 *vlan = priv->pvid[port];
237 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
238 struct switch_val *val)
240 struct ar8216_priv *priv = to_ar8216(dev);
241 priv->vlan_id[val->port_vlan] = val->value.i;
246 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
247 struct switch_val *val)
249 struct ar8216_priv *priv = to_ar8216(dev);
250 val->value.i = priv->vlan_id[val->port_vlan];
255 ar8216_get_port_link(struct switch_dev *dev, int port,
256 struct switch_port_link *link)
258 struct ar8216_priv *priv = to_ar8216(dev);
260 ar8216_read_port_link(priv, port, link);
265 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
267 struct ar8216_priv *priv = dev->phy_ptr;
276 if (unlikely(skb_headroom(skb) < 2)) {
277 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
281 buf = skb_push(skb, 2);
286 return priv->ndo_old->ndo_start_xmit(skb, dev);
289 dev_kfree_skb_any(skb);
294 ar8216_mangle_rx(struct sk_buff *skb, int napi)
296 struct ar8216_priv *priv;
297 struct net_device *dev;
309 /* don't strip the header if vlan mode is disabled */
313 /* strip header, get vlan id */
317 /* check for vlan header presence */
318 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
323 /* no need to fix up packets coming from a tagged source */
324 if (priv->vlan_tagged & (1 << port))
327 /* lookup port vid from local table, the switch passes an invalid vlan id */
328 vlan = priv->vlan_id[priv->pvid[port]];
331 buf[14 + 2] |= vlan >> 8;
332 buf[15 + 2] = vlan & 0xff;
335 skb->protocol = eth_type_trans(skb, skb->dev);
338 return netif_receive_skb(skb);
340 return netif_rx(skb);
343 /* no vlan? eat the packet! */
344 dev_kfree_skb_any(skb);
349 ar8216_netif_rx(struct sk_buff *skb)
351 return ar8216_mangle_rx(skb, 0);
355 ar8216_netif_receive_skb(struct sk_buff *skb)
357 return ar8216_mangle_rx(skb, 1);
361 static struct switch_attr ar8216_globals[] = {
363 .type = SWITCH_TYPE_INT,
364 .name = "enable_vlan",
365 .description = "Enable VLAN mode",
366 .set = ar8216_set_vlan,
367 .get = ar8216_get_vlan,
372 static struct switch_attr ar8216_port[] = {
375 static struct switch_attr ar8216_vlan[] = {
377 .type = SWITCH_TYPE_INT,
379 .description = "VLAN ID (0-4094)",
380 .set = ar8216_set_vid,
381 .get = ar8216_get_vid,
388 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
390 struct ar8216_priv *priv = to_ar8216(dev);
391 u8 ports = priv->vlan_table[val->port_vlan];
395 for (i = 0; i < AR8216_NUM_PORTS; i++) {
396 struct switch_port *p;
398 if (!(ports & (1 << i)))
401 p = &val->value.ports[val->len++];
403 if (priv->vlan_tagged & (1 << i))
404 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
412 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
414 struct ar8216_priv *priv = to_ar8216(dev);
415 u8 *vt = &priv->vlan_table[val->port_vlan];
419 for (i = 0; i < val->len; i++) {
420 struct switch_port *p = &val->value.ports[i];
422 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
423 priv->vlan_tagged |= (1 << p->id);
425 priv->vlan_tagged &= ~(1 << p->id);
426 priv->pvid[p->id] = val->port_vlan;
428 /* make sure that an untagged port does not
429 * appear in other vlans */
430 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
431 if (j == val->port_vlan)
433 priv->vlan_table[j] &= ~(1 << p->id);
443 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
449 t = priv->read(priv, reg);
450 if ((t & mask) == val)
459 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
460 (unsigned int) reg, t, mask, val);
465 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
467 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
469 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
470 val &= AR8216_VTUDATA_MEMBER;
471 val |= AR8216_VTUDATA_VALID;
472 priv->write(priv, AR8216_REG_VTU_DATA, val);
474 op |= AR8216_VTU_ACTIVE;
475 priv->write(priv, AR8216_REG_VTU, op);
479 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
480 u32 members, u32 pvid)
484 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
485 header = AR8216_PORT_CTRL_HEADER;
489 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
490 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
491 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
492 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
493 AR8216_PORT_CTRL_LEARN | header |
494 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
495 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
497 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
498 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
499 AR8216_PORT_VLAN_DEFAULT_ID,
500 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
501 (ingress << AR8216_PORT_VLAN_MODE_S) |
502 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
506 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
507 u32 members, u32 pvid)
509 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
510 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
511 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
512 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
513 AR8216_PORT_CTRL_LEARN |
514 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
515 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
517 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
518 AR8236_PORT_VLAN_DEFAULT_ID,
519 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
521 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
522 AR8236_PORT_VLAN2_VLAN_MODE |
523 AR8236_PORT_VLAN2_MEMBER,
524 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
525 (members << AR8236_PORT_VLAN2_MEMBER_S));
529 ar8216_hw_apply(struct switch_dev *dev)
531 struct ar8216_priv *priv = to_ar8216(dev);
532 u8 portmask[AR8216_NUM_PORTS];
535 mutex_lock(&priv->reg_mutex);
536 /* flush all vlan translation unit entries */
537 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
539 memset(portmask, 0, sizeof(portmask));
541 /* calculate the port destination masks and load vlans
542 * into the vlan translation unit */
543 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
544 u8 vp = priv->vlan_table[j];
549 for (i = 0; i < AR8216_NUM_PORTS; i++) {
552 portmask[i] |= vp & ~mask;
557 (priv->vlan_id[j] << AR8216_VTU_VID_S),
558 priv->vlan_table[j]);
562 * isolate all ports, but connect them to the cpu port */
563 for (i = 0; i < AR8216_NUM_PORTS; i++) {
564 if (i == AR8216_PORT_CPU)
567 portmask[i] = 1 << AR8216_PORT_CPU;
568 portmask[AR8216_PORT_CPU] |= (1 << i);
572 /* update the port destination mask registers and tag settings */
573 for (i = 0; i < AR8216_NUM_PORTS; i++) {
578 pvid = priv->vlan_id[priv->pvid[i]];
579 if (priv->vlan_tagged & (1 << i))
580 egress = AR8216_OUT_ADD_VLAN;
582 egress = AR8216_OUT_STRIP_VLAN;
583 ingress = AR8216_IN_SECURE;
586 egress = AR8216_OUT_KEEP;
587 ingress = AR8216_IN_PORT_ONLY;
590 if (priv->chip_type == AR8236)
591 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
594 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
597 mutex_unlock(&priv->reg_mutex);
602 ar8216_hw_init(struct ar8216_priv *priv)
608 ar8236_hw_init(struct ar8216_priv *priv)
613 if (priv->initialized)
616 /* Initialize the PHYs */
617 bus = priv->phy->bus;
618 for (i = 0; i < 5; i++) {
619 mdiobus_write(bus, i, MII_ADVERTISE,
620 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
621 ADVERTISE_PAUSE_ASYM);
622 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
626 priv->initialized = true;
631 ar8316_hw_init(struct ar8216_priv *priv)
637 val = priv->read(priv, 0x8);
639 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
640 if (priv->port4_phy) {
641 /* value taken from Ubiquiti RouterStation Pro */
643 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
646 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
648 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
649 /* value taken from AVM Fritz!Box 7390 sources */
652 /* no known value for phy interface */
653 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
654 priv->phy->interface);
661 priv->write(priv, 0x8, newval);
663 /* Initialize the ports */
664 bus = priv->phy->bus;
665 for (i = 0; i < 5; i++) {
666 if ((i == 4) && priv->port4_phy &&
667 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
668 /* work around for phy4 rgmii mode */
669 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
671 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
673 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
677 /* initialize the port itself */
678 mdiobus_write(bus, i, MII_ADVERTISE,
679 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
680 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
681 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
686 priv->initialized = true;
691 ar8216_init_globals(struct ar8216_priv *priv)
693 switch (priv->chip_type) {
695 /* standard atheros magic */
696 priv->write(priv, 0x38, 0xc000050e);
698 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
699 AR8216_GCTRL_MTU, 1518 + 8 + 2);
702 /* standard atheros magic */
703 priv->write(priv, 0x38, 0xc000050e);
705 /* enable cpu port to receive multicast and broadcast frames */
706 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
710 /* enable jumbo frames */
711 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
712 AR8316_GCTRL_MTU, 9018 + 8 + 2);
718 ar8216_init_port(struct ar8216_priv *priv, int port)
720 /* Enable port learning and tx */
721 priv->write(priv, AR8216_REG_PORT_CTRL(port),
722 AR8216_PORT_CTRL_LEARN |
723 (4 << AR8216_PORT_CTRL_STATE_S));
725 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
727 if (port == AR8216_PORT_CPU) {
728 priv->write(priv, AR8216_REG_PORT_STATUS(port),
729 AR8216_PORT_STATUS_LINK_UP |
730 ((priv->chip_type == AR8316) ?
731 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
732 AR8216_PORT_STATUS_TXMAC |
733 AR8216_PORT_STATUS_RXMAC |
734 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
735 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
736 AR8216_PORT_STATUS_DUPLEX);
738 priv->write(priv, AR8216_REG_PORT_STATUS(port),
739 AR8216_PORT_STATUS_LINK_AUTO);
743 static const struct ar8xxx_chip ar8216_chip = {
746 static const struct ar8xxx_chip ar8236_chip = {
749 static const struct ar8xxx_chip ar8316_chip = {
753 ar8216_reset_switch(struct switch_dev *dev)
755 struct ar8216_priv *priv = to_ar8216(dev);
758 mutex_lock(&priv->reg_mutex);
759 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
760 offsetof(struct ar8216_priv, vlan));
762 for (i = 0; i < AR8X16_MAX_VLANS; i++)
763 priv->vlan_id[i] = i;
765 /* Configure all ports */
766 for (i = 0; i < AR8216_NUM_PORTS; i++)
767 ar8216_init_port(priv, i);
769 ar8216_init_globals(priv);
770 mutex_unlock(&priv->reg_mutex);
772 return ar8216_hw_apply(dev);
775 static const struct switch_dev_ops ar8216_sw_ops = {
777 .attr = ar8216_globals,
778 .n_attr = ARRAY_SIZE(ar8216_globals),
782 .n_attr = ARRAY_SIZE(ar8216_port),
786 .n_attr = ARRAY_SIZE(ar8216_vlan),
788 .get_port_pvid = ar8216_get_pvid,
789 .set_port_pvid = ar8216_set_pvid,
790 .get_vlan_ports = ar8216_get_ports,
791 .set_vlan_ports = ar8216_set_ports,
792 .apply_config = ar8216_hw_apply,
793 .reset_switch = ar8216_reset_switch,
794 .get_port_link = ar8216_get_port_link,
798 ar8216_id_chip(struct ar8216_priv *priv)
804 priv->chip_type = UNKNOWN;
806 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
810 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
811 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
814 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
818 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
825 priv->chip_type = AR8216;
826 priv->chip = &ar8216_chip;
829 priv->chip_type = AR8236;
830 priv->chip = &ar8236_chip;
834 priv->chip_type = AR8316;
835 priv->chip = &ar8316_chip;
839 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
840 (int)(id >> AR8216_CTRL_VERSION_S),
841 (int)(id & AR8216_CTRL_REVISION),
842 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
843 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
852 ar8216_config_init(struct phy_device *pdev)
854 struct ar8216_priv *priv = pdev->priv;
855 struct net_device *dev = pdev->attached_dev;
856 struct switch_dev *swdev;
860 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
867 ret = ar8216_id_chip(priv);
871 if (pdev->addr != 0) {
872 if (priv->chip_type == AR8316) {
873 pdev->supported |= SUPPORTED_1000baseT_Full;
874 pdev->advertising |= ADVERTISED_1000baseT_Full;
876 /* check if we're attaching to the switch twice */
877 pdev = pdev->bus->phy_map[0];
883 /* switch device has not been initialized, reuse priv */
885 priv->port4_phy = true;
892 /* switch device has been initialized, reinit */
894 priv->dev.ports = (AR8216_NUM_PORTS - 1);
895 priv->initialized = false;
896 priv->port4_phy = true;
897 ar8316_hw_init(priv);
905 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
906 pdev->attached_dev->name, priv->chip_type);
908 pdev->supported = priv->chip_type == AR8316 ?
909 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
910 pdev->advertising = pdev->supported;
912 mutex_init(&priv->reg_mutex);
913 priv->read = ar8216_mii_read;
914 priv->write = ar8216_mii_write;
919 swdev->cpu_port = AR8216_PORT_CPU;
920 swdev->ops = &ar8216_sw_ops;
921 swdev->ports = AR8216_NUM_PORTS;
923 if (priv->chip_type == AR8316) {
924 swdev->name = "Atheros AR8316";
925 swdev->vlans = AR8X16_MAX_VLANS;
927 if (priv->port4_phy) {
928 /* port 5 connected to the other mac, therefore unusable */
929 swdev->ports = (AR8216_NUM_PORTS - 1);
931 } else if (priv->chip_type == AR8236) {
932 swdev->name = "Atheros AR8236";
933 swdev->vlans = AR8216_NUM_VLANS;
934 swdev->ports = AR8216_NUM_PORTS;
936 swdev->name = "Atheros AR8216";
937 swdev->vlans = AR8216_NUM_VLANS;
940 ret = register_switch(&priv->dev, pdev->attached_dev);
947 if (priv->chip_type == AR8216)
948 ret = ar8216_hw_init(priv);
949 else if (priv->chip_type == AR8236)
950 ret = ar8236_hw_init(priv);
951 else if (priv->chip_type == AR8316)
952 ret = ar8316_hw_init(priv);
957 ret = ar8216_reset_switch(&priv->dev);
963 /* VID fixup only needed on ar8216 */
964 if (pdev->addr == 0 && priv->chip_type == AR8216) {
966 pdev->netif_receive_skb = ar8216_netif_receive_skb;
967 pdev->netif_rx = ar8216_netif_rx;
968 priv->ndo_old = dev->netdev_ops;
969 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
970 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
971 dev->netdev_ops = &priv->ndo;
984 ar8216_read_status(struct phy_device *phydev)
986 struct ar8216_priv *priv = phydev->priv;
987 struct switch_port_link link;
990 if (phydev->addr != 0)
991 return genphy_read_status(phydev);
993 ar8216_read_port_link(priv, phydev->addr, &link);
994 phydev->link = !!link.link;
998 switch (link.speed) {
999 case SWITCH_PORT_SPEED_10:
1000 phydev->speed = SPEED_10;
1002 case SWITCH_PORT_SPEED_100:
1003 phydev->speed = SPEED_100;
1005 case SWITCH_PORT_SPEED_1000:
1006 phydev->speed = SPEED_1000;
1011 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1013 /* flush the address translation unit */
1014 mutex_lock(&priv->reg_mutex);
1015 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1017 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1018 mutex_unlock(&priv->reg_mutex);
1020 phydev->state = PHY_RUNNING;
1021 netif_carrier_on(phydev->attached_dev);
1022 phydev->adjust_link(phydev->attached_dev);
1028 ar8216_config_aneg(struct phy_device *phydev)
1030 if (phydev->addr == 0)
1033 return genphy_config_aneg(phydev);
1037 ar8216_probe(struct phy_device *pdev)
1039 struct ar8216_priv priv;
1042 return ar8216_id_chip(&priv);
1046 ar8216_remove(struct phy_device *pdev)
1048 struct ar8216_priv *priv = pdev->priv;
1049 struct net_device *dev = pdev->attached_dev;
1054 if (priv->ndo_old && dev)
1055 dev->netdev_ops = priv->ndo_old;
1056 if (pdev->addr == 0)
1057 unregister_switch(&priv->dev);
1061 static struct phy_driver ar8216_driver = {
1062 .phy_id = 0x004d0000,
1063 .name = "Atheros AR8216/AR8236/AR8316",
1064 .phy_id_mask = 0xffff0000,
1065 .features = PHY_BASIC_FEATURES,
1066 .probe = ar8216_probe,
1067 .remove = ar8216_remove,
1068 .config_init = &ar8216_config_init,
1069 .config_aneg = &ar8216_config_aneg,
1070 .read_status = &ar8216_read_status,
1071 .driver = { .owner = THIS_MODULE },
1077 return phy_driver_register(&ar8216_driver);
1083 phy_driver_unregister(&ar8216_driver);
1086 module_init(ar8216_init);
1087 module_exit(ar8216_exit);
1088 MODULE_LICENSE("GPL");