target/linux/coldfire/patches/032-m5445x_edma_update.patch

   1 From 7b5b08d99d5362e9c36fd7d42d6c06c2a848266c Mon Sep 17 00:00:00 2001
   2 From: Kurt Mahan <kmahan@freescale.com>
   3 Date: Sun, 9 Dec 2007 02:21:19 -0700
   4 Subject: [PATCH] Update EDMA.
   5
   6 LTIBName: m5445x-edma-update
   7 Signed-off-by: Kurt Mahan <kmahan@freescale.com>
   8 ---
   9  drivers/spi/coldfire_edma.c      |  261 +++++++++++++++++++++++---------------
  10  include/asm-m68k/coldfire_edma.h |    9 +-
  11  include/asm-m68k/mcf5445x_edma.h |   28 +++-
  12  3 files changed, 188 insertions(+), 110 deletions(-)
  13
  14 --- a/drivers/spi/coldfire_edma.c
  15 +++ b/drivers/spi/coldfire_edma.c
  16 @@ -20,76 +20,91 @@
  17  #include <linux/cdev.h>
  18  #include <linux/seq_file.h>
  19  #include <linux/proc_fs.h>
  20 +#ifdef CONFIG_M54455
  21  #include <asm/mcf5445x_edma.h>
  22  #include <asm/mcf5445x_intc.h>
  23 +#endif /* CONFIG_M54455 */
  24  #include <asm/coldfire_edma.h>
  25
  26 -
  27 -/* callback handler data for each TCD */
  28 +/*
  29 + * Callback handler data for each TCD
  30 + */
  31  struct edma_isr_record {
  32 -       edma_irq_handler irq_handler;       /* interrupt handler */
  33 -       edma_error_handler error_handler;       /* error interrupt handler */
  34 -       void* dev;                                                      /* device used for the channel */
  35 -       int  allocated;                                         /* busy flag */
  36 -       spinlock_t *lock;                                       /* spin lock (if needs to be locked in interrupt) */
  37 -       const char* device_id;                          /* device id string, used in proc file system */
  38 +       edma_irq_handler irq_handler;     /* interrupt handler */
  39 +       edma_error_handler error_handler; /* error interrupt handler */
  40 +       void *arg;                        /* argument to pass back */
  41 +       int allocated;                    /* busy flag */
  42 +       spinlock_t *lock;                 /* spin lock (optional) */
  43 +       const char *device_id;            /* dev id string, used in procfs */
  44  };
  45
  46 -/* device structure */
  47 +/*
  48 + * Device structure
  49 + */
  50  struct coldfire_edma_dev {
  51 -       struct cdev cdev;                       /* character device */
  52 -       struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS]; /* channel handlers */
  53 +       struct cdev cdev;                 /* character device */
  54 +       struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS];
  55  };
  56
  57  /* allocated major device number */
  58  static int coldfire_dma_major;
  59 +
  60  /* device driver structure */
  61 -static struct coldfire_edma_dev* devp = NULL;
  62 +static struct coldfire_edma_dev *devp = NULL;
  63
  64  /* device driver file operations */
  65  struct file_operations coldfire_edma_fops = {
  66         .owner = THIS_MODULE,
  67  };
  68
  69 -/* eDMA channel interrupt handler */
  70 +/**
  71 + * dmaisr - eDMA channel interrupt handler
  72 + * @irq: interrupt number
  73 + * @dev_id: argument
  74 + */
  75  static int dmaisr(int irq, void *dev_id)
  76  {
  77         int channel = irq - EDMA_INT_CONTROLLER_BASE - EDMA_INT_CHANNEL_BASE;
  78         int result = IRQ_HANDLED;
  79
  80 -       if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
  81 -               spin_lock(devp->dma_interrupt_handlers[channel].lock);
  82 -       }
  83 +       if ((devp != NULL) &&
  84 +           (devp->dma_interrupt_handlers[channel].irq_handler)) {
  85 +               /* call user irq handler */
  86 +               if (devp->dma_interrupt_handlers[channel].lock)
  87 +                       spin_lock(devp->dma_interrupt_handlers[channel].lock);
  88 +
  89 +               result = devp->dma_interrupt_handlers[channel].irq_handler(
  90 +                       channel, devp->dma_interrupt_handlers[channel].arg);
  91
  92 -       if (devp!=NULL && devp->dma_interrupt_handlers[channel].irq_handler) {
  93 -               result = devp->dma_interrupt_handlers[channel].irq_handler(channel,
  94 -                                                       devp->dma_interrupt_handlers[channel].dev);
  95 +               if (devp->dma_interrupt_handlers[channel].lock)
  96 +                       spin_unlock(devp->dma_interrupt_handlers[channel].lock);
  97         } else {
  98 +               /* no irq handler so just ack it */
  99                 confirm_edma_interrupt_handled(channel);
 100 -               printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n", channel);
 101 -       }
 102 -
 103 -       if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
 104 -               spin_unlock(devp->dma_interrupt_handlers[channel].lock);
 105 +               printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n",
 106 +                      channel);
 107         }
 108
 109         return result;
 110  }
 111
 112 -/* eDMA error interrupt handler */
 113 +/**
 114 + * dma_error_isr - eDMA error interrupt handler
 115 + * @irq: interrupt number
 116 + * @dev_id: argument
 117 + */
 118  static int dma_error_isr(int irq, void* dev_id)
 119  {
 120         u16 err;
 121         int i;
 122
 123         err = MCF_EDMA_ERR;
 124 -       for (i=0;i<EDMA_CHANNELS;i++) {
 125 +       for (i=0; i<EDMA_CHANNELS; i++) {
 126                 if (err & (1<<i)) {
 127 -                       if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler) {
 128 -                               devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].dev);
 129 -                       } else {
 130 +                       if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler)
 131 +                               devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].arg);
 132 +                       else
 133                                 printk(KERN_WARNING EDMA_DRIVER_NAME ": DMA error on channel %d\n", i);
 134 -                       }
 135                 }
 136         }
 137
 138 @@ -97,11 +112,26 @@ static int dma_error_isr(int irq, void*
 139         return IRQ_HANDLED;
 140  }
 141
 142 -/* sets channel parameters */
 143 +/**
 144 + * set_edma_params - Set transfer control descriptor (TCD)
 145 + * @channel: channel number
 146 + * @source: source address
 147 + * @dest: destination address
 148 + * @attr: attributes
 149 + * @soff: source offset
 150 + * @nbytes: number of bytes to be transfered in minor loop
 151 + * @slast: last source address adjustment
 152 + * @citer: major loop count
 153 + * @biter: beginning minor loop count
 154 + * @doff: destination offset
 155 + * @dlast_sga: last destination address adjustment
 156 + * @major_int: generate interrupt after each major loop
 157 + * @disable_req: disable DMA request after major loop
 158 + */
 159  void set_edma_params(int channel, u32 source, u32 dest,
 160 -                                        u32 attr, u32 soff, u32 nbytes, u32 slast,
 161 -                                        u32 citer, u32 biter, u32 doff, u32 dlast_sga,
 162 -                                        int major_int, int disable_req)
 163 +       u32 attr, u32 soff, u32 nbytes, u32 slast,
 164 +       u32 citer, u32 biter, u32 doff, u32 dlast_sga,
 165 +       int major_int, int disable_req)
 166  {
 167
 168         if (channel<0 || channel>EDMA_CHANNELS)
 169 @@ -117,45 +147,56 @@ void set_edma_params(int channel, u32 so
 170         MCF_EDMA_TCD_BITER(channel)=MCF_EDMA_TCD_BITER_BITER(biter);
 171         MCF_EDMA_TCD_DOFF(channel) = MCF_EDMA_TCD_DOFF_DOFF(doff);
 172         MCF_EDMA_TCD_DLAST_SGA(channel) = MCF_EDMA_TCD_DLAST_SGA_DLAST_SGA(dlast_sga);
 173 +
 174         /* interrupt at the end of major loop */
 175 -       if (major_int) {
 176 +       if (major_int)
 177                 MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_INT_MAJOR;
 178 -       } else {
 179 +       else
 180                 MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_INT_MAJOR;
 181 -       }
 182 +
 183         /* disable request at the end of major loop of transfer or not*/
 184 -       if (disable_req) {
 185 +       if (disable_req)
 186                 MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_D_REQ;
 187 -       } else {
 188 +       else
 189                 MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_D_REQ;
 190 -       }
 191 -
 192  }
 193  EXPORT_SYMBOL(set_edma_params);
 194
 195 -/* init eDMA controller */
 196 +/**
 197 + * init_edma - Initialize the eDMA controller
 198 + */
 199  void init_edma(void)
 200  {
 201         MCF_EDMA_CR = 0;
 202  }
 203  EXPORT_SYMBOL(init_edma);
 204
 205 -/* request eDMA channel */
 206 +/**
 207 + * request_edma_channel - Request an eDMA channel
 208 + * @channel: channel number
 209 + * @handler: dma handler
 210 + * @error_handler: dma error handler
 211 + * @arg: argument to pass back
 212 + * @lock: optional spinlock to hold over interrupt
 213 + * @device_id: device id
 214 + *
 215 + * Returns 0 if success or a negative value if failure
 216 + */
 217  int request_edma_channel(int channel,
 218 -                                               edma_irq_handler handler,
 219 -                                               edma_error_handler error_handler,
 220 -                                               void* dev,
 221 -                                               spinlock_t *lock,
 222 -                                               const char* device_id )
 223 +       edma_irq_handler handler,
 224 +       edma_error_handler error_handler,
 225 +       void *arg,
 226 +       spinlock_t *lock,
 227 +       const char *device_id )
 228  {
 229         if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
 230 -               if (devp->dma_interrupt_handlers[channel].allocated) {
 231 +               if (devp->dma_interrupt_handlers[channel].allocated)
 232                         return -EBUSY;
 233 -               }
 234 +
 235                 devp->dma_interrupt_handlers[channel].allocated = 1;
 236                 devp->dma_interrupt_handlers[channel].irq_handler = handler;
 237                 devp->dma_interrupt_handlers[channel].error_handler = error_handler;
 238 -               devp->dma_interrupt_handlers[channel].dev = dev;
 239 +               devp->dma_interrupt_handlers[channel].arg = arg;
 240                 devp->dma_interrupt_handlers[channel].lock = lock;
 241                 devp->dma_interrupt_handlers[channel].device_id = device_id;
 242                 return 0;
 243 @@ -164,16 +205,22 @@ int request_edma_channel(int channel,
 244  }
 245  EXPORT_SYMBOL(request_edma_channel);
 246
 247 -/* free eDMA channel */
 248 -int free_edma_channel(int channel, void* dev)
 249 +/**
 250 + * free_edma_channel - Free the edma channel
 251 + * @channel: channel number
 252 + * @arg: argument created with
 253 + *
 254 + * Returns 0 if success or a negative value if failure
 255 + */
 256 +int free_edma_channel(int channel, void *arg)
 257  {
 258         if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
 259                 if (devp->dma_interrupt_handlers[channel].allocated) {
 260 -                       if (devp->dma_interrupt_handlers[channel].dev != dev) {
 261 +                       if (devp->dma_interrupt_handlers[channel].arg != arg)
 262                                 return -EBUSY;
 263 -                       }
 264 +
 265                         devp->dma_interrupt_handlers[channel].allocated = 0;
 266 -                       devp->dma_interrupt_handlers[channel].dev = NULL;
 267 +                       devp->dma_interrupt_handlers[channel].arg = NULL;
 268                         devp->dma_interrupt_handlers[channel].irq_handler = NULL;
 269                         devp->dma_interrupt_handlers[channel].error_handler = NULL;
 270                         devp->dma_interrupt_handlers[channel].lock = NULL;
 271 @@ -184,7 +231,9 @@ int free_edma_channel(int channel, void*
 272  }
 273  EXPORT_SYMBOL(free_edma_channel);
 274
 275 -/* clean-up device driver allocated resources */
 276 +/**
 277 + * coldfire_edma_cleanup - cleanup driver allocated resources
 278 + */
 279  static void coldfire_edma_cleanup(void)
 280  {
 281         dev_t devno;
 282 @@ -192,13 +241,10 @@ static void coldfire_edma_cleanup(void)
 283
 284         /* free interrupts/memory */
 285         if (devp) {
 286 -               for (i=0;i<EDMA_CHANNELS;i++)
 287 -               {
 288 -                       MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+i;
 289 -                       free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i,      devp);
 290 -               }
 291 -               MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
 292 -               free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS, devp);
 293 +               for (i=0; i<EDMA_CHANNELS; i++)
 294 +                       free_irq(EDMA_INT_BASE+i, devp);
 295 +
 296 +               free_irq(EDMA_INT_BASE+EDMA_INT_ERR, devp);
 297                 cdev_del(&devp->cdev);
 298                 kfree(devp);
 299         }
 300 @@ -209,30 +255,42 @@ static void coldfire_edma_cleanup(void)
 301  }
 302
 303  #ifdef CONFIG_PROC_FS
 304 -/* proc file system support */
 305 +/*
 306 + * proc file system support
 307 + */
 308
 309  #define FREE_CHANNEL "free"
 310  #define DEVICE_UNKNOWN "device unknown"
 311
 312 +/**
 313 + * proc_edma_show - print out proc info
 314 + * @m: seq_file
 315 + * @v:
 316 + */
 317  static int proc_edma_show(struct seq_file *m, void *v)
 318  {
 319         int i;
 320
 321 -       if (devp==NULL) return 0;
 322 +       if (devp == NULL)
 323 +               return 0;
 324
 325         for (i = 0 ; i < EDMA_CHANNELS ; i++) {
 326                 if (devp->dma_interrupt_handlers[i].allocated) {
 327                         if (devp->dma_interrupt_handlers[i].device_id)
 328 -                       seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
 329 +                               seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
 330                         else
 331                                 seq_printf(m, "%2d: %s\n", i, DEVICE_UNKNOWN);
 332 -               } else {
 333 +               } else
 334                         seq_printf(m, "%2d: %s\n", i, FREE_CHANNEL);
 335 -               }
 336         }
 337         return 0;
 338  }
 339
 340 +/**
 341 + * proc_edma_open - open the proc file
 342 + * @inode: inode ptr
 343 + * @file: file ptr
 344 + */
 345  static int proc_edma_open(struct inode *inode, struct file *file)
 346  {
 347         return single_open(file, proc_edma_show, NULL);
 348 @@ -245,6 +303,9 @@ static const struct file_operations proc
 349         .release        = single_release,
 350  };
 351
 352 +/**
 353 + * proc_edma_init - initialize proc filesystem
 354 + */
 355  static int __init proc_edma_init(void)
 356  {
 357         struct proc_dir_entry *e;
 358 @@ -258,7 +319,9 @@ static int __init proc_edma_init(void)
 359
 360  #endif
 361
 362 -/* initializes device driver */
 363 +/**
 364 + * coldfire_edma_init - eDMA module init
 365 + */
 366  static int __init coldfire_edma_init(void)
 367  {
 368         dev_t dev;
 369 @@ -267,8 +330,9 @@ static int __init coldfire_edma_init(voi
 370
 371         /* allocate free major number */
 372         result = alloc_chrdev_region(&dev, DMA_DEV_MINOR, 1, EDMA_DRIVER_NAME);
 373 -       if (result<0) {
 374 -               printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n", result);
 375 +       if (result < 0) {
 376 +               printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n",
 377 +                      result);
 378                 return result;
 379         }
 380         coldfire_dma_major = MAJOR(dev);
 381 @@ -280,71 +344,68 @@ static int __init coldfire_edma_init(voi
 382                 goto fail;
 383         }
 384
 385 -       /* init handlers (no handlers for beggining) */
 386 -       for (i=0;i<EDMA_CHANNELS;i++) {
 387 +       /* init handlers (no handlers for beginning) */
 388 +       for (i = 0; i < EDMA_CHANNELS; i++) {
 389                 devp->dma_interrupt_handlers[i].irq_handler = NULL;
 390                 devp->dma_interrupt_handlers[i].error_handler = NULL;
 391 -               devp->dma_interrupt_handlers[i].dev = NULL;
 392 +               devp->dma_interrupt_handlers[i].arg = NULL;
 393                 devp->dma_interrupt_handlers[i].allocated = 0;
 394                 devp->dma_interrupt_handlers[i].lock = NULL;
 395                 devp->dma_interrupt_handlers[i].device_id = NULL;
 396         }
 397
 398 -    /* register char device */
 399 +       /* register char device */
 400         cdev_init(&devp->cdev, &coldfire_edma_fops);
 401         devp->cdev.owner = THIS_MODULE;
 402         devp->cdev.ops = &coldfire_edma_fops;
 403         result = cdev_add(&devp->cdev, dev, 1);
 404         if (result) {
 405 -               printk(KERN_NOTICE EDMA_DRIVER_NAME": Error %d adding coldfire-dma device\n", result);
 406 +               printk(KERN_NOTICE EDMA_DRIVER_NAME
 407 +                      ": Error %d adding coldfire-dma device\n", result);
 408                 result = -ENODEV;
 409                 goto fail;
 410         }
 411
 412         /* request/enable irq for each eDMA channel */
 413 -       for (i=0;i<EDMA_CHANNELS;i++)
 414 -       {
 415 -               result = request_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i,
 416 -                       dmaisr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
 417 +       for (i = 0; i < EDMA_CHANNELS;i++) {
 418 +               result = request_irq(EDMA_INT_BASE + i,
 419 +                                    dmaisr, IRQF_DISABLED,
 420 +                                    EDMA_DRIVER_NAME, devp);
 421                 if (result) {
 422 -                       printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
 423 -                               EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i);
 424 +                       printk(KERN_WARNING EDMA_DRIVER_NAME
 425 +                              ": Cannot request irq %d\n",
 426 +                              (EDMA_INT_BASE + EDMA_INT_ERR+i));
 427                         result = -EBUSY;
 428                         goto fail;
 429                 }
 430 -
 431 -               MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+i) = EDMA_IRQ_LEVEL;
 432 -               MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+i;
 433 -
 434         }
 435
 436 -    /* request error interrupt */
 437 -       result = request_irq(EDMA_INT_CHANNEL_BASE + EDMA_INT_CONTROLLER_BASE + EDMA_CHANNELS,
 438 -                               dma_error_isr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
 439 +       /* request error interrupt */
 440 +       result = request_irq(EDMA_INT_BASE + EDMA_INT_ERR,
 441 +                            dma_error_isr, IRQF_DISABLED,
 442 +                            EDMA_DRIVER_NAME, devp);
 443         if (result) {
 444 -               printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
 445 -                               EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS);
 446 +               printk(KERN_WARNING EDMA_DRIVER_NAME
 447 +                      ": Cannot request irq %d\n",
 448 +                      (EDMA_INT_BASE + EDMA_INT_ERR));
 449                 result = -EBUSY;
 450                 goto fail;
 451         }
 452
 453 -       /* enable error interrupt in interrupt controller */
 454 -       MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS) = EDMA_IRQ_LEVEL;
 455 -       MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
 456 -
 457  #ifdef CONFIG_PROC_FS
 458         proc_edma_init();
 459  #endif
 460
 461         printk(EDMA_DRIVER_NAME ": initialized successfully\n");
 462 -
 463         return 0;
 464  fail:
 465         coldfire_edma_cleanup();
 466         return result;
 467 -
 468  }
 469
 470 +/**
 471 + * coldfire_edma_exit - eDMA module exit
 472 + */
 473  static void __exit coldfire_edma_exit(void)
 474  {
 475         coldfire_edma_cleanup();
 476 @@ -354,5 +415,5 @@ module_init(coldfire_edma_init);
 477  module_exit(coldfire_edma_exit);
 478
 479  MODULE_LICENSE("GPL");
 480 -MODULE_AUTHOR("Yaroslav Vinogradov, Freescale Inc.");
 481 -MODULE_DESCRIPTION("eDMA library for Coldfire 5445x");
 482 +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 483 +MODULE_DESCRIPTION("eDMA library for Coldfire M5445x");
 484 --- a/include/asm-m68k/coldfire_edma.h
 485 +++ b/include/asm-m68k/coldfire_edma.h
 486 @@ -20,11 +20,14 @@
 487  #define EDMA_DRIVER_NAME "ColdFire-eDMA"
 488  #define DMA_DEV_MINOR 1
 489
 490 +#ifdef CONFIG_M54455
 491  #define EDMA_INT_CHANNEL_BASE          8
 492  #define EDMA_INT_CONTROLLER_BASE       64
 493 +#define EDMA_INT_BASE                  (EDMA_INT_CHANNEL_BASE + \
 494 +                                        EDMA_INT_CONTROLLER_BASE)
 495  #define EDMA_CHANNELS                  16
 496 -
 497 -#define EDMA_IRQ_LEVEL                 5
 498 +#define EDMA_INT_ERR                   16      /* edma error interrupt */
 499 +#endif /* CONFIG_M54455 */
 500
 501  typedef irqreturn_t (*edma_irq_handler)(int, void *);
 502  typedef void (*edma_error_handler)(int, void *);
 503 @@ -38,7 +41,7 @@ typedef void (*edma_error_handler)(int,
 504   *   nbytes  - number of bytes to be transfered in minor loop
 505   *   slast   - last source address adjustment
 506   *   citer   - major loop count
 507 - *   biter   - beggining minor loop count
 508 + *   biter   - begining minor loop count
 509   *   doff    - destination offset
 510   *   dlast_sga - last destination address adjustment
 511   *   major_int - generate interrupt after each major loop
 512 --- a/include/asm-m68k/mcf5445x_edma.h
 513 +++ b/include/asm-m68k/mcf5445x_edma.h
 514 @@ -11,11 +11,27 @@
 515  #ifndef __MCF5445X_EDMA_H__
 516  #define __MCF5445X_EDMA_H__
 517
 518 -/*********************************************************************
 519 -*
 520 -* Enhanced DMA (EDMA)
 521 -*
 522 -*********************************************************************/
 523 +/*
 524 + * Enhanced DMA (EDMA)
 525 + */
 526 +
 527 +/* Channels */
 528 +#define MCF_EDMA_CHAN_DREQ0    0       /* External DMA request 0 */
 529 +#define MCF_EDMA_CHAN_DREQ1    1       /* External DMA request 1 */
 530 +#define MCF_EDMA_CHAN_UART0_RX 2       /* UART0 Receive */
 531 +#define MCF_EDMA_CHAN_UART0_TX 3       /* UART0 Transmit */
 532 +#define MCF_EDMA_CHAN_UART1_RX 4       /* UART1 Receive */
 533 +#define MCF_EDMA_CHAN_UART1_TX 5       /* UART1 Transmit */
 534 +#define MCF_EDMA_CHAN_UART2_RX 6       /* UART2 Receive */
 535 +#define MCF_EDMA_CHAN_UART2_TX 7       /* UART2 Transmit */
 536 +#define MCF_EDMA_CHAN_TIMER0   8       /* Timer 0 / SSI0 Rx */
 537 +#define MCF_EDMA_CHAN_TIMER1   9       /* Timer 1 / SSI1 Rx */
 538 +#define MCF_EDMA_CHAN_TIMER2   10      /* Timer 2 / SSI0 Tx */
 539 +#define MCF_EDMA_CHAN_TIMER3   11      /* Timer 3 / SSI1 Tx */
 540 +#define MCF_EDMA_CHAN_DSPI_RX  12      /* DSPI Receive */
 541 +#define MCF_EDMA_CHAN_DSPI_TX  13      /* DSPI Transmit */
 542 +#define MCF_EDMA_CHAN_ATA_RX   14      /* ATA Receive */
 543 +#define MCF_EDMA_CHAN_ATA_TX   15      /* ATA Transmit */
 544
 545  /* Register read/write macros */
 546  #define MCF_EDMA_CR                     MCF_REG32(0xFC044000)
 547 @@ -1453,6 +1469,4 @@
 548  #define MCF_EDMA_TCD15_CSR_LINKCH(x)    (((x)&0x003F)<<8)
 549  #define MCF_EDMA_TCD15_CSR_BWC(x)       (((x)&0x0003)<<14)
 550
 551 -/********************************************************************/
 552 -
 553  #endif /* __MCF5445X_EDMA_H__ */