1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_queue.c $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
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19 * below, then you are not authorized to use the Software.
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22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
33 #ifndef DWC_DEVICE_ONLY
38 * This file contains the functions to manage Queue Heads and Queue
39 * Transfer Descriptors.
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/moduleparam.h>
44 #include <linux/init.h>
45 #include <linux/device.h>
46 #include <linux/errno.h>
47 #include <linux/list.h>
48 #include <linux/interrupt.h>
49 #include <linux/string.h>
50 #include <linux/version.h>
52 #include "otg_driver.h"
57 * This function allocates and initializes a QH.
59 * @param hcd The HCD state structure for the DWC OTG controller.
60 * @param[in] urb Holds the information about the device/endpoint that we need
61 * to initialize the QH.
63 * @return Returns pointer to the newly allocated QH, or NULL on error. */
64 dwc_otg_qh_t *dwc_otg_hcd_qh_create (dwc_otg_hcd_t *hcd, struct urb *urb)
69 /** @todo add memflags argument */
70 qh = dwc_otg_hcd_qh_alloc ();
75 dwc_otg_hcd_qh_init (hcd, qh, urb);
79 /** Free each QTD in the QH's QTD-list then free the QH. QH should already be
80 * removed from a list. QTD list should already be empty if called from URB
83 * @param[in] hcd HCD instance.
84 * @param[in] qh The QH to free.
86 void dwc_otg_hcd_qh_free (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
89 struct list_head *pos;
90 //unsigned long flags;
92 /* Free each QTD in the QTD list */
95 //the spinlock is locked before this function get called,
96 //but in case the lock is needed, the check function is preserved
98 //but in non-SMP mode, all spinlock is lockable.
99 //don't do the test in non-SMP mode
101 if(spin_trylock(&hcd->lock)) {
102 printk("%s: It is not supposed to be lockable!!\n",__func__);
106 // SPIN_LOCK_IRQSAVE(&hcd->lock, flags)
107 for (pos = qh->qtd_list.next;
108 pos != &qh->qtd_list;
109 pos = qh->qtd_list.next)
112 qtd = dwc_list_to_qtd (pos);
113 dwc_otg_hcd_qtd_free (qtd);
115 // SPIN_UNLOCK_IRQRESTORE(&hcd->lock, flags)
121 /** Initializes a QH structure.
123 * @param[in] hcd The HCD state structure for the DWC OTG controller.
124 * @param[in] qh The QH to init.
125 * @param[in] urb Holds the information about the device/endpoint that we need
126 * to initialize the QH. */
127 #define SCHEDULE_SLOP 10
128 void dwc_otg_hcd_qh_init(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh, struct urb *urb)
131 memset (qh, 0, sizeof (dwc_otg_qh_t));
134 switch (usb_pipetype(urb->pipe)) {
136 qh->ep_type = USB_ENDPOINT_XFER_CONTROL;
139 qh->ep_type = USB_ENDPOINT_XFER_BULK;
141 case PIPE_ISOCHRONOUS:
142 qh->ep_type = USB_ENDPOINT_XFER_ISOC;
145 qh->ep_type = USB_ENDPOINT_XFER_INT;
149 qh->ep_is_in = usb_pipein(urb->pipe) ? 1 : 0;
151 qh->data_toggle = DWC_OTG_HC_PID_DATA0;
152 qh->maxp = usb_maxpacket(urb->dev, urb->pipe, !(usb_pipein(urb->pipe)));
153 INIT_LIST_HEAD(&qh->qtd_list);
154 INIT_LIST_HEAD(&qh->qh_list_entry);
156 qh->speed = urb->dev->speed;
158 /* FS/LS Enpoint on HS Hub
159 * NOT virtual root hub */
161 if (((urb->dev->speed == USB_SPEED_LOW) ||
162 (urb->dev->speed == USB_SPEED_FULL)) &&
163 (urb->dev->tt) && (urb->dev->tt->hub) && (urb->dev->tt->hub->devnum != 1))
165 DWC_DEBUGPL(DBG_HCD, "QH init: EP %d: TT found at hub addr %d, for port %d\n",
166 usb_pipeendpoint(urb->pipe), urb->dev->tt->hub->devnum,
171 if (qh->ep_type == USB_ENDPOINT_XFER_INT ||
172 qh->ep_type == USB_ENDPOINT_XFER_ISOC) {
173 /* Compute scheduling parameters once and save them. */
176 /** @todo Account for split transfers in the bus time. */
177 int bytecount = dwc_hb_mult(qh->maxp) * dwc_max_packet(qh->maxp);
178 qh->usecs = NS_TO_US(usb_calc_bus_time(urb->dev->speed,
179 usb_pipein(urb->pipe),
180 (qh->ep_type == USB_ENDPOINT_XFER_ISOC),
183 /* Start in a slightly future (micro)frame. */
184 qh->sched_frame = dwc_frame_num_inc(hcd->frame_number,
186 qh->interval = urb->interval;
188 /* Increase interrupt polling rate for debugging. */
189 if (qh->ep_type == USB_ENDPOINT_XFER_INT) {
193 hprt.d32 = dwc_read_reg32(hcd->core_if->host_if->hprt0);
194 if ((hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) &&
195 ((urb->dev->speed == USB_SPEED_LOW) ||
196 (urb->dev->speed == USB_SPEED_FULL))) {
198 qh->sched_frame |= 0x7;
199 qh->start_split_frame = qh->sched_frame;
204 DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD QH Initialized\n");
205 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - qh = %p\n", qh);
206 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Device Address = %d\n",
208 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Endpoint %d, %s\n",
209 usb_pipeendpoint(urb->pipe),
210 usb_pipein(urb->pipe) == USB_DIR_IN ? "IN" : "OUT");
212 qh->nak_frame = 0xffff;
214 switch(urb->dev->speed) {
228 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Speed = %s\n", speed);
230 switch (qh->ep_type) {
231 case USB_ENDPOINT_XFER_ISOC:
232 type = "isochronous";
234 case USB_ENDPOINT_XFER_INT:
237 case USB_ENDPOINT_XFER_CONTROL:
240 case USB_ENDPOINT_XFER_BULK:
247 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Type = %s\n",type);
250 if (qh->ep_type == USB_ENDPOINT_XFER_INT) {
251 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - usecs = %d\n",
253 DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - interval = %d\n",
262 * Microframe scheduler
263 * track the total use in hcd->frame_usecs
264 * keep each qh use in qh->frame_usecs
265 * when surrendering the qh then donate the time back
267 static const u16 max_uframe_usecs[] = { 100, 100, 100, 100, 100, 100, 30, 0 };
270 * called from dwc_otg_hcd.c:dwc_otg_hcd_init
272 int init_hcd_usecs(dwc_otg_hcd_t *hcd)
276 for (i = 0; i < 8; i++)
277 hcd->frame_usecs[i] = max_uframe_usecs[i];
282 static int find_single_uframe(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
296 /* At the start hcd->frame_usecs[i] = max_uframe_usecs[i]; */
297 if (utime <= hcd->frame_usecs[i]) {
298 hcd->frame_usecs[i] -= utime;
299 qh->frame_usecs[i] += utime;
316 * use this for FS apps that can span multiple uframes
318 static int find_multi_uframe(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
335 if (hcd->frame_usecs[i] <= 0) {
345 * We need n consequtive slots so use j as a start slot.
346 * j plus j+1 must be enough time (for now)
348 xtime = hcd->frame_usecs[i];
349 for (j = i + 1; j < 8; j++) {
351 * if we add this frame remaining time to xtime we may
352 * be OK, if not we need to test j for a complete frame.
354 if ((xtime + hcd->frame_usecs[j]) < utime) {
355 if (hcd->frame_usecs[j] < max_uframe_usecs[j]) {
361 if (xtime >= utime) {
363 j = 8; /* stop loop with a good value ret */
366 /* add the frame time to x time */
367 xtime += hcd->frame_usecs[j];
368 /* we must have a fully available next frame or break */
369 if ((xtime < utime) &&
370 (hcd->frame_usecs[j] == max_uframe_usecs[j])) {
372 j = 8; /* stop loop with a bad value ret */
378 for (j = i; (t_left > 0) && (j < 8); j++) {
379 t_left -= hcd->frame_usecs[j];
381 qh->frame_usecs[j] +=
382 hcd->frame_usecs[j] + t_left;
383 hcd->frame_usecs[j] = -t_left;
387 qh->frame_usecs[j] +=
389 hcd->frame_usecs[j] = 0;
403 static int find_uframe(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
407 if (qh->speed == USB_SPEED_HIGH)
408 /* if this is a hs transaction we need a full frame */
409 ret = find_single_uframe(hcd, qh);
411 /* FS transaction may need a sequence of frames */
412 ret = find_multi_uframe(hcd, qh);
418 * Checks that the max transfer size allowed in a host channel is large enough
419 * to handle the maximum data transfer in a single (micro)frame for a periodic
422 * @param hcd The HCD state structure for the DWC OTG controller.
423 * @param qh QH for a periodic endpoint.
425 * @return 0 if successful, negative error code otherwise.
427 static int check_max_xfer_size(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
430 uint32_t max_xfer_size;
431 uint32_t max_channel_xfer_size;
435 max_xfer_size = dwc_max_packet(qh->maxp) * dwc_hb_mult(qh->maxp);
436 max_channel_xfer_size = hcd->core_if->core_params->max_transfer_size;
438 if (max_xfer_size > max_channel_xfer_size) {
439 DWC_NOTICE("%s: Periodic xfer length %d > "
440 "max xfer length for channel %d\n",
441 __func__, max_xfer_size, max_channel_xfer_size);
449 * Schedules an interrupt or isochronous transfer in the periodic schedule.
451 static int schedule_periodic(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
454 struct usb_bus *bus = hcd_to_bus(dwc_otg_hcd_to_hcd(hcd));
458 num_channels = hcd->core_if->core_params->host_channels;
460 if ((hcd->periodic_channels < num_channels - 1)) {
461 if (hcd->periodic_channels + hcd->nakking_channels >= num_channels) {
462 /* All non-periodic channels are nakking? Halt
463 * one to make room (as long as there is at
464 * least one channel for non-periodic transfers,
465 * all the blocking non-periodics can time-share
466 * that one channel. */
467 dwc_hc_t *hc = dwc_otg_halt_nakking_channel(hcd);
469 DWC_DEBUGPL(DBG_HCD, "Out of Host Channels for periodic transfer - Halting channel %d (dev %d ep%d%s)\n", hc->hc_num, hc->dev_addr, hc->ep_num, (hc->ep_is_in ? "in" : "out"));
471 /* It could be that all channels are currently occupied,
472 * but in that case one will be freed up soon (either
473 * because it completed or because it was forced to halt
476 status = find_uframe(hcd, qh);
484 /* Set the new frame up */
486 qh->sched_frame &= ~0x7;
487 qh->sched_frame |= (frame & 7);
492 pr_notice("%s: Insufficient periodic bandwidth for "
493 "periodic transfer.\n", __func__);
496 status = check_max_xfer_size(hcd, qh);
498 pr_notice("%s: Channel max transfer size too small "
499 "for periodic transfer.\n", __func__);
502 /* Always start in the inactive schedule. */
503 list_add_tail(&qh->qh_list_entry, &hcd->periodic_sched_inactive);
505 hcd->periodic_channels++;
507 /* Update claimed usecs per (micro)frame. */
508 hcd->periodic_usecs += qh->usecs;
511 * Update average periodic bandwidth claimed and # periodic reqs for
514 bus->bandwidth_allocated += qh->usecs / qh->interval;
516 if (qh->ep_type == USB_ENDPOINT_XFER_INT)
517 bus->bandwidth_int_reqs++;
519 bus->bandwidth_isoc_reqs++;
525 * This function adds a QH to either the non periodic or periodic schedule if
526 * it is not already in the schedule. If the QH is already in the schedule, no
529 * @return 0 if successful, negative error code otherwise.
531 int dwc_otg_hcd_qh_add (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
533 //unsigned long flags;
537 //the spinlock is locked before this function get called,
538 //but in case the lock is needed, the check function is preserved
539 //but in non-SMP mode, all spinlock is lockable.
540 //don't do the test in non-SMP mode
542 if(spin_trylock(&hcd->lock)) {
543 printk("%s: It is not supposed to be lockable!!\n",__func__);
547 // SPIN_LOCK_IRQSAVE(&hcd->lock, flags)
549 if (!list_empty(&qh->qh_list_entry)) {
550 /* QH already in a schedule. */
554 /* Add the new QH to the appropriate schedule */
555 if (dwc_qh_is_non_per(qh)) {
556 /* Always start in the inactive schedule. */
557 list_add_tail(&qh->qh_list_entry, &hcd->non_periodic_sched_inactive);
559 status = schedule_periodic(hcd, qh);
563 // SPIN_UNLOCK_IRQRESTORE(&hcd->lock, flags)
569 * Removes an interrupt or isochronous transfer from the periodic schedule.
571 static void deschedule_periodic(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
573 struct usb_bus *bus = hcd_to_bus(dwc_otg_hcd_to_hcd(hcd));
576 list_del_init(&qh->qh_list_entry);
578 hcd->periodic_channels--;
580 /* Update claimed usecs per (micro)frame. */
581 hcd->periodic_usecs -= qh->usecs;
582 for (i = 0; i < 8; i++) {
583 hcd->frame_usecs[i] += qh->frame_usecs[i];
584 qh->frame_usecs[i] = 0;
587 * Update average periodic bandwidth claimed and # periodic reqs for
590 bus->bandwidth_allocated -= qh->usecs / qh->interval;
592 if (qh->ep_type == USB_ENDPOINT_XFER_INT)
593 bus->bandwidth_int_reqs--;
595 bus->bandwidth_isoc_reqs--;
599 * Removes a QH from either the non-periodic or periodic schedule. Memory is
602 * @param[in] hcd The HCD state structure.
603 * @param[in] qh QH to remove from schedule. */
604 void dwc_otg_hcd_qh_remove (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
606 //unsigned long flags;
609 //the spinlock is locked before this function get called,
610 //but in case the lock is needed, the check function is preserved
611 //but in non-SMP mode, all spinlock is lockable.
612 //don't do the test in non-SMP mode
614 if(spin_trylock(&hcd->lock)) {
615 printk("%s: It is not supposed to be lockable!!\n",__func__);
619 // SPIN_LOCK_IRQSAVE(&hcd->lock, flags);
621 if (list_empty(&qh->qh_list_entry)) {
622 /* QH is not in a schedule. */
626 if (dwc_qh_is_non_per(qh)) {
627 if (hcd->non_periodic_qh_ptr == &qh->qh_list_entry) {
628 hcd->non_periodic_qh_ptr = hcd->non_periodic_qh_ptr->next;
630 list_del_init(&qh->qh_list_entry);
632 deschedule_periodic(hcd, qh);
636 // SPIN_UNLOCK_IRQRESTORE(&hcd->lock, flags);
641 * Deactivates a QH. For non-periodic QHs, removes the QH from the active
642 * non-periodic schedule. The QH is added to the inactive non-periodic
643 * schedule if any QTDs are still attached to the QH.
645 * For periodic QHs, the QH is removed from the periodic queued schedule. If
646 * there are any QTDs still attached to the QH, the QH is added to either the
647 * periodic inactive schedule or the periodic ready schedule and its next
648 * scheduled frame is calculated. The QH is placed in the ready schedule if
649 * the scheduled frame has been reached already. Otherwise it's placed in the
650 * inactive schedule. If there are no QTDs attached to the QH, the QH is
651 * completely removed from the periodic schedule.
653 void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh, int sched_next_periodic_split)
655 if (dwc_qh_is_non_per(qh)) {
656 dwc_otg_hcd_qh_remove(hcd, qh);
657 if (!list_empty(&qh->qtd_list)) {
658 /* Add back to inactive non-periodic schedule. */
659 dwc_otg_hcd_qh_add(hcd, qh);
662 uint16_t frame_number = dwc_otg_hcd_get_frame_number(dwc_otg_hcd_to_hcd(hcd));
665 /* Schedule the next continuing periodic split transfer */
666 if (sched_next_periodic_split) {
668 qh->sched_frame = frame_number;
669 if (dwc_frame_num_le(frame_number,
670 dwc_frame_num_inc(qh->start_split_frame, 1))) {
672 * Allow one frame to elapse after start
673 * split microframe before scheduling
674 * complete split, but DONT if we are
675 * doing the next start split in the
676 * same frame for an ISOC out.
678 if ((qh->ep_type != USB_ENDPOINT_XFER_ISOC) || (qh->ep_is_in != 0)) {
679 qh->sched_frame = dwc_frame_num_inc(qh->sched_frame, 1);
683 qh->sched_frame = dwc_frame_num_inc(qh->start_split_frame,
685 if (dwc_frame_num_le(qh->sched_frame, frame_number)) {
686 qh->sched_frame = frame_number;
688 qh->sched_frame |= 0x7;
689 qh->start_split_frame = qh->sched_frame;
692 qh->sched_frame = dwc_frame_num_inc(qh->sched_frame, qh->interval);
693 if (dwc_frame_num_le(qh->sched_frame, frame_number)) {
694 qh->sched_frame = frame_number;
698 if (list_empty(&qh->qtd_list)) {
699 dwc_otg_hcd_qh_remove(hcd, qh);
702 * Remove from periodic_sched_queued and move to
705 if (qh->sched_frame == frame_number) {
706 list_move(&qh->qh_list_entry,
707 &hcd->periodic_sched_ready);
709 list_move(&qh->qh_list_entry,
710 &hcd->periodic_sched_inactive);
717 * This function allocates and initializes a QTD.
719 * @param[in] urb The URB to create a QTD from. Each URB-QTD pair will end up
720 * pointing to each other so each pair should have a unique correlation.
722 * @return Returns pointer to the newly allocated QTD, or NULL on error. */
723 dwc_otg_qtd_t *dwc_otg_hcd_qtd_create (struct urb *urb)
727 qtd = dwc_otg_hcd_qtd_alloc ();
732 dwc_otg_hcd_qtd_init (qtd, urb);
737 * Initializes a QTD structure.
739 * @param[in] qtd The QTD to initialize.
740 * @param[in] urb The URB to use for initialization. */
741 void dwc_otg_hcd_qtd_init (dwc_otg_qtd_t *qtd, struct urb *urb)
743 memset (qtd, 0, sizeof (dwc_otg_qtd_t));
745 if (usb_pipecontrol(urb->pipe)) {
747 * The only time the QTD data toggle is used is on the data
748 * phase of control transfers. This phase always starts with
751 qtd->data_toggle = DWC_OTG_HC_PID_DATA1;
752 qtd->control_phase = DWC_OTG_CONTROL_SETUP;
756 qtd->complete_split = 0;
757 qtd->isoc_split_pos = DWC_HCSPLIT_XACTPOS_ALL;
758 qtd->isoc_split_offset = 0;
760 /* Store the qtd ptr in the urb to reference what QTD. */
766 * This function adds a QTD to the QTD-list of a QH. It will find the correct
767 * QH to place the QTD into. If it does not find a QH, then it will create a
768 * new QH. If the QH to which the QTD is added is not currently scheduled, it
769 * is placed into the proper schedule based on its EP type.
771 * @param[in] qtd The QTD to add
772 * @param[in] dwc_otg_hcd The DWC HCD structure
774 * @return 0 if successful, negative error code otherwise.
776 int dwc_otg_hcd_qtd_add (dwc_otg_qtd_t *qtd,
777 dwc_otg_hcd_t *dwc_otg_hcd)
779 struct usb_host_endpoint *ep;
783 struct urb *urb = qtd->urb;
786 * Get the QH which holds the QTD-list to insert to. Create QH if it
789 usb_hcd_link_urb_to_ep(dwc_otg_hcd_to_hcd(dwc_otg_hcd), urb);
790 ep = dwc_urb_to_endpoint(urb);
791 qh = (dwc_otg_qh_t *)ep->hcpriv;
793 qh = dwc_otg_hcd_qh_create (dwc_otg_hcd, urb);
795 usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(dwc_otg_hcd), urb);
802 retval = dwc_otg_hcd_qh_add(dwc_otg_hcd, qh);
804 list_add_tail(&qtd->qtd_list_entry, &qh->qtd_list);
806 usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(dwc_otg_hcd), urb);
813 #endif /* DWC_DEVICE_ONLY */