1 From eac04ec501cac3069c279ccaa72fce4f530a4071 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sun, 8 Jul 2012 21:07:12 +0200
4 Subject: [PATCH 68/72] MIPS: BCM63XX: enable enetsw for BCM6362
7 arch/mips/bcm63xx/clk.c | 4 +++-
8 arch/mips/bcm63xx/dev-enet.c | 6 ++++--
9 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 1 +
10 3 files changed, 8 insertions(+), 3 deletions(-)
12 --- a/arch/mips/bcm63xx/clk.c
13 +++ b/arch/mips/bcm63xx/clk.c
14 @@ -121,11 +121,13 @@ static void enetsw_set(struct clk *clk,
18 - if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
19 + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
23 mask = CKCTL_6328_ROBOSW_EN;
24 + else if (BCMCPU_IS_6362())
25 + mask = CKCTL_6362_ROBOSW_EN;
27 mask = CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN |
28 CKCTL_6368_SWPKT_SAR_EN;
29 --- a/arch/mips/bcm63xx/dev-enet.c
30 +++ b/arch/mips/bcm63xx/dev-enet.c
31 @@ -141,7 +141,7 @@ static int __init register_shared(void)
32 shared_res[0].end = shared_res[0].start;
33 shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
35 - if (BCMCPU_IS_6328() || BCMCPU_IS_6368())
36 + if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
40 @@ -224,7 +224,7 @@ bcm63xx_enetsw_register(const struct bcm
44 - if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
45 + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
48 ret = register_shared();
49 @@ -243,6 +243,8 @@ bcm63xx_enetsw_register(const struct bcm
52 enetsw_pd.num_ports = ENETSW_PORTS_6328;
53 + else if (BCMCPU_IS_6362())
54 + enetsw_pd.num_ports = ENETSW_PORTS_6362;
55 else if (BCMCPU_IS_6368())
56 enetsw_pd.num_ports = ENETSW_PORTS_6368;
58 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
59 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
60 @@ -44,6 +44,7 @@ struct bcm63xx_enet_platform_data {
62 #define ENETSW_MAX_PORT 6
63 #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
64 +#define ENETSW_PORTS_6362 6 /* 4 FE PHY + 2 RGMII */
65 #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
67 #define ENETSW_RGMII_PORT0 4