1 From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Sun, 15 Dec 2013 20:46:26 +0100
4 Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
6 Newer SoCs have 128 bit wide irq registers, thus 128 available internal
9 arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
10 arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
11 2 files changed, 4 insertions(+), 2 deletions(-)
13 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
14 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
16 #ifndef BCM63XX_IRQ_H_
17 #define BCM63XX_IRQ_H_
20 #include <bcm63xx_cpu.h>
22 #define IRQ_INTERNAL_BASE 8
23 -#define IRQ_EXTERNAL_BASE 100
24 +#define NR_INTERNAL_IRQS 128
25 +#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
26 #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
27 #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
28 #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
29 --- a/arch/mips/include/asm/mach-bcm63xx/irq.h
30 +++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
32 #ifndef __ASM_MACH_BCM63XX_IRQ_H
33 #define __ASM_MACH_BCM63XX_IRQ_H
37 #define MIPS_CPU_IRQ_BASE 0