target/linux/brcm63xx/patches-2.6.27/003-add_serial_driver_for_bcm63xx_integr.patch

   1 From 6c489656b09998ed6a6f857e01ccf630e29358dd Mon Sep 17 00:00:00 2001
   2 From: Maxime Bizon <mbizon@freebox.fr>
   3 Date: Fri, 18 Jul 2008 19:35:55 +0200
   4 Subject: [PATCH] [MIPS] BCM63XX: Add serial driver for bcm63xx integrated UART.
   5
   6 Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
   7 ---
   8  arch/mips/bcm63xx/Makefile                       |    1 +
   9  arch/mips/bcm63xx/dev-uart.c                     |   41 +
  10  drivers/serial/Kconfig                           |   19 +
  11  drivers/serial/Makefile                          |    1 +
  12  drivers/serial/bcm63xx_uart.c                    |  890 ++++++++++++++++++++++
  13  include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h |    6 +
  14  include/linux/serial_core.h                      |    2 +
  15  7 files changed, 960 insertions(+), 0 deletions(-)
  16  create mode 100644 arch/mips/bcm63xx/dev-uart.c
  17  create mode 100644 drivers/serial/bcm63xx_uart.c
  18  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
  19
  20 diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
  21 index 4fc0a1c..8f3299e 100644
  22 --- a/arch/mips/bcm63xx/Makefile
  23 +++ b/arch/mips/bcm63xx/Makefile
  24 @@ -1,2 +1,3 @@
  25  obj-y          += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
  26 +obj-y          += dev-uart.o
  27  obj-$(CONFIG_EARLY_PRINTK)     += early_printk.o
  28 diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c
  29 new file mode 100644
  30 index 0000000..5f3d89c
  31 --- /dev/null
  32 +++ b/arch/mips/bcm63xx/dev-uart.c
  33 @@ -0,0 +1,41 @@
  34 +/*
  35 + * This file is subject to the terms and conditions of the GNU General Public
  36 + * License.  See the file "COPYING" in the main directory of this archive
  37 + * for more details.
  38 + *
  39 + * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
  40 + */
  41 +
  42 +#include <linux/init.h>
  43 +#include <linux/kernel.h>
  44 +#include <linux/platform_device.h>
  45 +#include <bcm63xx_cpu.h>
  46 +#include <bcm63xx_dev_uart.h>
  47 +
  48 +static struct resource uart_resources[] = {
  49 +       {
  50 +               .start          = -1, /* filled at runtime */
  51 +               .end            = -1, /* filled at runtime */
  52 +               .flags          = IORESOURCE_MEM,
  53 +       },
  54 +       {
  55 +               .start          = -1, /* filled at runtime */
  56 +               .flags          = IORESOURCE_IRQ,
  57 +       },
  58 +};
  59 +
  60 +static struct platform_device bcm63xx_uart_device = {
  61 +       .name           = "bcm63xx_uart",
  62 +       .id             = 0,
  63 +       .num_resources  = ARRAY_SIZE(uart_resources),
  64 +       .resource       = uart_resources,
  65 +};
  66 +
  67 +int __init bcm63xx_uart_register(void)
  68 +{
  69 +       uart_resources[0].start = bcm63xx_regset_address(RSET_UART0);
  70 +       uart_resources[0].end = uart_resources[0].start;
  71 +       uart_resources[0].end += RSET_UART_SIZE - 1;
  72 +       uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
  73 +       return platform_device_register(&bcm63xx_uart_device);
  74 +}
  75 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
  76 index 77cb342..52b31a4 100644
  77 --- a/drivers/serial/Kconfig
  78 +++ b/drivers/serial/Kconfig
  79 @@ -1421,4 +1421,23 @@ config SPORT_BAUD_RATE
  80         default 19200 if (SERIAL_SPORT_BAUD_RATE_19200)
  81         default 9600 if (SERIAL_SPORT_BAUD_RATE_9600)
  82
  83 +config SERIAL_BCM63XX
  84 +       tristate "bcm63xx serial port support"
  85 +       select SERIAL_CORE
  86 +       depends on BCM63XX
  87 +       help
  88 +         If you have a bcm63xx CPU, you can enable its onboard
  89 +         serial port by enabling this options.
  90 +
  91 +          To compile this driver as a module, choose M here: the
  92 +          module will be called bcm963xx_uart.
  93 +
  94 +config SERIAL_BCM63XX_CONSOLE
  95 +       bool "Console on bcm63xx serial port"
  96 +       depends on SERIAL_BCM63XX
  97 +       select SERIAL_CORE_CONSOLE
  98 +       help
  99 +         If you have enabled the serial port on the bcm63xx CPU
 100 +         you can make it the console by answering Y to this option.
 101 +
 102  endmenu
 103 diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
 104 index 7e7383e..84f6cfc 100644
 105 --- a/drivers/serial/Makefile
 106 +++ b/drivers/serial/Makefile
 107 @@ -24,6 +24,7 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
 108  obj-$(CONFIG_SERIAL_PXA) += pxa.o
 109  obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o
 110  obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
 111 +obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
 112  obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o
 113  obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
 114  obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
 115 diff --git a/drivers/serial/bcm63xx_uart.c b/drivers/serial/bcm63xx_uart.c
 116 new file mode 100644
 117 index 0000000..606f4d6
 118 --- /dev/null
 119 +++ b/drivers/serial/bcm63xx_uart.c
 120 @@ -0,0 +1,890 @@
 121 +/*
 122 + * This file is subject to the terms and conditions of the GNU General Public
 123 + * License.  See the file "COPYING" in the main directory of this archive
 124 + * for more details.
 125 + *
 126 + * Derived from many drivers using generic_serial interface.
 127 + *
 128 + * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
 129 + *
 130 + *  Serial driver for BCM63xx integrated UART.
 131 + *
 132 + * Hardware flow control was _not_ tested since I only have RX/TX on
 133 + * my board.
 134 + */
 135 +
 136 +#if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 137 +#define SUPPORT_SYSRQ
 138 +#endif
 139 +
 140 +#include <linux/kernel.h>
 141 +#include <linux/platform_device.h>
 142 +#include <linux/init.h>
 143 +#include <linux/delay.h>
 144 +#include <linux/module.h>
 145 +#include <linux/console.h>
 146 +#include <linux/clk.h>
 147 +#include <linux/tty.h>
 148 +#include <linux/tty_flip.h>
 149 +#include <linux/sysrq.h>
 150 +#include <linux/serial.h>
 151 +#include <linux/serial_core.h>
 152 +
 153 +#include <bcm63xx_clk.h>
 154 +#include <bcm63xx_irq.h>
 155 +#include <bcm63xx_regs.h>
 156 +#include <bcm63xx_io.h>
 157 +
 158 +#define BCM63XX_NR_UARTS       1
 159 +
 160 +static struct uart_port ports[BCM63XX_NR_UARTS];
 161 +
 162 +/*
 163 + * rx interrupt mask / stat
 164 + *
 165 + * mask:
 166 + *  - rx fifo full
 167 + *  - rx fifo above threshold
 168 + *  - rx fifo not empty for too long
 169 + */
 170 +#define UART_RX_INT_MASK       (UART_IR_MASK(UART_IR_RXOVER) |         \
 171 +                               UART_IR_MASK(UART_IR_RXTHRESH) |        \
 172 +                               UART_IR_MASK(UART_IR_RXTIMEOUT))
 173 +
 174 +#define UART_RX_INT_STAT       (UART_IR_STAT(UART_IR_RXOVER) |         \
 175 +                               UART_IR_STAT(UART_IR_RXTHRESH) |        \
 176 +                               UART_IR_STAT(UART_IR_RXTIMEOUT))
 177 +
 178 +/*
 179 + * tx interrupt mask / stat
 180 + *
 181 + * mask:
 182 + * - tx fifo empty
 183 + * - tx fifo below threshold
 184 + */
 185 +#define UART_TX_INT_MASK       (UART_IR_MASK(UART_IR_TXEMPTY) |        \
 186 +                               UART_IR_MASK(UART_IR_TXTRESH))
 187 +
 188 +#define UART_TX_INT_STAT       (UART_IR_STAT(UART_IR_TXEMPTY) |        \
 189 +                               UART_IR_STAT(UART_IR_TXTRESH))
 190 +
 191 +/*
 192 + * external input interrupt
 193 + *
 194 + * mask: any edge on CTS, DCD
 195 + */
 196 +#define UART_EXTINP_INT_MASK   (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \
 197 +                                UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD))
 198 +
 199 +/*
 200 + * handy uart register accessor
 201 + */
 202 +static inline unsigned int bcm_uart_readl(struct uart_port *port,
 203 +                                        unsigned int offset)
 204 +{
 205 +       return bcm_readl(port->membase + offset);
 206 +}
 207 +
 208 +static inline void bcm_uart_writel(struct uart_port *port,
 209 +                                 unsigned int value, unsigned int offset)
 210 +{
 211 +       bcm_writel(value, port->membase + offset);
 212 +}
 213 +
 214 +/*
 215 + * serial core request to check if uart tx fifo is empty
 216 + */
 217 +static unsigned int bcm_uart_tx_empty(struct uart_port *port)
 218 +{
 219 +       unsigned int val;
 220 +
 221 +       val = bcm_uart_readl(port, UART_IR_REG);
 222 +       return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0;
 223 +}
 224 +
 225 +/*
 226 + * serial core request to set RTS and DTR pin state and loopback mode
 227 + */
 228 +static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 229 +{
 230 +       unsigned int val;
 231 +
 232 +       val = bcm_uart_readl(port, UART_MCTL_REG);
 233 +       val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK);
 234 +       /* invert of written value is reflected on the pin */
 235 +       if (!(mctrl & TIOCM_DTR))
 236 +               val |= UART_MCTL_DTR_MASK;
 237 +       if (!(mctrl & TIOCM_RTS))
 238 +               val |= UART_MCTL_RTS_MASK;
 239 +       bcm_uart_writel(port, val, UART_MCTL_REG);
 240 +
 241 +       val = bcm_uart_readl(port, UART_CTL_REG);
 242 +       if (mctrl & TIOCM_LOOP)
 243 +               val |= UART_CTL_LOOPBACK_MASK;
 244 +       else
 245 +               val &= ~UART_CTL_LOOPBACK_MASK;
 246 +       bcm_uart_writel(port, val, UART_CTL_REG);
 247 +}
 248 +
 249 +/*
 250 + * serial core request to return RI, CTS, DCD and DSR pin state
 251 + */
 252 +static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
 253 +{
 254 +       unsigned int val, mctrl;
 255 +
 256 +       mctrl = 0;
 257 +       val = bcm_uart_readl(port, UART_EXTINP_REG);
 258 +       if (val & UART_EXTINP_RI_MASK)
 259 +               mctrl |= TIOCM_RI;
 260 +       if (val & UART_EXTINP_CTS_MASK)
 261 +               mctrl |= TIOCM_CTS;
 262 +       if (val & UART_EXTINP_DCD_MASK)
 263 +               mctrl |= TIOCM_CD;
 264 +       if (val & UART_EXTINP_DSR_MASK)
 265 +               mctrl |= TIOCM_DSR;
 266 +       return mctrl;
 267 +}
 268 +
 269 +/*
 270 + * serial core request to disable tx ASAP (used for flow control)
 271 + */
 272 +static void bcm_uart_stop_tx(struct uart_port *port)
 273 +{
 274 +       unsigned int val;
 275 +
 276 +       val = bcm_uart_readl(port, UART_CTL_REG);
 277 +       val &= ~(UART_CTL_TXEN_MASK);
 278 +       bcm_uart_writel(port, val, UART_CTL_REG);
 279 +
 280 +       val = bcm_uart_readl(port, UART_IR_REG);
 281 +       val &= ~UART_TX_INT_MASK;
 282 +       bcm_uart_writel(port, val, UART_IR_REG);
 283 +}
 284 +
 285 +/*
 286 + * serial core request to (re)enable tx
 287 + */
 288 +static void bcm_uart_start_tx(struct uart_port *port)
 289 +{
 290 +       unsigned int val;
 291 +
 292 +       val = bcm_uart_readl(port, UART_IR_REG);
 293 +       val |= UART_TX_INT_MASK;
 294 +       bcm_uart_writel(port, val, UART_IR_REG);
 295 +
 296 +       val = bcm_uart_readl(port, UART_CTL_REG);
 297 +       val |= UART_CTL_TXEN_MASK;
 298 +       bcm_uart_writel(port, val, UART_CTL_REG);
 299 +}
 300 +
 301 +/*
 302 + * serial core request to stop rx, called before port shutdown
 303 + */
 304 +static void bcm_uart_stop_rx(struct uart_port *port)
 305 +{
 306 +       unsigned int val;
 307 +
 308 +       val = bcm_uart_readl(port, UART_IR_REG);
 309 +       val &= ~UART_RX_INT_MASK;
 310 +       bcm_uart_writel(port, val, UART_IR_REG);
 311 +}
 312 +
 313 +/*
 314 + * serial core request to enable modem status interrupt reporting
 315 + */
 316 +static void bcm_uart_enable_ms(struct uart_port *port)
 317 +{
 318 +       unsigned int val;
 319 +
 320 +       val = bcm_uart_readl(port, UART_IR_REG);
 321 +       val |= UART_IR_MASK(UART_IR_EXTIP);
 322 +       bcm_uart_writel(port, val, UART_IR_REG);
 323 +}
 324 +
 325 +/*
 326 + * serial core request to start/stop emitting break char
 327 + */
 328 +static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
 329 +{
 330 +       unsigned long flags;
 331 +       unsigned int val;
 332 +
 333 +       spin_lock_irqsave(&port->lock, flags);
 334 +
 335 +       val = bcm_uart_readl(port, UART_CTL_REG);
 336 +       if (ctl)
 337 +               val |= UART_CTL_XMITBRK_MASK;
 338 +       else
 339 +               val &= ~UART_CTL_XMITBRK_MASK;
 340 +       bcm_uart_writel(port, val, UART_CTL_REG);
 341 +
 342 +       spin_unlock_irqrestore(&port->lock, flags);
 343 +}
 344 +
 345 +/*
 346 + * return port type in string format
 347 + */
 348 +static const char *bcm_uart_type(struct uart_port *port)
 349 +{
 350 +       return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
 351 +}
 352 +
 353 +/*
 354 + * read all chars in rx fifo and send them to core
 355 + */
 356 +static void bcm_uart_do_rx(struct uart_port *port)
 357 +{
 358 +       struct tty_struct *tty;
 359 +       unsigned int max_count;
 360 +
 361 +       /* limit number of char read in interrupt, should not be
 362 +        * higher than fifo size anyway since we're much faster than
 363 +        * serial port */
 364 +       max_count = 32;
 365 +       tty = port->info->port.tty;
 366 +       do {
 367 +               unsigned int iestat, c, cstat;
 368 +               char flag;
 369 +
 370 +               /* get overrun/fifo empty information from ier
 371 +                * register */
 372 +               iestat = bcm_uart_readl(port, UART_IR_REG);
 373 +               if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
 374 +                       break;
 375 +
 376 +               cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
 377 +               port->icount.rx++;
 378 +               flag = TTY_NORMAL;
 379 +               c &= 0xff;
 380 +
 381 +               if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) {
 382 +                       /* do stats first */
 383 +                       if (cstat & UART_FIFO_BRKDET_MASK) {
 384 +                               port->icount.brk++;
 385 +                               if (uart_handle_break(port))
 386 +                                       continue;
 387 +                       }
 388 +
 389 +                       if (cstat & UART_FIFO_PARERR_MASK)
 390 +                               port->icount.parity++;
 391 +                       if (cstat & UART_FIFO_FRAMEERR_MASK)
 392 +                               port->icount.frame++;
 393 +
 394 +                       /* update flag wrt read_status_mask */
 395 +                       cstat &= port->read_status_mask;
 396 +                       if (cstat & UART_FIFO_BRKDET_MASK)
 397 +                               flag = TTY_BREAK;
 398 +                       if (cstat & UART_FIFO_FRAMEERR_MASK)
 399 +                               flag = TTY_FRAME;
 400 +                       if (cstat & UART_FIFO_PARERR_MASK)
 401 +                               flag = TTY_PARITY;
 402 +               }
 403 +
 404 +               if (uart_handle_sysrq_char(port, c))
 405 +                       continue;
 406 +
 407 +               if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
 408 +                       port->icount.overrun++;
 409 +                       tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 410 +               }
 411 +
 412 +               if ((cstat & port->ignore_status_mask) == 0)
 413 +                       tty_insert_flip_char(tty, c, flag);
 414 +
 415 +       } while (--max_count);
 416 +
 417 +       tty_flip_buffer_push(tty);
 418 +}
 419 +
 420 +/*
 421 + * fill tx fifo with chars to send, stop when fifo is about to be full
 422 + * or when all chars have been sent.
 423 + */
 424 +static void bcm_uart_do_tx(struct uart_port *port)
 425 +{
 426 +       struct circ_buf *xmit;
 427 +       unsigned int val, max_count;
 428 +
 429 +       if (port->x_char) {
 430 +               bcm_uart_writel(port, port->x_char, UART_FIFO_REG);
 431 +               port->icount.tx++;
 432 +               port->x_char = 0;
 433 +               return;
 434 +       }
 435 +
 436 +       if (uart_tx_stopped(port)) {
 437 +               bcm_uart_stop_tx(port);
 438 +               return;
 439 +       }
 440 +
 441 +       xmit = &port->info->xmit;
 442 +       if (uart_circ_empty(xmit))
 443 +               goto txq_empty;
 444 +
 445 +       val = bcm_uart_readl(port, UART_MCTL_REG);
 446 +       val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT;
 447 +       max_count = port->fifosize - val;
 448 +
 449 +       while (max_count--) {
 450 +               unsigned int c;
 451 +
 452 +               c = xmit->buf[xmit->tail];
 453 +               bcm_uart_writel(port, c, UART_FIFO_REG);
 454 +               xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 455 +               port->icount.tx++;
 456 +               if (uart_circ_empty(xmit))
 457 +                       break;
 458 +       }
 459 +
 460 +       if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 461 +               uart_write_wakeup(port);
 462 +
 463 +       if (uart_circ_empty(xmit))
 464 +               goto txq_empty;
 465 +       return;
 466 +
 467 +txq_empty:
 468 +       /* nothing to send, disable transmit interrupt */
 469 +       val = bcm_uart_readl(port, UART_IR_REG);
 470 +       val &= ~UART_TX_INT_MASK;
 471 +       bcm_uart_writel(port, val, UART_IR_REG);
 472 +       return;
 473 +}
 474 +
 475 +/*
 476 + * process uart interrupt
 477 + */
 478 +static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id)
 479 +{
 480 +       struct uart_port *port;
 481 +       unsigned int irqstat;
 482 +
 483 +       port = dev_id;
 484 +       spin_lock(&port->lock);
 485 +
 486 +       irqstat = bcm_uart_readl(port, UART_IR_REG);
 487 +       if (irqstat & UART_RX_INT_STAT)
 488 +               bcm_uart_do_rx(port);
 489 +
 490 +       if (irqstat & UART_TX_INT_STAT)
 491 +               bcm_uart_do_tx(port);
 492 +
 493 +       if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) {
 494 +               unsigned int estat;
 495 +
 496 +               estat = bcm_uart_readl(port, UART_EXTINP_REG);
 497 +               if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS))
 498 +                       uart_handle_cts_change(port,
 499 +                                              estat & UART_EXTINP_CTS_MASK);
 500 +               if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD))
 501 +                       uart_handle_dcd_change(port,
 502 +                                              estat & UART_EXTINP_DCD_MASK);
 503 +       }
 504 +
 505 +       spin_unlock(&port->lock);
 506 +       return IRQ_HANDLED;
 507 +}
 508 +
 509 +/*
 510 + * enable rx & tx operation on uart
 511 + */
 512 +static void bcm_uart_enable(struct uart_port *port)
 513 +{
 514 +       unsigned int val;
 515 +
 516 +       val = bcm_uart_readl(port, UART_CTL_REG);
 517 +       val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 518 +       bcm_uart_writel(port, val, UART_CTL_REG);
 519 +}
 520 +
 521 +/*
 522 + * disable rx & tx operation on uart
 523 + */
 524 +static void bcm_uart_disable(struct uart_port *port)
 525 +{
 526 +       unsigned int val;
 527 +
 528 +       val = bcm_uart_readl(port, UART_CTL_REG);
 529 +       val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK |
 530 +                UART_CTL_RXEN_MASK);
 531 +       bcm_uart_writel(port, val, UART_CTL_REG);
 532 +}
 533 +
 534 +/*
 535 + * clear all unread data in rx fifo and unsent data in tx fifo
 536 + */
 537 +static void bcm_uart_flush(struct uart_port *port)
 538 +{
 539 +       unsigned int val;
 540 +
 541 +       /* empty rx and tx fifo */
 542 +       val = bcm_uart_readl(port, UART_CTL_REG);
 543 +       val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK;
 544 +       bcm_uart_writel(port, val, UART_CTL_REG);
 545 +
 546 +       /* read any pending char to make sure all irq status are
 547 +        * cleared */
 548 +       (void)bcm_uart_readl(port, UART_FIFO_REG);
 549 +}
 550 +
 551 +/*
 552 + * serial core request to initialize uart and start rx operation
 553 + */
 554 +static int bcm_uart_startup(struct uart_port *port)
 555 +{
 556 +       unsigned int val;
 557 +       int ret;
 558 +
 559 +       /* mask all irq and flush port */
 560 +       bcm_uart_disable(port);
 561 +       bcm_uart_writel(port, 0, UART_IR_REG);
 562 +       bcm_uart_flush(port);
 563 +
 564 +       /* clear any pending external input interrupt */
 565 +       (void)bcm_uart_readl(port, UART_EXTINP_REG);
 566 +
 567 +       /* set rx/tx fifo thresh to fifo half size */
 568 +       val = bcm_uart_readl(port, UART_MCTL_REG);
 569 +       val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK);
 570 +       val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
 571 +       val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
 572 +       bcm_uart_writel(port, val, UART_MCTL_REG);
 573 +
 574 +       /* set rx fifo timeout to 1 char time */
 575 +       val = bcm_uart_readl(port, UART_CTL_REG);
 576 +       val &= ~UART_CTL_RXTMOUTCNT_MASK;
 577 +       val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT;
 578 +       bcm_uart_writel(port, val, UART_CTL_REG);
 579 +
 580 +       /* report any edge on dcd and cts */
 581 +       val = UART_EXTINP_INT_MASK;
 582 +       val |= UART_EXTINP_DCD_NOSENSE_MASK;
 583 +       val |= UART_EXTINP_CTS_NOSENSE_MASK;
 584 +       bcm_uart_writel(port, val, UART_EXTINP_REG);
 585 +
 586 +       /* register irq and enable rx interrupts */
 587 +       ret = request_irq(port->irq, bcm_uart_interrupt, 0,
 588 +                         bcm_uart_type(port), port);
 589 +       if (ret)
 590 +               return ret;
 591 +       bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
 592 +       bcm_uart_enable(port);
 593 +       return 0;
 594 +}
 595 +
 596 +/*
 597 + * serial core request to flush & disable uart
 598 + */
 599 +static void bcm_uart_shutdown(struct uart_port *port)
 600 +{
 601 +       unsigned long flags;
 602 +
 603 +       spin_lock_irqsave(&port->lock, flags);
 604 +       bcm_uart_writel(port, 0, UART_IR_REG);
 605 +       spin_unlock_irqrestore(&port->lock, flags);
 606 +
 607 +       bcm_uart_disable(port);
 608 +       bcm_uart_flush(port);
 609 +       free_irq(port->irq, port);
 610 +}
 611 +
 612 +/*
 613 + * serial core request to change current uart setting
 614 + */
 615 +static void bcm_uart_set_termios(struct uart_port *port,
 616 +                                struct ktermios *new,
 617 +                                struct ktermios *old)
 618 +{
 619 +       unsigned int ctl, baud, quot, ier;
 620 +       unsigned long flags;
 621 +
 622 +       spin_lock_irqsave(&port->lock, flags);
 623 +
 624 +       /* disable uart while changing speed */
 625 +       bcm_uart_disable(port);
 626 +       bcm_uart_flush(port);
 627 +
 628 +       /* update Control register */
 629 +       ctl = bcm_uart_readl(port, UART_CTL_REG);
 630 +       ctl &= ~UART_CTL_BITSPERSYM_MASK;
 631 +
 632 +       switch (new->c_cflag & CSIZE) {
 633 +       case CS5:
 634 +               ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT);
 635 +               break;
 636 +       case CS6:
 637 +               ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT);
 638 +               break;
 639 +       case CS7:
 640 +               ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT);
 641 +               break;
 642 +       default:
 643 +               ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT);
 644 +               break;
 645 +       }
 646 +
 647 +       ctl &= ~UART_CTL_STOPBITS_MASK;
 648 +       if (new->c_cflag & CSTOPB)
 649 +               ctl |= UART_CTL_STOPBITS_2;
 650 +       else
 651 +               ctl |= UART_CTL_STOPBITS_1;
 652 +
 653 +       ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
 654 +       if (new->c_cflag & PARENB)
 655 +               ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
 656 +       ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
 657 +       if (new->c_cflag & PARODD)
 658 +               ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
 659 +       bcm_uart_writel(port, ctl, UART_CTL_REG);
 660 +
 661 +       /* update Baudword register */
 662 +       baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
 663 +       quot = uart_get_divisor(port, baud) - 1;
 664 +       bcm_uart_writel(port, quot, UART_BAUD_REG);
 665 +
 666 +       /* update Interrupt register */
 667 +       ier = bcm_uart_readl(port, UART_IR_REG);
 668 +
 669 +       ier &= ~UART_IR_MASK(UART_IR_EXTIP);
 670 +       if (UART_ENABLE_MS(port, new->c_cflag))
 671 +               ier |= UART_IR_MASK(UART_IR_EXTIP);
 672 +
 673 +       bcm_uart_writel(port, ier, UART_IR_REG);
 674 +
 675 +       /* update read/ignore mask */
 676 +       port->read_status_mask = UART_FIFO_VALID_MASK;
 677 +       if (new->c_iflag & INPCK) {
 678 +               port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
 679 +               port->read_status_mask |= UART_FIFO_PARERR_MASK;
 680 +       }
 681 +       if (new->c_iflag & (BRKINT))
 682 +               port->read_status_mask |= UART_FIFO_BRKDET_MASK;
 683 +
 684 +       port->ignore_status_mask = 0;
 685 +       if (new->c_iflag & IGNPAR)
 686 +               port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
 687 +       if (new->c_iflag & IGNBRK)
 688 +               port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
 689 +       if (!(new->c_cflag & CREAD))
 690 +               port->ignore_status_mask |= UART_FIFO_VALID_MASK;
 691 +
 692 +       uart_update_timeout(port, new->c_cflag, baud);
 693 +       bcm_uart_enable(port);
 694 +       spin_unlock_irqrestore(&port->lock, flags);
 695 +}
 696 +
 697 +/*
 698 + * serial core request to claim uart iomem
 699 + */
 700 +static int bcm_uart_request_port(struct uart_port *port)
 701 +{
 702 +       unsigned int size;
 703 +
 704 +       size = RSET_UART_SIZE;
 705 +       if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
 706 +               dev_err(port->dev, "Memory region busy\n");
 707 +               return -EBUSY;
 708 +       }
 709 +
 710 +       port->membase = ioremap(port->mapbase, size);
 711 +       if (!port->membase) {
 712 +               dev_err(port->dev, "Unable to map registers\n");
 713 +               release_mem_region(port->mapbase, size);
 714 +               return -EBUSY;
 715 +       }
 716 +       return 0;
 717 +}
 718 +
 719 +/*
 720 + * serial core request to release uart iomem
 721 + */
 722 +static void bcm_uart_release_port(struct uart_port *port)
 723 +{
 724 +       release_mem_region(port->mapbase, RSET_UART_SIZE);
 725 +       iounmap(port->membase);
 726 +}
 727 +
 728 +/*
 729 + * serial core request to do any port required autoconfiguration
 730 + */
 731 +static void bcm_uart_config_port(struct uart_port *port, int flags)
 732 +{
 733 +       if (flags & UART_CONFIG_TYPE) {
 734 +               if (bcm_uart_request_port(port))
 735 +                       return;
 736 +               port->type = PORT_BCM63XX;
 737 +       }
 738 +}
 739 +
 740 +/*
 741 + * serial core request to check that port information in serinfo are
 742 + * suitable
 743 + */
 744 +static int bcm_uart_verify_port(struct uart_port *port,
 745 +                               struct serial_struct *serinfo)
 746 +{
 747 +       if (port->type != PORT_BCM63XX)
 748 +               return -EINVAL;
 749 +       if (port->irq != serinfo->irq)
 750 +               return -EINVAL;
 751 +       if (port->iotype != serinfo->io_type)
 752 +               return -EINVAL;
 753 +       if (port->mapbase != (unsigned long)serinfo->iomem_base)
 754 +               return -EINVAL;
 755 +       return 0;
 756 +}
 757 +
 758 +/* serial core callbacks */
 759 +static struct uart_ops bcm_uart_ops = {
 760 +       .tx_empty       = bcm_uart_tx_empty,
 761 +       .get_mctrl      = bcm_uart_get_mctrl,
 762 +       .set_mctrl      = bcm_uart_set_mctrl,
 763 +       .start_tx       = bcm_uart_start_tx,
 764 +       .stop_tx        = bcm_uart_stop_tx,
 765 +       .stop_rx        = bcm_uart_stop_rx,
 766 +       .enable_ms      = bcm_uart_enable_ms,
 767 +       .break_ctl      = bcm_uart_break_ctl,
 768 +       .startup        = bcm_uart_startup,
 769 +       .shutdown       = bcm_uart_shutdown,
 770 +       .set_termios    = bcm_uart_set_termios,
 771 +       .type           = bcm_uart_type,
 772 +       .release_port   = bcm_uart_release_port,
 773 +       .request_port   = bcm_uart_request_port,
 774 +       .config_port    = bcm_uart_config_port,
 775 +       .verify_port    = bcm_uart_verify_port,
 776 +};
 777 +
 778 +
 779 +
 780 +#ifdef CONFIG_SERIAL_BCM63XX_CONSOLE
 781 +static inline void wait_for_xmitr(struct uart_port *port)
 782 +{
 783 +       unsigned int tmout;
 784 +
 785 +       /* Wait up to 10ms for the character(s) to be sent. */
 786 +       tmout = 10000;
 787 +       while (--tmout) {
 788 +               unsigned int val;
 789 +
 790 +               val = bcm_uart_readl(port, UART_IR_REG);
 791 +               if (val & UART_IR_STAT(UART_IR_TXEMPTY))
 792 +                       break;
 793 +               udelay(1);
 794 +       }
 795 +
 796 +       /* Wait up to 1s for flow control if necessary */
 797 +       if (port->flags & UPF_CONS_FLOW) {
 798 +               tmout = 1000000;
 799 +               while (--tmout) {
 800 +                       unsigned int val;
 801 +
 802 +                       val = bcm_uart_readl(port, UART_EXTINP_REG);
 803 +                       if (val & UART_EXTINP_CTS_MASK)
 804 +                               break;
 805 +                       udelay(1);
 806 +               }
 807 +       }
 808 +}
 809 +
 810 +/*
 811 + * output given char
 812 + */
 813 +static void bcm_console_putchar(struct uart_port *port, int ch)
 814 +{
 815 +       wait_for_xmitr(port);
 816 +       bcm_uart_writel(port, ch, UART_FIFO_REG);
 817 +}
 818 +
 819 +/*
 820 + * console core request to output given string
 821 + */
 822 +static void bcm_console_write(struct console *co, const char *s,
 823 +                             unsigned int count)
 824 +{
 825 +       struct uart_port *port;
 826 +       unsigned long flags;
 827 +       int locked;
 828 +
 829 +       port = &ports[co->index];
 830 +
 831 +       local_irq_save(flags);
 832 +       if (port->sysrq) {
 833 +               /* bcm_uart_interrupt() already took the lock */
 834 +               locked = 0;
 835 +       } else if (oops_in_progress) {
 836 +               locked = spin_trylock(&port->lock);
 837 +       } else {
 838 +               spin_lock(&port->lock);
 839 +               locked = 1;
 840 +       }
 841 +
 842 +       /* call helper to deal with \r\n */
 843 +       uart_console_write(port, s, count, bcm_console_putchar);
 844 +
 845 +       /* and wait for char to be transmitted */
 846 +       wait_for_xmitr(port);
 847 +
 848 +       if (locked)
 849 +               spin_unlock(&port->lock);
 850 +       local_irq_restore(flags);
 851 +}
 852 +
 853 +/*
 854 + * console core request to setup given console, find matching uart
 855 + * port and setup it.
 856 + */
 857 +static int bcm_console_setup(struct console *co, char *options)
 858 +{
 859 +       struct uart_port *port;
 860 +       int baud = 9600;
 861 +       int bits = 8;
 862 +       int parity = 'n';
 863 +       int flow = 'n';
 864 +
 865 +       if (co->index < 0 || co->index >= BCM63XX_NR_UARTS)
 866 +               return -EINVAL;
 867 +       port = &ports[co->index];
 868 +       if (!port->membase)
 869 +               return -ENODEV;
 870 +       if (options)
 871 +               uart_parse_options(options, &baud, &parity, &bits, &flow);
 872 +
 873 +       return uart_set_options(port, co, baud, parity, bits, flow);
 874 +}
 875 +
 876 +static struct uart_driver bcm_uart_driver;
 877 +
 878 +static struct console bcm63xx_console = {
 879 +       .name           = "ttyS",
 880 +       .write          = bcm_console_write,
 881 +       .device         = uart_console_device,
 882 +       .setup          = bcm_console_setup,
 883 +       .flags          = CON_PRINTBUFFER,
 884 +       .index          = -1,
 885 +       .data           = &bcm_uart_driver,
 886 +};
 887 +
 888 +static int __init bcm63xx_console_init(void)
 889 +{
 890 +       register_console(&bcm63xx_console);
 891 +       return 0;
 892 +}
 893 +
 894 +console_initcall(bcm63xx_console_init);
 895 +
 896 +#define BCM63XX_CONSOLE        &bcm63xx_console
 897 +#else
 898 +#define BCM63XX_CONSOLE        NULL
 899 +#endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */
 900 +
 901 +static struct uart_driver bcm_uart_driver = {
 902 +       .owner          = THIS_MODULE,
 903 +       .driver_name    = "bcm63xx_uart",
 904 +       .dev_name       = "ttyS",
 905 +       .major          = TTY_MAJOR,
 906 +       .minor          = 64,
 907 +       .nr             = 1,
 908 +       .cons           = BCM63XX_CONSOLE,
 909 +};
 910 +
 911 +/*
 912 + * platform driver probe/remove callback
 913 + */
 914 +static int __devinit bcm_uart_probe(struct platform_device *pdev)
 915 +{
 916 +       struct resource *res_mem, *res_irq;
 917 +       struct uart_port *port;
 918 +       struct clk *clk;
 919 +       int ret;
 920 +
 921 +       if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
 922 +               return -EINVAL;
 923 +
 924 +       if (ports[pdev->id].membase)
 925 +               return -EBUSY;
 926 +
 927 +       res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 928 +       if (!res_mem)
 929 +               return -ENODEV;
 930 +
 931 +       res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 932 +       if (!res_irq)
 933 +               return -ENODEV;
 934 +
 935 +       clk = clk_get(&pdev->dev, "periph");
 936 +       if (IS_ERR(clk))
 937 +               return -ENODEV;
 938 +
 939 +       port = &ports[pdev->id];
 940 +       memset(port, 0, sizeof(*port));
 941 +       port->iotype = UPIO_MEM;
 942 +       port->mapbase = res_mem->start;
 943 +       port->irq = res_irq->start;
 944 +       port->ops = &bcm_uart_ops;
 945 +       port->flags = UPF_BOOT_AUTOCONF;
 946 +       port->dev = &pdev->dev;
 947 +       port->fifosize = 16;
 948 +       port->uartclk = clk_get_rate(clk) / 2;
 949 +       clk_put(clk);
 950 +
 951 +       ret = uart_add_one_port(&bcm_uart_driver, port);
 952 +       if (ret) {
 953 +               kfree(port);
 954 +               return ret;
 955 +       }
 956 +       platform_set_drvdata(pdev, port);
 957 +       return 0;
 958 +}
 959 +
 960 +static int __devexit bcm_uart_remove(struct platform_device *pdev)
 961 +{
 962 +       struct uart_port *port;
 963 +
 964 +       port = platform_get_drvdata(pdev);
 965 +       uart_remove_one_port(&bcm_uart_driver, port);
 966 +       platform_set_drvdata(pdev, NULL);
 967 +       /* mark port as free */
 968 +       ports[pdev->id].membase = 0;
 969 +       return 0;
 970 +}
 971 +
 972 +/*
 973 + * platform driver stuff
 974 + */
 975 +static struct platform_driver bcm_uart_platform_driver = {
 976 +       .probe  = bcm_uart_probe,
 977 +       .remove = __devexit_p(bcm_uart_remove),
 978 +       .driver = {
 979 +               .owner = THIS_MODULE,
 980 +               .name  = "bcm63xx_uart",
 981 +       },
 982 +};
 983 +
 984 +static int __init bcm_uart_init(void)
 985 +{
 986 +       int ret;
 987 +
 988 +       ret = uart_register_driver(&bcm_uart_driver);
 989 +       if (ret)
 990 +               return ret;
 991 +
 992 +       ret = platform_driver_register(&bcm_uart_platform_driver);
 993 +       if (ret)
 994 +               uart_unregister_driver(&bcm_uart_driver);
 995 +
 996 +       return ret;
 997 +}
 998 +
 999 +static void __exit bcm_uart_exit(void)
1000 +{
1001 +       platform_driver_unregister(&bcm_uart_platform_driver);
1002 +       uart_unregister_driver(&bcm_uart_driver);
1003 +}
1004 +
1005 +module_init(bcm_uart_init);
1006 +module_exit(bcm_uart_exit);
1007 +
1008 +MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
1009 +MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver");
1010 +MODULE_LICENSE("GPL");
1011 diff --git a/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
1012 new file mode 100644
1013 index 0000000..bf348f5
1014 --- /dev/null
1015 +++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
1016 @@ -0,0 +1,6 @@
1017 +#ifndef BCM63XX_DEV_UART_H_
1018 +#define BCM63XX_DEV_UART_H_
1019 +
1020 +int bcm63xx_uart_register(void);
1021 +
1022 +#endif /* BCM63XX_DEV_UART_H_ */
1023 diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
1024 index 3b2f6c0..f49ddff 100644
1025 --- a/include/linux/serial_core.h
1026 +++ b/include/linux/serial_core.h
1027 @@ -155,6 +155,8 @@
1028
1029  #define PORT_SC26XX    82
1030
1031 +#define PORT_BCM63XX           83
1032 +
1033  #ifdef __KERNEL__
1034
1035  #include <linux/compiler.h>
1036 --
1037 1.5.4.3
1038