target/linux/brcm63xx/files/arch/mips/bcm963xx/irq.c

   1 /*
   2 <:copyright-gpl
   3  Copyright 2002 Broadcom Corp. All Rights Reserved.
   4
   5  This program is free software; you can distribute it and/or modify it
   6  under the terms of the GNU General Public License (Version 2) as
   7  published by the Free Software Foundation.
   8
   9  This program is distributed in the hope it will be useful, but WITHOUT
  10  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  for more details.
  13
  14  You should have received a copy of the GNU General Public License along
  15  with this program; if not, write to the Free Software Foundation, Inc.,
  16  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17 :>
  18 */
  19 /*
  20  * Interrupt control functions for Broadcom 963xx MIPS boards
  21  */
  22
  23 #include <asm/atomic.h>
  24
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/ioport.h>
  28 #include <linux/irq.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/kernel.h>
  31 #include <linux/slab.h>
  32 #include <linux/module.h>
  33
  34 #include <asm/irq.h>
  35 #include <asm/mipsregs.h>
  36 #include <asm/addrspace.h>
  37 #include <asm/signal.h>
  38 #include <6348_map_part.h>
  39 #include <6348_intr.h>
  40 #include <bcm_map_part.h>
  41 #include <bcm_intr.h>
  42
  43 static void irq_dispatch_int(struct pt_regs *regs)
  44 {
  45         unsigned int pendingIrqs;
  46         static unsigned int irqBit;
  47         static unsigned int isrNumber = 31;
  48
  49         pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
  50         if (!pendingIrqs) {
  51                 return;
  52         }
  53
  54         while (1) {
  55         irqBit <<= 1;
  56         isrNumber++;
  57         if (isrNumber == 32) {
  58                 isrNumber = 0;
  59                 irqBit = 0x1;
  60         }
  61         if (pendingIrqs & irqBit) {
  62                         PERF->IrqMask &= ~irqBit; // mask
  63                         do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET);
  64                 break;
  65         }
  66         }
  67 }
  68
  69 static void irq_dispatch_ext(uint32 irq)
  70 {
  71         if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
  72         printk("**** Ext IRQ mask. Should not dispatch ****\n");
  73         }
  74         /* disable and clear interrupt in the controller */
  75         PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
  76         PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
  77         do_IRQ(irq);
  78 }
  79
  80
  81 extern void brcm_timer_interrupt(struct pt_regs *regs);
  82
  83 asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
  84 {
  85         u32 cause;
  86         while((cause = (read_c0_cause()& CAUSEF_IP))) {
  87                 if (cause & CAUSEF_IP7)
  88                         brcm_timer_interrupt(regs);
  89                 else if (cause & CAUSEF_IP2)
  90                         irq_dispatch_int(regs);
  91                 else if (cause & CAUSEF_IP3)
  92                         irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0);
  93                 else if (cause & CAUSEF_IP4)
  94                         irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1);
  95                 else if (cause & CAUSEF_IP5)
  96                         irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2);
  97                 else if (cause & CAUSEF_IP6)
  98                         irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3);
  99                 local_irq_disable();
 100         }
 101 }
 102
 103
 104 void enable_brcm_irq(unsigned int irq)
 105 {
 106         unsigned long flags;
 107
 108         local_irq_save(flags);
 109         if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
 110         PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
 111         }
 112         else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
 113         /* enable and clear interrupt in the controller */
 114         PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
 115         PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
 116         }
 117         local_irq_restore(flags);
 118 }
 119
 120 void disable_brcm_irq(unsigned int irq)
 121 {
 122         unsigned long flags;
 123
 124         local_irq_save(flags);
 125         if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
 126         PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
 127         }
 128         else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
 129         /* disable interrupt in the controller */
 130         PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
 131         }
 132         local_irq_restore(flags);
 133 }
 134
 135 void ack_brcm_irq(unsigned int irq)
 136 {
 137         /* Already done in brcm_irq_dispatch */
 138 }
 139
 140 unsigned int startup_brcm_irq(unsigned int irq)
 141 {
 142         enable_brcm_irq(irq);
 143
 144         return 0; /* never anything pending */
 145 }
 146
 147 unsigned int startup_brcm_none(unsigned int irq)
 148 {
 149         return 0;
 150 }
 151
 152 void end_brcm_irq(unsigned int irq)
 153 {
 154         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 155                 enable_brcm_irq(irq);
 156 }
 157
 158 void end_brcm_none(unsigned int irq)
 159 {
 160 }
 161
 162 static struct hw_interrupt_type brcm_irq_type = {
 163         .typename       = "MIPS",
 164         .startup        = startup_brcm_irq,
 165         .shutdown       = disable_brcm_irq,
 166         .enable = enable_brcm_irq,
 167         .disable        = disable_brcm_irq,
 168         .ack    = ack_brcm_irq,
 169         .end    = end_brcm_irq,
 170         .set_affinity = NULL
 171 };
 172
 173 static struct hw_interrupt_type brcm_irq_no_end_type = {
 174         .typename       = "MIPS",
 175         .startup        = startup_brcm_none,
 176         .shutdown       = disable_brcm_irq,
 177         .enable = enable_brcm_irq,
 178         .disable        = disable_brcm_irq,
 179         .ack    = ack_brcm_irq,
 180         .end    = end_brcm_none,
 181         .set_affinity = NULL
 182 };
 183
 184 void __init arch_init_irq(void)
 185 {
 186         int i;
 187
 188         clear_c0_status(ST0_BEV);
 189         change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
 190
 191         for (i = 0; i < NR_IRQS; i++) {
 192                 irq_desc[i].status = IRQ_DISABLED;
 193                 irq_desc[i].action = 0;
 194                 irq_desc[i].depth = 1;
 195                 irq_desc[i].chip = &brcm_irq_type;
 196         }
 197 }
 198
 199 int request_external_irq(unsigned int irq,
 200         FN_HANDLER handler,
 201                 unsigned long irqflags,
 202                 const char * devname,
 203                 void *dev_id)
 204 {
 205         unsigned long flags;
 206
 207         local_irq_save(flags);
 208
 209         PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));      // Clear
 210         PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));      // Mask
 211         PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT));    // Edge insesnsitive
 212         PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT));      // Level triggered
 213         PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT));     // Low level
 214
 215         local_irq_restore(flags);
 216
 217         return( request_irq(irq, handler, irqflags, devname, dev_id) );
 218 }
 219
 220 /* VxWorks compatibility function(s). */
 221
 222 unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
 223         unsigned int interruptId)
 224 {
 225         int nRet = -1;
 226         char *devname;
 227
 228         devname = kmalloc(16, GFP_KERNEL);
 229         if (devname)
 230                 sprintf( devname, "brcm_%d", interruptId );
 231
 232         /* Set the IRQ description to not automatically enable the interrupt at
 233          * the end of an ISR.  The driver that handles the interrupt must
 234          * explicitly call BcmHalInterruptEnable or enable_brcm_irq.  This behavior
 235          * is consistent with interrupt handling on VxWorks.
 236          */
 237         irq_desc[interruptId].chip = &brcm_irq_no_end_type;
 238
 239         if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
 240         {
 241                 printk("BcmHalMapInterrupt : internal IRQ\n");
 242                 nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT, devname, (void *) param );
 243         }
 244         else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
 245         {
 246                 printk("BcmHalMapInterrupt : external IRQ\n");
 247                 nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT, devname, (void *) param );
 248         }
 249
 250         return( nRet );
 251 }
 252
 253
 254 EXPORT_SYMBOL(enable_brcm_irq);
 255 EXPORT_SYMBOL(disable_brcm_irq);
 256 EXPORT_SYMBOL(request_external_irq);
 257 EXPORT_SYMBOL(BcmHalMapInterrupt);
 258