target/linux/brcm47xx-2.6/files/drivers/ssb/scan.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Bus scanning
   4  *
   5  * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
   6  * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
   7  * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
   8  * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  * Copyright (C) 2006 Broadcom Corporation.
  11  *
  12  * Licensed under the GNU/GPL. See COPYING for details.
  13  */
  14
  15 #include <linux/ssb/ssb.h>
  16 #include <linux/ssb/ssb_regs.h>
  17 #include <linux/pci.h>
  18 #include <asm/io.h>
  19
  20 #ifdef CONFIG_SSB_PCMCIAHOST
  21 # include <pcmcia/cs_types.h>
  22 # include <pcmcia/cs.h>
  23 # include <pcmcia/cistpl.h>
  24 # include <pcmcia/ds.h>
  25 #endif
  26
  27 #include "ssb_private.h"
  28
  29
  30 const char * ssb_core_name(u16 coreid)
  31 {
  32         switch (coreid) {
  33         case SSB_DEV_CHIPCOMMON:
  34                 return "ChipCommon";
  35         case SSB_DEV_ILINE20:
  36                 return "ILine 20";
  37         case SSB_DEV_SDRAM:
  38                 return "SDRAM";
  39         case SSB_DEV_PCI:
  40                 return "PCI";
  41         case SSB_DEV_MIPS:
  42                 return "MIPS";
  43         case SSB_DEV_ETHERNET:
  44                 return "Fast Ethernet";
  45         case SSB_DEV_V90:
  46                 return "V90";
  47         case SSB_DEV_USB11_HOSTDEV:
  48                 return "USB 1.1 Hostdev";
  49         case SSB_DEV_ADSL:
  50                 return "ADSL";
  51         case SSB_DEV_ILINE100:
  52                 return "ILine 100";
  53         case SSB_DEV_IPSEC:
  54                 return "IPSEC";
  55         case SSB_DEV_PCMCIA:
  56                 return "PCMCIA";
  57         case SSB_DEV_INTERNAL_MEM:
  58                 return "Internal Memory";
  59         case SSB_DEV_MEMC_SDRAM:
  60                 return "MEMC SDRAM";
  61         case SSB_DEV_EXTIF:
  62                 return "EXTIF";
  63         case SSB_DEV_80211:
  64                 return "IEEE 802.11";
  65         case SSB_DEV_MIPS_3302:
  66                 return "MIPS 3302";
  67         case SSB_DEV_USB11_HOST:
  68                 return "USB 1.1 Host";
  69         case SSB_DEV_USB11_DEV:
  70                 return "USB 1.1 Device";
  71         case SSB_DEV_USB20_HOST:
  72                 return "USB 2.0 Host";
  73         case SSB_DEV_USB20_DEV:
  74                 return "USB 2.0 Device";
  75         case SSB_DEV_SDIO_HOST:
  76                 return "SDIO Host";
  77         case SSB_DEV_ROBOSWITCH:
  78                 return "Roboswitch";
  79         case SSB_DEV_PARA_ATA:
  80                 return "PATA";
  81         case SSB_DEV_SATA_XORDMA:
  82                 return "SATA XOR-DMA";
  83         case SSB_DEV_ETHERNET_GBIT:
  84                 return "GBit Ethernet";
  85         case SSB_DEV_PCIE:
  86                 return "PCI-E";
  87         case SSB_DEV_MIMO_PHY:
  88                 return "MIMO PHY";
  89         case SSB_DEV_SRAM_CTRLR:
  90                 return "SRAM Controller";
  91         case SSB_DEV_MINI_MACPHY:
  92                 return "Mini MACPHY";
  93         case SSB_DEV_ARM_1176:
  94                 return "ARM 1176";
  95         case SSB_DEV_ARM_7TDMI:
  96                 return "ARM 7TDMI";
  97         }
  98         return "UNKNOWN";
  99 }
 100
 101 static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
 102 {
 103         u16 chipid_fallback = 0;
 104
 105         switch (pci_dev->device) {
 106         case 0x4301:
 107                 chipid_fallback = 0x4301;
 108                 break;
 109         case 0x4305 ... 0x4307:
 110                 chipid_fallback = 0x4307;
 111                 break;
 112         case 0x4403:
 113                 chipid_fallback = 0x4402;
 114                 break;
 115         case 0x4610 ... 0x4615:
 116                 chipid_fallback = 0x4610;
 117                 break;
 118         case 0x4710 ... 0x4715:
 119                 chipid_fallback = 0x4710;
 120                 break;
 121         case 0x4320 ... 0x4325:
 122                 chipid_fallback = 0x4309;
 123                 break;
 124         case PCI_DEVICE_ID_BCM4401:
 125         case PCI_DEVICE_ID_BCM4401B0:
 126         case PCI_DEVICE_ID_BCM4401B1:
 127                 chipid_fallback = 0x4401;
 128                 break;
 129         default:
 130                 ssb_printk(KERN_ERR PFX
 131                            "PCI-ID not in fallback list\n");
 132         }
 133
 134         return chipid_fallback;
 135 }
 136
 137 static u8 chipid_to_nrcores(u16 chipid)
 138 {
 139         switch (chipid) {
 140         case 0x5365:
 141                 return 7;
 142         case 0x4306:
 143                 return 6;
 144         case 0x4310:
 145                 return 8;
 146         case 0x4307:
 147         case 0x4301:
 148                 return 5;
 149         case 0x4401:
 150         case 0x4402:
 151                 return 3;
 152         case 0x4710:
 153         case 0x4610:
 154         case 0x4704:
 155                 return 9;
 156         default:
 157                 ssb_printk(KERN_ERR PFX
 158                            "CHIPID not in nrcores fallback list\n");
 159         }
 160
 161         return 1;
 162 }
 163
 164 static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
 165                        u16 offset)
 166 {
 167         switch (bus->bustype) {
 168         case SSB_BUSTYPE_SSB:
 169                 offset += current_coreidx * SSB_CORE_SIZE;
 170                 break;
 171         case SSB_BUSTYPE_PCI:
 172                 break;
 173         case SSB_BUSTYPE_PCMCIA:
 174                 if (offset >= 0x800) {
 175                         ssb_pcmcia_switch_segment(bus, 1);
 176                         offset -= 0x800;
 177                 } else
 178                         ssb_pcmcia_switch_segment(bus, 0);
 179                 break;
 180         }
 181         return readl(bus->mmio + offset);
 182 }
 183
 184 static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
 185 {
 186         switch (bus->bustype) {
 187         case SSB_BUSTYPE_SSB:
 188                 break;
 189         case SSB_BUSTYPE_PCI:
 190                 return ssb_pci_switch_coreidx(bus, coreidx);
 191         case SSB_BUSTYPE_PCMCIA:
 192                 return ssb_pcmcia_switch_coreidx(bus, coreidx);
 193         }
 194         return 0;
 195 }
 196
 197 void ssb_iounmap(struct ssb_bus *bus)
 198 {
 199         switch (bus->bustype) {
 200         case SSB_BUSTYPE_SSB:
 201         case SSB_BUSTYPE_PCMCIA:
 202                 iounmap(bus->mmio);
 203                 break;
 204         case SSB_BUSTYPE_PCI:
 205 #ifdef CONFIG_SSB_PCIHOST
 206                 pci_iounmap(bus->host_pci, bus->mmio);
 207 #else
 208                 assert(0); /* Can't reach this code. */
 209 #endif
 210                 break;
 211         }
 212         bus->mmio = NULL;
 213         bus->mapped_device = NULL;
 214 }
 215
 216 static void __iomem * ssb_ioremap(struct ssb_bus *bus,
 217                                   unsigned long baseaddr)
 218 {
 219         void __iomem *mmio = NULL;
 220
 221         switch (bus->bustype) {
 222         case SSB_BUSTYPE_SSB:
 223                 /* Only map the first core for now. */
 224                 /* fallthrough... */
 225         case SSB_BUSTYPE_PCMCIA:
 226                 mmio = ioremap(baseaddr, SSB_CORE_SIZE);
 227                 break;
 228         case SSB_BUSTYPE_PCI:
 229 #ifdef CONFIG_SSB_PCIHOST
 230                 mmio = pci_iomap(bus->host_pci, 0, ~0UL);
 231 #else
 232                 assert(0); /* Can't reach this code. */
 233 #endif
 234                 break;
 235         }
 236
 237         return mmio;
 238 }
 239
 240 static int we_support_multiple_80211_cores(struct ssb_bus *bus)
 241 {
 242         /* More than one 802.11 core is only supported by special chips.
 243          * There are chips with two 802.11 cores, but with dangling
 244          * pins on the second core. Be careful and reject them here.
 245          */
 246
 247 #ifdef CONFIG_SSB_PCIHOST
 248         if (bus->bustype == SSB_BUSTYPE_PCI) {
 249                 if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
 250                     bus->host_pci->device == 0x4324)
 251                         return 1;
 252         }
 253 #endif /* CONFIG_SSB_PCIHOST */
 254         return 0;
 255 }
 256
 257 int ssb_bus_scan(struct ssb_bus *bus,
 258                  unsigned long baseaddr)
 259 {
 260         int err = -ENOMEM;
 261         void __iomem *mmio;
 262         u32 idhi, cc, rev, tmp;
 263         int dev_i, i;
 264         struct ssb_device *dev;
 265         int nr_80211_cores = 0;
 266
 267         mmio = ssb_ioremap(bus, baseaddr);
 268         if (!mmio)
 269                 goto out;
 270         bus->mmio = mmio;
 271
 272         err = scan_switchcore(bus, 0); /* Switch to first core */
 273         if (err)
 274                 goto err_unmap;
 275
 276         idhi = scan_read32(bus, 0, SSB_IDHIGH);
 277         cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
 278         rev = (idhi & SSB_IDHIGH_RCLO);
 279         rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
 280
 281         bus->nr_devices = 0;
 282         if (cc == SSB_DEV_CHIPCOMMON) {
 283                 tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
 284
 285                 bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
 286                 bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
 287                                 SSB_CHIPCO_REVSHIFT;
 288                 bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
 289                                     SSB_CHIPCO_PACKSHIFT;
 290                 if (rev >= 4) {
 291                         bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
 292                                           SSB_CHIPCO_NRCORESSHIFT;
 293                 }
 294                 tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
 295                 bus->chipco.capabilities = tmp;
 296         } else {
 297                 if (bus->bustype == SSB_BUSTYPE_PCI) {
 298                         bus->chip_id = pcidev_to_chipid(bus->host_pci);
 299                         pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
 300                                              &bus->chip_rev);
 301                         bus->chip_package = 0;
 302                 } else {
 303                         bus->chip_id = 0x4710;
 304                         bus->chip_rev = 0;
 305                         bus->chip_package = 0;
 306                 }
 307         }
 308         if (!bus->nr_devices)
 309                 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
 310         if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
 311                 ssb_printk(KERN_ERR PFX
 312                            "More than %d ssb cores found (%d)\n",
 313                            SSB_MAX_NR_CORES, bus->nr_devices);
 314                 goto err_unmap;
 315         }
 316         if (bus->bustype == SSB_BUSTYPE_SSB) {
 317                 /* Now that we know the number of cores,
 318                  * remap the whole IO space for all cores.
 319                  */
 320                 err = -ENOMEM;
 321                 iounmap(mmio);
 322                 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
 323                 if (!mmio)
 324                         goto out;
 325                 bus->mmio = mmio;
 326         }
 327
 328         /* Fetch basic information about each core/device */
 329         for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
 330                 err = scan_switchcore(bus, i);
 331                 if (err)
 332                         goto err_unmap;
 333                 dev = &(bus->devices[dev_i]);
 334
 335                 idhi = scan_read32(bus, i, SSB_IDHIGH);
 336                 dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
 337                 dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
 338                 dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
 339                 dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
 340                 dev->core_index = i;
 341                 dev->bus = bus;
 342                 dev->ops = bus->ops;
 343
 344                 ssb_dprintk(KERN_INFO PFX
 345                             "Core %d found: %s "
 346                             "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
 347                             i, ssb_core_name(dev->id.coreid),
 348                             dev->id.coreid, dev->id.revision, dev->id.vendor);
 349
 350                 switch (dev->id.coreid) {
 351                 case SSB_DEV_80211:
 352                         nr_80211_cores++;
 353                         if (nr_80211_cores > 1) {
 354                                 if (!we_support_multiple_80211_cores(bus)) {
 355                                         ssb_dprintk(KERN_INFO PFX "Ignoring additional "
 356                                                     "802.11 core\n");
 357                                         continue;
 358                                 }
 359                         }
 360                         break;
 361                 case SSB_DEV_EXTIF:
 362 #ifdef CONFIG_SSB_DRIVER_EXTIF
 363                         if (bus->extif.dev) {
 364                                 ssb_printk(KERN_WARNING PFX
 365                                            "WARNING: Multiple EXTIFs found\n");
 366                                 break;
 367                         }
 368                         bus->extif.dev = dev;
 369 #endif /* CONFIG_SSB_DRIVER_EXTIF */
 370                         break;
 371                 case SSB_DEV_CHIPCOMMON:
 372                         if (bus->chipco.dev) {
 373                                 ssb_printk(KERN_WARNING PFX
 374                                            "WARNING: Multiple ChipCommon found\n");
 375                                 break;
 376                         }
 377                         bus->chipco.dev = dev;
 378                         break;
 379                 case SSB_DEV_MIPS:
 380                 case SSB_DEV_MIPS_3302:
 381 #ifdef CONFIG_SSB_DRIVER_MIPS
 382                         if (bus->mipscore.dev) {
 383                                 ssb_printk(KERN_WARNING PFX
 384                                            "WARNING: Multiple MIPS cores found\n");
 385                                 break;
 386                         }
 387                         bus->mipscore.dev = dev;
 388 #endif /* CONFIG_SSB_DRIVER_MIPS */
 389                         break;
 390                 case SSB_DEV_PCI:
 391                 case SSB_DEV_PCIE:
 392 #ifdef CONFIG_SSB_DRIVER_PCICORE
 393                         if (bus->pcicore.dev) {
 394                                 ssb_printk(KERN_WARNING PFX
 395                                            "WARNING: Multiple PCI(E) cores found\n");
 396                                 break;
 397                         }
 398                         bus->pcicore.dev = dev;
 399 #endif /* CONFIG_SSB_DRIVER_PCICORE */
 400                         break;
 401                 default:
 402                         break;
 403                 }
 404
 405                 dev_i++;
 406         }
 407         bus->nr_devices = dev_i;
 408
 409         err = 0;
 410 out:
 411         return err;
 412 err_unmap:
 413         ssb_iounmap(bus);
 414         goto out;
 415 }