target/linux/brcm47xx-2.6/files/drivers/ssb/main.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Subsystem core
   4  *
   5  * Copyright 2005, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include "ssb_private.h"
  12
  13 #include <linux/delay.h>
  14 #include <linux/ssb/ssb.h>
  15 #include <linux/ssb/ssb_regs.h>
  16
  17 #ifdef CONFIG_SSB_PCIHOST
  18 # include <linux/pci.h>
  19 #endif
  20
  21 #ifdef CONFIG_SSB_PCMCIAHOST
  22 # include <pcmcia/cs_types.h>
  23 # include <pcmcia/cs.h>
  24 # include <pcmcia/cistpl.h>
  25 # include <pcmcia/ds.h>
  26 #endif
  27
  28
  29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
  30 MODULE_LICENSE("GPL");
  31
  32
  33 static LIST_HEAD(attach_queue);
  34 static LIST_HEAD(buses);
  35 static unsigned int next_busnumber;
  36 static DEFINE_MUTEX(buses_mutex);
  37
  38 static void ssb_buses_lock(void);
  39 static void ssb_buses_unlock(void);
  40
  41
  42 #ifdef CONFIG_SSB_PCIHOST
  43 struct ssb_bus * ssb_pci_dev_to_bus(struct pci_dev *pdev)
  44 {
  45         struct ssb_bus *bus;
  46
  47         ssb_buses_lock();
  48         list_for_each_entry(bus, &buses, list) {
  49                 if (bus->bustype == SSB_BUSTYPE_PCI &&
  50                     bus->host_pci == pdev)
  51                         goto found;
  52         }
  53         bus = NULL;
  54 found:
  55         ssb_buses_unlock();
  56
  57         return bus;
  58 }
  59 #endif /* CONFIG_SSB_PCIHOST */
  60
  61 static struct ssb_device * ssb_device_get(struct ssb_device *dev)
  62 {
  63         if (dev)
  64                 get_device(dev->dev);
  65         return dev;
  66 }
  67
  68 static void ssb_device_put(struct ssb_device *dev)
  69 {
  70         if (dev)
  71                 put_device(dev->dev);
  72 }
  73
  74 static int ssb_bus_resume(struct ssb_bus *bus)
  75 {
  76         int err;
  77
  78         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
  79         err = ssb_pcmcia_init(bus);
  80         if (err) {
  81                 /* No need to disable XTAL, as we don't have one on PCMCIA. */
  82                 return err;
  83         }
  84         ssb_chipco_resume(&bus->chipco);
  85
  86         return 0;
  87 }
  88
  89 static int ssb_device_resume(struct device *dev)
  90 {
  91         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
  92         struct ssb_driver *ssb_drv;
  93         struct ssb_bus *bus;
  94         int err = 0;
  95
  96         bus = ssb_dev->bus;
  97         if (bus->suspend_cnt == bus->nr_devices) {
  98                 err = ssb_bus_resume(bus);
  99                 if (err)
 100                         return err;
 101         }
 102         bus->suspend_cnt--;
 103         if (dev->driver) {
 104                 ssb_drv = drv_to_ssb_drv(dev->driver);
 105                 if (ssb_drv && ssb_drv->resume)
 106                         err = ssb_drv->resume(ssb_dev);
 107                 if (err)
 108                         goto out;
 109         }
 110 out:
 111         return err;
 112 }
 113
 114 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
 115 {
 116         ssb_chipco_suspend(&bus->chipco, state);
 117         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 118
 119         /* Reset HW state information in memory, so that HW is
 120          * completely reinitialized on resume. */
 121         bus->mapped_device = NULL;
 122 #ifdef CONFIG_SSB_DRIVER_PCICORE
 123         bus->pcicore.setup_done = 0;
 124 #endif
 125 }
 126
 127 static int ssb_device_suspend(struct device *dev, pm_message_t state)
 128 {
 129         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 130         struct ssb_driver *ssb_drv;
 131         struct ssb_bus *bus;
 132         int err = 0;
 133
 134         if (dev->driver) {
 135                 ssb_drv = drv_to_ssb_drv(dev->driver);
 136                 if (ssb_drv && ssb_drv->suspend)
 137                         err = ssb_drv->suspend(ssb_dev, state);
 138                 if (err)
 139                         goto out;
 140         }
 141
 142         bus = ssb_dev->bus;
 143         bus->suspend_cnt++;
 144         if (bus->suspend_cnt == bus->nr_devices) {
 145                 /* All devices suspended. Shutdown the bus. */
 146                 ssb_bus_suspend(bus, state);
 147         }
 148
 149 out:
 150         return err;
 151 }
 152
 153 #ifdef CONFIG_SSB_PCIHOST
 154 int ssb_devices_freeze(struct ssb_bus *bus)
 155 {
 156         struct ssb_device *dev;
 157         struct ssb_driver *drv;
 158         int err = 0;
 159         int i;
 160         pm_message_t state = PMSG_FREEZE;
 161
 162         for (i = 0; i < bus->nr_devices; i++) {
 163                 dev = &(bus->devices[i]);
 164                 if (!dev->dev->driver)
 165                         continue;
 166                 if (!device_is_registered(dev->dev))
 167                         continue;
 168                 drv = drv_to_ssb_drv(dev->dev->driver);
 169                 if (drv && drv->suspend) {
 170                         err = drv->suspend(dev, state);
 171                         if (err)
 172                                 goto out;
 173                 }
 174         }
 175 out:
 176         return err;
 177 }
 178
 179 int ssb_devices_thaw(struct ssb_bus *bus)
 180 {
 181         struct ssb_device *dev;
 182         struct ssb_driver *drv;
 183         int err = 0;
 184         int i;
 185
 186         for (i = 0; i < bus->nr_devices; i++) {
 187                 dev = &(bus->devices[i]);
 188                 if (!dev->dev->driver)
 189                         continue;
 190                 if (!device_is_registered(dev->dev))
 191                         continue;
 192                 drv = drv_to_ssb_drv(dev->dev->driver);
 193                 if (drv && drv->resume) {
 194                         err = drv->resume(dev);
 195                         if (err)
 196                                 goto out;
 197                 }
 198         }
 199 out:
 200         return err;
 201 }
 202 #endif /* CONFIG_SSB_PCIHOST */
 203
 204 static void ssb_device_shutdown(struct device *dev)
 205 {
 206         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 207         struct ssb_driver *ssb_drv;
 208
 209         if (!dev->driver)
 210                 return;
 211         ssb_drv = drv_to_ssb_drv(dev->driver);
 212         if (ssb_drv && ssb_drv->shutdown)
 213                 ssb_drv->shutdown(ssb_dev);
 214 }
 215
 216 static int ssb_device_remove(struct device *dev)
 217 {
 218         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 219         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 220
 221         if (ssb_drv && ssb_drv->remove)
 222                 ssb_drv->remove(ssb_dev);
 223         ssb_device_put(ssb_dev);
 224
 225         return 0;
 226 }
 227
 228 static int ssb_device_probe(struct device *dev)
 229 {
 230         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 231         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 232         int err = 0;
 233
 234         ssb_device_get(ssb_dev);
 235         if (ssb_drv && ssb_drv->probe)
 236                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
 237         if (err)
 238                 ssb_device_put(ssb_dev);
 239
 240         return err;
 241 }
 242
 243 static int ssb_match_devid(const struct ssb_device_id *tabid,
 244                            const struct ssb_device_id *devid)
 245 {
 246         if ((tabid->vendor != devid->vendor) &&
 247             tabid->vendor != SSB_ANY_VENDOR)
 248                 return 0;
 249         if ((tabid->coreid != devid->coreid) &&
 250             tabid->coreid != SSB_ANY_ID)
 251                 return 0;
 252         if ((tabid->revision != devid->revision) &&
 253             tabid->revision != SSB_ANY_REV)
 254                 return 0;
 255         return 1;
 256 }
 257
 258 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
 259 {
 260         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 261         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
 262         const struct ssb_device_id *id;
 263
 264         for (id = ssb_drv->id_table;
 265              id->vendor || id->coreid || id->revision;
 266              id++) {
 267                 if (ssb_match_devid(id, &ssb_dev->id))
 268                         return 1; /* found */
 269         }
 270
 271         return 0;
 272 }
 273
 274 static struct bus_type ssb_bustype = {
 275         .name           = NULL, /* Intentionally NULL to indicate early boot */
 276         .match          = ssb_bus_match,
 277         .probe          = ssb_device_probe,
 278         .remove         = ssb_device_remove,
 279         .shutdown       = ssb_device_shutdown,
 280         .suspend        = ssb_device_suspend,
 281         .resume         = ssb_device_resume,
 282 };
 283
 284 #define is_early_boot()         (ssb_bustype.name == NULL)
 285
 286 static void ssb_buses_lock(void)
 287 {
 288         if (!is_early_boot())
 289                 mutex_lock(&buses_mutex);
 290 }
 291
 292 static void ssb_buses_unlock(void)
 293 {
 294         if (!is_early_boot())
 295                 mutex_unlock(&buses_mutex);
 296 }
 297
 298 static void ssb_devices_unregister(struct ssb_bus *bus)
 299 {
 300         struct ssb_device *sdev;
 301         int i;
 302
 303         for (i = bus->nr_devices - 1; i >= 0; i--) {
 304                 sdev = &(bus->devices[i]);
 305                 if (sdev->dev)
 306                         device_unregister(sdev->dev);
 307         }
 308 }
 309
 310 void ssb_bus_unregister(struct ssb_bus *bus)
 311 {
 312         ssb_buses_lock();
 313         ssb_devices_unregister(bus);
 314         list_del(&bus->list);
 315         ssb_buses_unlock();
 316
 317         /* ssb_pcmcia_exit(bus); */
 318         ssb_pci_exit(bus);
 319         ssb_iounmap(bus);
 320 }
 321 EXPORT_SYMBOL(ssb_bus_unregister);
 322
 323 static void ssb_release_dev(struct device *dev)
 324 {
 325         struct __ssb_dev_wrapper *devwrap;
 326
 327         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 328         kfree(devwrap);
 329 }
 330
 331 static int ssb_devices_register(struct ssb_bus *bus)
 332 {
 333         struct ssb_device *sdev;
 334         struct device *dev;
 335         struct __ssb_dev_wrapper *devwrap;
 336         int i, err = 0;
 337         int dev_idx = 0;
 338
 339         for (i = 0; i < bus->nr_devices; i++) {
 340                 sdev = &(bus->devices[i]);
 341
 342                 /* We don't register SSB-system devices to the kernel,
 343                  * as the drivers for them are built into SSB. */
 344                 switch (sdev->id.coreid) {
 345                 case SSB_DEV_CHIPCOMMON:
 346                 case SSB_DEV_PCI:
 347                 case SSB_DEV_PCIE:
 348                 case SSB_DEV_PCMCIA:
 349                 case SSB_DEV_MIPS:
 350                 case SSB_DEV_MIPS_3302:
 351                 case SSB_DEV_EXTIF:
 352                         continue;
 353                 }
 354
 355                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 356                 if (!devwrap) {
 357                         ssb_printk(KERN_ERR PFX
 358                                    "Could not allocate device\n");
 359                         err = -ENOMEM;
 360                         goto error;
 361                 }
 362                 dev = &devwrap->dev;
 363                 devwrap->sdev = sdev;
 364
 365                 dev->release = ssb_release_dev;
 366                 dev->bus = &ssb_bustype;
 367                 snprintf(dev->bus_id, sizeof(dev->bus_id),
 368                          "ssb%u:%d", bus->busnumber, dev_idx);
 369
 370                 switch (bus->bustype) {
 371                 case SSB_BUSTYPE_PCI:
 372 #ifdef CONFIG_SSB_PCIHOST
 373                         sdev->irq = bus->host_pci->irq;
 374                         dev->parent = &bus->host_pci->dev;
 375 #endif
 376                         break;
 377                 case SSB_BUSTYPE_PCMCIA:
 378 #ifdef CONFIG_SSB_PCMCIAHOST
 379                         dev->parent = &bus->host_pcmcia->dev;
 380 #endif
 381                         break;
 382                 case SSB_BUSTYPE_SSB:
 383                         break;
 384                 }
 385
 386                 sdev->dev = dev;
 387                 err = device_register(dev);
 388                 if (err) {
 389                         ssb_printk(KERN_ERR PFX
 390                                    "Could not register %s\n",
 391                                    dev->bus_id);
 392                         /* Set dev to NULL to not unregister
 393                          * dev on error unwinding. */
 394                         sdev->dev = NULL;
 395                         kfree(devwrap);
 396                         goto error;
 397                 }
 398                 dev_idx++;
 399         }
 400
 401         return 0;
 402 error:
 403         /* Unwind the already registered devices. */
 404         ssb_devices_unregister(bus);
 405         return err;
 406 }
 407
 408 /* Needs ssb_buses_lock() */
 409 static int ssb_attach_queued_buses(void)
 410 {
 411         struct ssb_bus *bus, *n;
 412         int err = 0;
 413         int drop_them_all = 0;
 414
 415         list_for_each_entry_safe(bus, n, &attach_queue, list) {
 416                 if (drop_them_all) {
 417                         list_del(&bus->list);
 418                         continue;
 419                 }
 420                 /* Can't init the PCIcore in ssb_bus_register(), as that
 421                  * is too early in boot for embedded systems
 422                  * (no udelay() available). So do it here in attach stage.
 423                  */
 424                 ssb_pcicore_init(&bus->pcicore);
 425
 426                 err = ssb_devices_register(bus);
 427                 if (err) {
 428                         drop_them_all = 1;
 429                         list_del(&bus->list);
 430                         continue;
 431                 }
 432                 list_move_tail(&bus->list, &buses);
 433         }
 434
 435         return err;
 436 }
 437
 438 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
 439 {
 440         struct ssb_bus *bus = dev->bus;
 441
 442         offset += dev->core_index * SSB_CORE_SIZE;
 443         return readw(bus->mmio + offset);
 444 }
 445
 446 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
 447 {
 448         struct ssb_bus *bus = dev->bus;
 449
 450         offset += dev->core_index * SSB_CORE_SIZE;
 451         return readl(bus->mmio + offset);
 452 }
 453
 454 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 455 {
 456         struct ssb_bus *bus = dev->bus;
 457
 458         offset += dev->core_index * SSB_CORE_SIZE;
 459         writew(value, bus->mmio + offset);
 460 }
 461
 462 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 463 {
 464         struct ssb_bus *bus = dev->bus;
 465
 466         offset += dev->core_index * SSB_CORE_SIZE;
 467         writel(value, bus->mmio + offset);
 468 }
 469
 470 static const struct ssb_bus_ops ssb_ssb_ops = {
 471         .read16         = ssb_ssb_read16,
 472         .read32         = ssb_ssb_read32,
 473         .write16        = ssb_ssb_write16,
 474         .write32        = ssb_ssb_write32,
 475 };
 476
 477 static int ssb_fetch_invariants(struct ssb_bus *bus,
 478                                 int (*get_invariants)(struct ssb_bus *bus,
 479                                                       struct ssb_init_invariants *iv))
 480 {
 481         struct ssb_init_invariants iv;
 482         int err;
 483
 484         memset(&iv, 0, sizeof(iv));
 485         err = get_invariants(bus, &iv);
 486         if (err)
 487                 goto out;
 488         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
 489         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
 490 out:
 491         return err;
 492 }
 493
 494 static int ssb_bus_register(struct ssb_bus *bus,
 495                             int (*get_invariants)(struct ssb_bus *bus,
 496                                                   struct ssb_init_invariants *iv),
 497                             unsigned long baseaddr)
 498 {
 499         int err;
 500
 501         spin_lock_init(&bus->bar_lock);
 502         INIT_LIST_HEAD(&bus->list);
 503
 504         /* Powerup the bus */
 505         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 506         if (err)
 507                 goto out;
 508         ssb_buses_lock();
 509         bus->busnumber = next_busnumber;
 510         /* Scan for devices (cores) */
 511         err = ssb_bus_scan(bus, baseaddr);
 512         if (err)
 513                 goto err_disable_xtal;
 514
 515         /* Init PCI-host device (if any) */
 516         err = ssb_pci_init(bus);
 517         if (err)
 518                 goto err_unmap;
 519         /* Init PCMCIA-host device (if any) */
 520         err = ssb_pcmcia_init(bus);
 521         if (err)
 522                 goto err_pci_exit;
 523
 524         /* Initialize basic system devices (if available) */
 525         ssb_chipcommon_init(&bus->chipco);
 526         ssb_mipscore_init(&bus->mipscore);
 527         err = ssb_fetch_invariants(bus, get_invariants);
 528         if (err)
 529                 goto err_pcmcia_exit;
 530
 531         /* Queue it for attach */
 532         list_add_tail(&bus->list, &attach_queue);
 533         if (!is_early_boot()) {
 534                 /* This is not early boot, so we must attach the bus now */
 535                 err = ssb_attach_queued_buses();
 536                 if (err)
 537                         goto err_dequeue;
 538         }
 539         next_busnumber++;
 540         ssb_buses_unlock();
 541
 542 out:
 543         return err;
 544
 545 err_dequeue:
 546         list_del(&bus->list);
 547 err_pcmcia_exit:
 548 /*      ssb_pcmcia_exit(bus); */
 549 err_pci_exit:
 550         ssb_pci_exit(bus);
 551 err_unmap:
 552         ssb_iounmap(bus);
 553 err_disable_xtal:
 554         ssb_buses_unlock();
 555         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 556         return err;
 557 }
 558
 559 #ifdef CONFIG_SSB_PCIHOST
 560 int ssb_bus_pcibus_register(struct ssb_bus *bus,
 561                             struct pci_dev *host_pci)
 562 {
 563         int err;
 564
 565         bus->bustype = SSB_BUSTYPE_PCI;
 566         bus->host_pci = host_pci;
 567         bus->ops = &ssb_pci_ops;
 568
 569         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 570         if (!err) {
 571                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 572                            "PCI device %s\n", host_pci->dev.bus_id);
 573         }
 574
 575         return err;
 576 }
 577 EXPORT_SYMBOL(ssb_bus_pcibus_register);
 578 #endif /* CONFIG_SSB_PCIHOST */
 579
 580 #ifdef CONFIG_SSB_PCMCIAHOST
 581 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 582                                struct pcmcia_device *pcmcia_dev,
 583                                unsigned long baseaddr)
 584 {
 585         int err;
 586
 587         bus->bustype = SSB_BUSTYPE_PCMCIA;
 588         bus->host_pcmcia = pcmcia_dev;
 589         bus->ops = &ssb_pcmcia_ops;
 590
 591         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 592         if (!err) {
 593                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 594                            "PCMCIA device %s\n", pcmcia_dev->devname);
 595         }
 596
 597         return err;
 598 }
 599 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
 600 #endif /* CONFIG_SSB_PCMCIAHOST */
 601
 602 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 603                             unsigned long baseaddr,
 604                             int (*get_invariants)(struct ssb_bus *bus,
 605                                                   struct ssb_init_invariants *iv))
 606 {
 607         int err;
 608
 609         bus->bustype = SSB_BUSTYPE_SSB;
 610         bus->ops = &ssb_ssb_ops;
 611
 612         err = ssb_bus_register(bus, get_invariants, baseaddr);
 613         if (!err) {
 614                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 615                            "address 0x%08lX\n", baseaddr);
 616         }
 617
 618         return err;
 619 }
 620
 621 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
 622 {
 623         drv->drv.name = drv->name;
 624         drv->drv.bus = &ssb_bustype;
 625         drv->drv.owner = owner;
 626
 627         return driver_register(&drv->drv);
 628 }
 629 EXPORT_SYMBOL(__ssb_driver_register);
 630
 631 void ssb_driver_unregister(struct ssb_driver *drv)
 632 {
 633         driver_unregister(&drv->drv);
 634 }
 635 EXPORT_SYMBOL(ssb_driver_unregister);
 636
 637 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
 638 {
 639         struct ssb_bus *bus = dev->bus;
 640         struct ssb_device *ent;
 641         int i;
 642
 643         for (i = 0; i < bus->nr_devices; i++) {
 644                 ent = &(bus->devices[i]);
 645                 if (ent->id.vendor != dev->id.vendor)
 646                         continue;
 647                 if (ent->id.coreid != dev->id.coreid)
 648                         continue;
 649
 650                 ent->devtypedata = data;
 651         }
 652 }
 653 EXPORT_SYMBOL(ssb_set_devtypedata);
 654
 655 static u32 clkfactor_f6_resolve(u32 v)
 656 {
 657         /* map the magic values */
 658         switch (v) {
 659         case SSB_CHIPCO_CLK_F6_2:
 660                 return 2;
 661         case SSB_CHIPCO_CLK_F6_3:
 662                 return 3;
 663         case SSB_CHIPCO_CLK_F6_4:
 664                 return 4;
 665         case SSB_CHIPCO_CLK_F6_5:
 666                 return 5;
 667         case SSB_CHIPCO_CLK_F6_6:
 668                 return 6;
 669         case SSB_CHIPCO_CLK_F6_7:
 670                 return 7;
 671         }
 672         return 0;
 673 }
 674
 675 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
 676 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
 677 {
 678         u32 n1, n2, clock, m1, m2, m3, mc;
 679
 680         n1 = (n & SSB_CHIPCO_CLK_N1);
 681         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
 682
 683         switch (plltype) {
 684         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
 685                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
 686                         return SSB_CHIPCO_CLK_T6_M0;
 687                 return SSB_CHIPCO_CLK_T6_M1;
 688         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
 689         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 690         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
 691         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 692                 n1 = clkfactor_f6_resolve(n1);
 693                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
 694                 break;
 695         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
 696                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
 697                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
 698                 assert((n1 >= 2) && (n1 <= 7));
 699                 assert((n2 >= 5) && (n2 <= 23));
 700                 break;
 701         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
 702                 return 100000000;
 703         default:
 704                 assert(0);
 705         }
 706
 707         switch (plltype) {
 708         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 709         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 710                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
 711                 break;
 712         default:
 713                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
 714         }
 715         if (!clock)
 716                 return 0;
 717
 718         m1 = (m & SSB_CHIPCO_CLK_M1);
 719         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
 720         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
 721         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
 722
 723         switch (plltype) {
 724         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
 725         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
 726         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
 727         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
 728                 m1 = clkfactor_f6_resolve(m1);
 729                 if ((plltype == SSB_PLLTYPE_1) ||
 730                     (plltype == SSB_PLLTYPE_3))
 731                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
 732                 else
 733                         m2 = clkfactor_f6_resolve(m2);
 734                 m3 = clkfactor_f6_resolve(m3);
 735
 736                 switch (mc) {
 737                 case SSB_CHIPCO_CLK_MC_BYPASS:
 738                         return clock;
 739                 case SSB_CHIPCO_CLK_MC_M1:
 740                         return (clock / m1);
 741                 case SSB_CHIPCO_CLK_MC_M1M2:
 742                         return (clock / (m1 * m2));
 743                 case SSB_CHIPCO_CLK_MC_M1M2M3:
 744                         return (clock / (m1 * m2 * m3));
 745                 case SSB_CHIPCO_CLK_MC_M1M3:
 746                         return (clock / (m1 * m3));
 747                 }
 748                 return 0;
 749         case SSB_PLLTYPE_2:
 750                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
 751                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
 752                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
 753                 assert((m1 >= 2) && (m1 <= 7));
 754                 assert((m2 >= 3) && (m2 <= 10));
 755                 assert((m3 >= 2) && (m3 <= 7));
 756
 757                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
 758                         clock /= m1;
 759                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
 760                         clock /= m2;
 761                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
 762                         clock /= m3;
 763                 return clock;
 764         default:
 765                 assert(0);
 766         }
 767         return 0;
 768 }
 769
 770 /* Get the current speed the backplane is running at */
 771 u32 ssb_clockspeed(struct ssb_bus *bus)
 772 {
 773         u32 rate;
 774         u32 plltype;
 775         u32 clkctl_n, clkctl_m;
 776
 777         //TODO if EXTIF: PLLTYPE == 1, read n from clockcontrol_n, m from clockcontrol_sb
 778
 779         if (bus->chipco.dev) {
 780                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
 781                                             &clkctl_n, &clkctl_m);
 782         } else
 783                 return 0;
 784
 785         if (bus->chip_id == 0x5365) {
 786                 rate = 100000000;
 787         } else {
 788                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
 789                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
 790                         rate /= 2;
 791         }
 792
 793         return rate;
 794 }
 795 EXPORT_SYMBOL(ssb_clockspeed);
 796
 797 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
 798 {
 799         /* The REJECT bit changed position in TMSLOW between
 800          * Backplane revisions. */
 801         switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) {
 802         case SSB_IDLOW_SSBREV_22:
 803                 return SSB_TMSLOW_REJECT_22;
 804         case SSB_IDLOW_SSBREV_23:
 805                 return SSB_TMSLOW_REJECT_23;
 806         default:
 807                 assert(0);
 808         }
 809         return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
 810 }
 811
 812 int ssb_device_is_enabled(struct ssb_device *dev)
 813 {
 814         u32 val;
 815         u32 reject;
 816
 817         reject = ssb_tmslow_reject_bitmask(dev);
 818         val = ssb_read32(dev, SSB_TMSLOW);
 819         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
 820
 821         return (val == SSB_TMSLOW_CLOCK);
 822 }
 823 EXPORT_SYMBOL(ssb_device_is_enabled);
 824
 825 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
 826 {
 827         u32 val;
 828
 829         ssb_device_disable(dev, core_specific_flags);
 830         ssb_write32(dev, SSB_TMSLOW,
 831                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
 832                     SSB_TMSLOW_FGC | core_specific_flags);
 833         /* flush */
 834         ssb_read32(dev, SSB_TMSLOW);
 835         udelay(1);
 836
 837         /* Clear SERR if set. This is a hw bug workaround. */
 838         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
 839                 ssb_write32(dev, SSB_TMSHIGH, 0);
 840
 841         val = ssb_read32(dev, SSB_IMSTATE);
 842         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
 843                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
 844                 ssb_write32(dev, SSB_IMSTATE, val);
 845         }
 846
 847         ssb_write32(dev, SSB_TMSLOW,
 848                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
 849                     core_specific_flags);
 850         /* flush */
 851         ssb_read32(dev, SSB_TMSLOW);
 852         udelay(1);
 853
 854         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
 855                     core_specific_flags);
 856         /* flush */
 857         ssb_read32(dev, SSB_TMSLOW);
 858         udelay(1);
 859 }
 860 EXPORT_SYMBOL(ssb_device_enable);
 861
 862 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
 863                         int timeout, int set)
 864 {
 865         int i;
 866         u32 val;
 867
 868         for (i = 0; i < timeout; i++) {
 869                 val = ssb_read32(dev, reg);
 870                 if (set) {
 871                         if (val & bitmask)
 872                                 return 0;
 873                 } else {
 874                         if (!(val & bitmask))
 875                                 return 0;
 876                 }
 877                 udelay(10);
 878         }
 879         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
 880                             "register %04X to %s.\n",
 881                bitmask, reg, (set ? "set" : "clear"));
 882
 883         return -ETIMEDOUT;
 884 }
 885
 886 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
 887 {
 888         u32 reject;
 889
 890         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
 891                 return;
 892
 893         reject = ssb_tmslow_reject_bitmask(dev);
 894         ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
 895         ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
 896         ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
 897         ssb_write32(dev, SSB_TMSLOW,
 898                     SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
 899                     reject | SSB_TMSLOW_RESET |
 900                     core_specific_flags);
 901         /* flush */
 902         ssb_read32(dev, SSB_TMSLOW);
 903         udelay(1);
 904
 905         ssb_write32(dev, SSB_TMSLOW,
 906                     reject | SSB_TMSLOW_RESET |
 907                     core_specific_flags);
 908         /* flush */
 909         ssb_read32(dev, SSB_TMSLOW);
 910         udelay(1);
 911 }
 912 EXPORT_SYMBOL(ssb_device_disable);
 913
 914 u32 ssb_dma_translation(struct ssb_device *dev)
 915 {
 916         switch(dev->bus->bustype) {
 917         case SSB_BUSTYPE_SSB:
 918                 return 0;
 919         case SSB_BUSTYPE_PCI:
 920         case SSB_BUSTYPE_PCMCIA:
 921                 return SSB_PCI_DMA;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL(ssb_dma_translation);
 926
 927 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
 928 {
 929         struct device *dev = ssb_dev->dev;
 930
 931 #ifdef CONFIG_SSB_PCIHOST
 932         if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
 933             !dma_supported(dev, mask))
 934                 return -EIO;
 935 #endif
 936         dev->coherent_dma_mask = mask;
 937         dev->dma_mask = &dev->coherent_dma_mask;
 938
 939         return 0;
 940 }
 941 EXPORT_SYMBOL(ssb_dma_set_mask);
 942
 943 int ssb_bus_may_powerdown(struct ssb_bus *bus)
 944 {
 945         struct ssb_chipcommon *cc;
 946         int err;
 947
 948         /* On buses where more than one core may be working
 949          * at a time, we must not powerdown stuff if there are
 950          * still cores that may want to run. */
 951         if (bus->bustype == SSB_BUSTYPE_SSB)
 952                 return 0;
 953
 954         cc = &bus->chipco;
 955         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
 956         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 957         if (err)
 958                 goto error;
 959
 960         return 0;
 961 error:
 962         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
 963         return err;
 964 }
 965 EXPORT_SYMBOL(ssb_bus_may_powerdown);
 966
 967 int ssb_bus_powerup(struct ssb_bus *bus, int dynamic_pctl)
 968 {
 969         struct ssb_chipcommon *cc;
 970         int err;
 971         enum ssb_clkmode mode;
 972
 973         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 974         if (err)
 975                 goto error;
 976         cc = &bus->chipco;
 977         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
 978         ssb_chipco_set_clockmode(cc, mode);
 979
 980         return 0;
 981 error:
 982         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
 983         return err;
 984 }
 985 EXPORT_SYMBOL(ssb_bus_powerup);
 986
 987 u32 ssb_admatch_base(u32 adm)
 988 {
 989         u32 base = 0;
 990
 991         switch (adm & SSB_ADM_TYPE) {
 992         case SSB_ADM_TYPE0:
 993                 base = (adm & SSB_ADM_BASE0);
 994                 break;
 995         case SSB_ADM_TYPE1:
 996                 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
 997                 base = (adm & SSB_ADM_BASE1);
 998                 break;
 999         case SSB_ADM_TYPE2:
1000                 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
1001                 base = (adm & SSB_ADM_BASE2);
1002                 break;
1003         default:
1004                 assert(0);
1005         }
1006
1007         return base;
1008 }
1009 EXPORT_SYMBOL(ssb_admatch_base);
1010
1011 u32 ssb_admatch_size(u32 adm)
1012 {
1013         u32 size = 0;
1014
1015         switch (adm & SSB_ADM_TYPE) {
1016         case SSB_ADM_TYPE0:
1017                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1018                 break;
1019         case SSB_ADM_TYPE1:
1020                 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
1021                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1022                 break;
1023         case SSB_ADM_TYPE2:
1024                 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
1025                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1026                 break;
1027         default:
1028                 assert(0);
1029         }
1030         size = (1 << (size + 1));
1031
1032         return size;
1033 }
1034 EXPORT_SYMBOL(ssb_admatch_size);
1035
1036 static int __init ssb_modinit(void)
1037 {
1038         int err;
1039
1040         ssb_bustype.name = "ssb";
1041         err = bus_register(&ssb_bustype);
1042         if (err)
1043                 return err;
1044
1045         /* Maybe we already registered some buses at early boot.
1046          * Check for this and attach them
1047          */
1048         ssb_buses_lock();
1049         err = ssb_attach_queued_buses();
1050         ssb_buses_unlock();
1051         if (err)
1052                 bus_unregister(&ssb_bustype);
1053
1054         return err;
1055 }
1056 subsys_initcall(ssb_modinit);
1057
1058 static void __exit ssb_modexit(void)
1059 {
1060         bus_unregister(&ssb_bustype);
1061 }
1062 module_exit(ssb_modexit)