brcm47xx: deactivate wndr3400 for now as this device will not boot
[openwrt.git] / target / linux / brcm47xx / patches-3.0 / 0006-bcma-add-serial-console-support.patch
1 From b7c100827012ba588089807475affe0c69a3f817 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Mon, 6 Jun 2011 00:07:33 +0200
4 Subject: [PATCH 06/14] bcma: add serial console support
5
6 This adds support for serial console to bcma, when operating on an
7 embedded device.
8
9 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
10 ---
11  drivers/bcma/bcma_private.h           |    6 +++
12  drivers/bcma/driver_chipcommon.c      |   64 +++++++++++++++++++++++++++++++++
13  drivers/bcma/driver_mips.c            |    9 +++++
14  include/linux/bcma/bcma_driver_mips.h |   11 ++++++
15  4 files changed, 90 insertions(+), 0 deletions(-)
16
17 --- a/drivers/bcma/bcma_private.h
18 +++ b/drivers/bcma/bcma_private.h
19 @@ -29,6 +29,12 @@ void bcma_init_bus(struct bcma_bus *bus)
20  /* sprom.c */
21  int bcma_sprom_get(struct bcma_bus *bus);
22  
23 +/* driver_chipcommon.c */
24 +#ifdef CONFIG_BCMA_DRIVER_MIPS
25 +extern int bcma_chipco_serial_init(struct bcma_drv_cc *cc,
26 +                                  struct bcma_drv_mips_serial_port *ports);
27 +#endif /* CONFIG_BCMA_DRIVER_MIPS */
28 +
29  #ifdef CONFIG_BCMA_HOST_PCI
30  /* host_pci.c */
31  extern int __init bcma_host_pci_init(void);
32 --- a/drivers/bcma/driver_chipcommon.c
33 +++ b/drivers/bcma/driver_chipcommon.c
34 @@ -92,3 +92,67 @@ u32 bcma_chipco_gpio_polarity(struct bcm
35  {
36         return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
37  }
38 +
39 +#ifdef CONFIG_BCMA_DRIVER_MIPS
40 +int bcma_chipco_serial_init(struct bcma_drv_cc *cc,
41 +                           struct bcma_drv_mips_serial_port *ports)
42 +{
43 +       int nr_ports = 0;
44 +       u32 plltype;
45 +       unsigned int irq;
46 +       u32 baud_base, div;
47 +       u32 i, n;
48 +       unsigned int ccrev = cc->core->id.rev;
49 +
50 +       plltype = (cc->capabilities & BCMA_CC_CAP_PLLT);
51 +       irq = bcma_core_mips_irq(cc->core);
52 +
53 +       if ((ccrev >= 11) && (ccrev != 15) && (ccrev != 20)) {
54 +               /* Fixed ALP clock */
55 +               baud_base = 20000000;
56 +               if (cc->capabilities & BCMA_CC_CAP_PMU) {
57 +                       /* FIXME: baud_base is different for devices with a PMU */
58 +                       WARN_ON(1);
59 +               }
60 +               div = 1;
61 +               if (ccrev >= 21) {
62 +                       /* Turn off UART clock before switching clocksource. */
63 +                       bcma_cc_write32(cc, BCMA_CC_CORECTL,
64 +                                      bcma_cc_read32(cc, BCMA_CC_CORECTL)
65 +                                      & ~BCMA_CC_CORECTL_UARTCLKEN);
66 +               }
67 +               /* Set the override bit so we don't divide it */
68 +               bcma_cc_write32(cc, BCMA_CC_CORECTL,
69 +                              bcma_cc_read32(cc, BCMA_CC_CORECTL)
70 +                              | BCMA_CC_CORECTL_UARTCLK0);
71 +               if (ccrev >= 21) {
72 +                       /* Re-enable the UART clock. */
73 +                       bcma_cc_write32(cc, BCMA_CC_CORECTL,
74 +                                      bcma_cc_read32(cc, BCMA_CC_CORECTL)
75 +                                      | BCMA_CC_CORECTL_UARTCLKEN);
76 +               }
77 +       } else
78 +               pr_err("serial not supported on this device ccrev: 0x%x\n",
79 +                      ccrev);
80 +
81 +       /* Determine the registers of the UARTs */
82 +       n = (cc->capabilities & BCMA_CC_CAP_NRUART);
83 +       for (i = 0; i < n; i++) {
84 +               void __iomem *cc_mmio;
85 +               void __iomem *uart_regs;
86 +
87 +               cc_mmio = cc->core->bus->mmio +
88 +                         (cc->core->core_index * BCMA_CORE_SIZE);
89 +               uart_regs = cc_mmio + BCMA_CC_UART0_DATA;
90 +               uart_regs += (i * 256);
91 +
92 +               nr_ports++;
93 +               ports[i].regs = uart_regs;
94 +               ports[i].irq = irq;
95 +               ports[i].baud_base = baud_base;
96 +               ports[i].reg_shift = 0;
97 +       }
98 +
99 +       return nr_ports;
100 +}
101 +#endif /* CONFIG_BCMA_DRIVER_MIPS */
102 --- a/drivers/bcma/driver_mips.c
103 +++ b/drivers/bcma/driver_mips.c
104 @@ -157,6 +157,14 @@ static void bcma_core_mips_dump_irq(stru
105         }
106  }
107  
108 +static void bcma_core_mips_serial_init(struct bcma_drv_mips *mcore)
109 +{
110 +       struct bcma_bus *bus = mcore->core->bus;
111 +
112 +       mcore->nr_serial_ports = bcma_chipco_serial_init(&bus->drv_cc,
113 +                                                        mcore->serial_ports);
114 +}
115 +
116  static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
117  {
118         struct bcma_bus *bus = mcore->core->bus;
119 @@ -229,6 +237,7 @@ void bcma_core_mips_init(struct bcma_drv
120         if (mcore->setup_done)
121                 return;
122  
123 +       bcma_core_mips_serial_init(mcore);
124         bcma_core_mips_flash_detect(mcore);
125         mcore->setup_done = true;
126  }
127 --- a/include/linux/bcma/bcma_driver_mips.h
128 +++ b/include/linux/bcma/bcma_driver_mips.h
129 @@ -32,11 +32,22 @@
130  
131  struct bcma_device;
132  
133 +struct bcma_drv_mips_serial_port {
134 +       void *regs;
135 +       unsigned long clockspeed;
136 +       unsigned int irq;
137 +       unsigned int baud_base;
138 +       unsigned int reg_shift;
139 +};
140 +
141  struct bcma_drv_mips {
142         struct bcma_device *core;
143         u8 setup_done:1;
144         unsigned int assigned_irqs;
145  
146 +       int nr_serial_ports;
147 +       struct bcma_drv_mips_serial_port serial_ports[4];
148 +
149         u8 flash_buswidth;
150         u32 flash_window;
151         u32 flash_window_size;