target/linux/brcm47xx/patches-2.6.32/930-bcm47xx-pci-iomem.patch

   1 --- a/drivers/ssb/driver_pcicore.c
   2 +++ b/drivers/ssb/driver_pcicore.c
   3 @@ -246,20 +246,12 @@ static struct pci_controller ssb_pcicore
   4         .pci_ops        = &ssb_pcicore_pciops,
   5         .io_resource    = &ssb_pcicore_io_resource,
   6         .mem_resource   = &ssb_pcicore_mem_resource,
   7 -       .mem_offset     = 0x24000000,
   8  };
   9
  10 -static u32 ssb_pcicore_pcibus_iobase = 0x100;
  11 -static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
  12 -
  13  /* This function is called when doing a pci_enable_device().
  14   * We must first check if the device is a device on the PCI-core bridge. */
  15  int ssb_pcicore_plat_dev_init(struct pci_dev *d)
  16  {
  17 -       struct resource *res;
  18 -       int pos, size;
  19 -       u32 *base;
  20 -
  21         if (d->bus->ops != &ssb_pcicore_pciops) {
  22                 /* This is not a device on the PCI-core bridge. */
  23                 return -ENODEV;
  24 @@ -268,27 +260,6 @@ int ssb_pcicore_plat_dev_init(struct pci
  25         ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
  26                    pci_name(d));
  27
  28 -       /* Fix up resource bases */
  29 -       for (pos = 0; pos < 6; pos++) {
  30 -               res = &d->resource[pos];
  31 -               if (res->flags & IORESOURCE_IO)
  32 -                       base = &ssb_pcicore_pcibus_iobase;
  33 -               else
  34 -                       base = &ssb_pcicore_pcibus_membase;
  35 -               res->flags |= IORESOURCE_PCI_FIXED;
  36 -               if (res->end) {
  37 -                       size = res->end - res->start + 1;
  38 -                       if (*base & (size - 1))
  39 -                               *base = (*base + size) & ~(size - 1);
  40 -                       res->start = *base;
  41 -                       res->end = res->start + size - 1;
  42 -                       *base += size;
  43 -                       pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
  44 -               }
  45 -               /* Fix up PCI bridge BAR0 only */
  46 -               if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
  47 -                       break;
  48 -       }
  49         /* Fix up interrupt lines */
  50         d->irq = ssb_mips_irq(extpci_core->dev) + 2;
  51         pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);