1ceccb5c604104830ae92cf9630c3031ebbf61e1
[15.05/openwrt.git] / target / linux / brcm47xx / patches-2.6.32 / 930-bcm47xx-pci-iomem.patch
1 Index: linux-2.6.33/drivers/ssb/driver_pcicore.c
2 ===================================================================
3 --- linux-2.6.33.orig/drivers/ssb/driver_pcicore.c      2010-03-15 14:52:55.000000000 +0100
4 +++ linux-2.6.33/drivers/ssb/driver_pcicore.c   2010-03-15 15:57:38.000000000 +0100
5 @@ -246,20 +246,12 @@
6         .pci_ops        = &ssb_pcicore_pciops,
7         .io_resource    = &ssb_pcicore_io_resource,
8         .mem_resource   = &ssb_pcicore_mem_resource,
9 -       .mem_offset     = 0x24000000,
10  };
11  
12 -static u32 ssb_pcicore_pcibus_iobase = 0x100;
13 -static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
14 -
15  /* This function is called when doing a pci_enable_device().
16   * We must first check if the device is a device on the PCI-core bridge. */
17  int ssb_pcicore_plat_dev_init(struct pci_dev *d)
18  {
19 -       struct resource *res;
20 -       int pos, size;
21 -       u32 *base;
22 -
23         if (d->bus->ops != &ssb_pcicore_pciops) {
24                 /* This is not a device on the PCI-core bridge. */
25                 return -ENODEV;
26 @@ -268,27 +260,6 @@
27         ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
28                    pci_name(d));
29  
30 -       /* Fix up resource bases */
31 -       for (pos = 0; pos < 6; pos++) {
32 -               res = &d->resource[pos];
33 -               if (res->flags & IORESOURCE_IO)
34 -                       base = &ssb_pcicore_pcibus_iobase;
35 -               else
36 -                       base = &ssb_pcicore_pcibus_membase;
37 -               res->flags |= IORESOURCE_PCI_FIXED;
38 -               if (res->end) {
39 -                       size = res->end - res->start + 1;
40 -                       if (*base & (size - 1))
41 -                               *base = (*base + size) & ~(size - 1);
42 -                       res->start = *base;
43 -                       res->end = res->start + size - 1;
44 -                       *base += size;
45 -                       pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
46 -               }
47 -               /* Fix up PCI bridge BAR0 only */
48 -               if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
49 -                       break;
50 -       }
51         /* Fix up interrupt lines */
52         d->irq = ssb_mips_irq(extpci_core->dev) + 2;
53         pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);