target/linux/brcm2708/patches-4.4/0163-Aux-SPI-1-2-implementation.patch

   1 From 43477e669f736f6da34afbd8a96683b239b1fd1f Mon Sep 17 00:00:00 2001
   2 From: Fraser <github@frasersdev.net>
   3 Date: Tue, 23 Feb 2016 10:04:37 +1100
   4 Subject: [PATCH 163/170] Aux SPI 1&2 implementation
   5
   6 Adds aux spi 1 & 2 devices to compatible raspberry PIs.
   7 * Minor config of the driver build environment to ensure they get built
   8 for CONFIG_ARCH_BCM2708 & CONFIG_ARCH_BCM2709 devices.
   9 * Adds the aux spi driver into the defconfigs as a module.
  10 * Adds the auxiliary and spi1/2 devices into the device tree in a
  11 disabled state
  12 * Provides decide tree overlays which enables the devices and gives
  13 users a degree of control over how they are setup.
  14 ---
  15  arch/arm/boot/dts/bcm2708_common.dtsi           | 34 ++++++++-
  16  arch/arm/boot/dts/overlays/Makefile             |  6 ++
  17  arch/arm/boot/dts/overlays/README               | 99 +++++++++++++++++++++++++
  18  arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts | 57 ++++++++++++++
  19  arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts | 69 +++++++++++++++++
  20  arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts | 81 ++++++++++++++++++++
  21  arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts | 57 ++++++++++++++
  22  arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts | 69 +++++++++++++++++
  23  arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts | 81 ++++++++++++++++++++
  24  arch/arm/configs/bcm2709_defconfig              |  1 +
  25  arch/arm/configs/bcmrpi_defconfig               |  1 +
  26  drivers/clk/bcm/Makefile                        |  2 +-
  27  drivers/spi/Kconfig                             |  2 +-
  28  13 files changed, 556 insertions(+), 3 deletions(-)
  29  create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
  30  create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
  31  create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
  32  create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
  33  create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
  34  create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
  35
  36 --- a/arch/arm/boot/dts/bcm2708_common.dtsi
  37 +++ b/arch/arm/boot/dts/bcm2708_common.dtsi
  38 @@ -1,3 +1,4 @@
  39 +#include <dt-bindings/clock/bcm2835-aux.h>
  40  #include "skeleton.dtsi"
  41
  42  / {
  43 @@ -5,6 +6,7 @@
  44
  45         aliases {
  46                 audio = &audio;
  47 +               aux = &aux;
  48                 sound = &sound;
  49                 soc = &soc;
  50                 dma = &dma;
  51 @@ -19,6 +21,8 @@
  52                 spi0 = &spi0;
  53                 i2c0 = &i2c0;
  54                 uart1 = &uart1;
  55 +               spi1 = &spi1;
  56 +               spi2 = &spi2;
  57                 mmc = &mmc;
  58                 i2c1 = &i2c1;
  59                 i2c2 = &i2c2;
  60 @@ -186,6 +190,14 @@
  61                         status = "disabled";
  62                 };
  63
  64 +               aux: aux@0x7e215004 {
  65 +                       compatible = "brcm,bcm2835-aux";
  66 +                       #clock-cells = <1>;
  67 +                       reg = <0x7e215000 0x8>;
  68 +                       clocks = <&clk_core>;
  69 +                       status = "disabled";
  70 +               };
  71 +
  72                 uart1: uart@7e215040 {
  73                         compatible = "brcm,bcm2835-aux-uart", "ns16550";
  74                         reg = <0x7e215040 0x40>;
  75 @@ -194,7 +206,27 @@
  76                         reg-shift = <2>;
  77                         no-loopback-test;
  78                         status = "disabled";
  79 -               };
  80 +               };
  81 +
  82 +               spi1: spi@7e215080 {
  83 +                       compatible = "brcm,bcm2835-aux-spi";
  84 +                       reg = <0x7e215080 0x40>, <0x7e215000 0x8>;
  85 +                       interrupts = <1 29>;
  86 +                       clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
  87 +                       #address-cells = <1>;
  88 +                       #size-cells = <0>;
  89 +                       status = "disabled";
  90 +               };
  91 +
  92 +               spi2: spi@7e2150C0 {
  93 +                       compatible = "brcm,bcm2835-aux-spi";
  94 +                       reg = <0x7e2150C0 0x40>, <0x7e215000 0x8>;
  95 +                       interrupts = <1 29>;
  96 +                       clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
  97 +                       #address-cells = <1>;
  98 +                       #size-cells = <0>;
  99 +                       status = "disabled";
 100 +               };
 101
 102                 mmc: mmc@7e300000 {
 103                         compatible = "brcm,bcm2835-mmc";
 104 --- a/arch/arm/boot/dts/overlays/Makefile
 105 +++ b/arch/arm/boot/dts/overlays/Makefile
 106 @@ -57,6 +57,12 @@ dtb-$(RPI_DT_OVERLAYS) += sdtweak-overla
 107  dtb-$(RPI_DT_OVERLAYS) += smi-dev-overlay.dtb
 108  dtb-$(RPI_DT_OVERLAYS) += smi-nand-overlay.dtb
 109  dtb-$(RPI_DT_OVERLAYS) += smi-overlay.dtb
 110 +dtb-$(RPI_DT_OVERLAYS) += spi1-1cs-overlay.dtb
 111 +dtb-$(RPI_DT_OVERLAYS) += spi1-2cs-overlay.dtb
 112 +dtb-$(RPI_DT_OVERLAYS) += spi1-3cs-overlay.dtb
 113 +dtb-$(RPI_DT_OVERLAYS) += spi2-1cs-overlay.dtb
 114 +dtb-$(RPI_DT_OVERLAYS) += spi2-2cs-overlay.dtb
 115 +dtb-$(RPI_DT_OVERLAYS) += spi2-3cs-overlay.dtb
 116  dtb-$(RPI_DT_OVERLAYS) += spi-gpio35-39-overlay.dtb
 117  dtb-$(RPI_DT_OVERLAYS) += tinylcd35-overlay.dtb
 118  dtb-$(RPI_DT_OVERLAYS) += uart1-overlay.dtb
 119 --- a/arch/arm/boot/dts/overlays/README
 120 +++ b/arch/arm/boot/dts/overlays/README
 121 @@ -713,6 +713,105 @@ Load:   dtoverlay=spi-gpio35-39
 122  Params: <None>
 123
 124
 125 +Name:   spi1-1cs
 126 +Info:   Enables spi1 with a single chip select (CS) line and associated spidev
 127 +        dev node. The gpio pin number for the CS line and spidev device node
 128 +        creation are configurable.
 129 +        N.B.: spi1 is only accessible on devices with a 40pin header, eg:
 130 +              A+, B+, Zero and PI2 B; as well as the Compute Module.
 131 +Load:   dtoverlay=spi1-1cs,<param>=<val>
 132 +Params: cs0_pin                 GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
 133 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 134 +                                userspace device node /dev/spidev1.0 (default
 135 +                                is 'okay' or enabled).
 136 +
 137 +
 138 +Name:   spi1-2cs
 139 +Info:   Enables spi1 with two chip select (CS) lines and associated spidev
 140 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 141 +        creation are configurable.
 142 +        N.B.: spi1 is only accessible on devices with a 40pin header, eg:
 143 +              A+, B+, Zero and PI2 B; as well as the Compute Module.
 144 +Load:   dtoverlay=spi1-2cs,<param>=<val>
 145 +Params: cs0_pin                 GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
 146 +        cs1_pin                 GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
 147 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 148 +                                userspace device node /dev/spidev1.0 (default
 149 +                                is 'okay' or enabled).
 150 +        cs1_spidev              Set to 'disabled' to stop the creation of a
 151 +                                userspace device node /dev/spidev1.1 (default
 152 +                                is 'okay' or enabled).
 153 +
 154 +
 155 +Name:   spi1-3cs
 156 +Info:   Enables spi1 with three chip select (CS) lines and associated spidev
 157 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 158 +        creation are configurable.
 159 +        N.B.: spi1 is only accessible on devices with a 40pin header, eg:
 160 +              A+, B+, Zero and PI2 B; as well as the Compute Module.
 161 +Load:   dtoverlay=spi1-3cs,<param>=<val>
 162 +Params: cs0_pin                 GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
 163 +        cs1_pin                 GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
 164 +        cs2_pin                 GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
 165 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 166 +                                userspace device node /dev/spidev1.0 (default
 167 +                                is 'okay' or enabled).
 168 +        cs1_spidev              Set to 'disabled' to stop the creation of a
 169 +                                userspace device node /dev/spidev1.1 (default
 170 +                                is 'okay' or enabled).
 171 +        cs2_spidev              Set to 'disabled' to stop the creation of a
 172 +                                userspace device node /dev/spidev1.2 (default
 173 +                                is 'okay' or enabled).
 174 +
 175 +
 176 +Name:   spi2-1cs
 177 +Info:   Enables spi2 with a single chip select (CS) line and associated spidev
 178 +        dev node. The gpio pin number for the CS line and spidev device node
 179 +        creation are configurable.
 180 +        N.B.: spi2 is only accessible with the Compute Module.
 181 +Load:   dtoverlay=spi2-1cs,<param>=<val>
 182 +Params: cs0_pin                 GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
 183 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 184 +                                userspace device node /dev/spidev2.0 (default
 185 +                                is 'okay' or enabled).
 186 +
 187 +
 188 +Name:   spi2-2cs
 189 +Info:   Enables spi2 with two chip select (CS) lines and associated spidev
 190 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 191 +        creation are configurable.
 192 +        N.B.: spi2 is only accessible with the Compute Module.
 193 +Load:   dtoverlay=spi2-2cs,<param>=<val>
 194 +Params: cs0_pin                 GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
 195 +        cs1_pin                 GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
 196 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 197 +                                userspace device node /dev/spidev2.0 (default
 198 +                                is 'okay' or enabled).
 199 +        cs1_spidev              Set to 'disabled' to stop the creation of a
 200 +                                userspace device node /dev/spidev2.1 (default
 201 +                                is 'okay' or enabled).
 202 +
 203 +
 204 +Name:   spi2-3cs
 205 +Info:   Enables spi2 with three chip select (CS) lines and associated spidev
 206 +        dev nodes. The gpio pin numbers for the CS lines and spidev device node
 207 +        creation are configurable.
 208 +        N.B.: spi2 is only accessible with the Compute Module.
 209 +Load:   dtoverlay=spi2-3cs,<param>=<val>
 210 +Params: cs0_pin                 GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
 211 +        cs1_pin                 GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
 212 +        cs2_pin                 GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
 213 +        cs0_spidev              Set to 'disabled' to stop the creation of a
 214 +                                userspace device node /dev/spidev2.0 (default
 215 +                                is 'okay' or enabled).
 216 +        cs1_spidev              Set to 'disabled' to stop the creation of a
 217 +                                userspace device node /dev/spidev2.1 (default
 218 +                                is 'okay' or enabled).
 219 +        cs2_spidev              Set to 'disabled' to stop the creation of a
 220 +                                userspace device node /dev/spidev2.2 (default
 221 +                                is 'okay' or enabled).
 222 +
 223 +
 224  Name:   tinylcd35
 225  Info:   3.5" Color TFT Display by www.tinylcd.com
 226          Options: Touch, RTC, keypad
 227 --- /dev/null
 228 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
 229 @@ -0,0 +1,57 @@
 230 +/dts-v1/;
 231 +/plugin/;
 232 +
 233 +
 234 +/ {
 235 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 236 +
 237 +       fragment@0 {
 238 +               target = <&gpio>;
 239 +               __overlay__ {
 240 +                       spi1_pins: spi1_pins {
 241 +                               brcm,pins = <19 20 21>;
 242 +                               brcm,function = <3>; /* alt4 */
 243 +                       };
 244 +
 245 +                       spi1_cs_pins: spi1_cs_pins {
 246 +                               brcm,pins = <18>;
 247 +                               brcm,function = <1>; /* output */
 248 +                       };
 249 +               };
 250 +       };
 251 +
 252 +       fragment@1 {
 253 +               target = <&spi1>;
 254 +               frag1: __overlay__ {
 255 +                       /* needed to avoid dtc warning */
 256 +                       #address-cells = <1>;
 257 +                       #size-cells = <0>;
 258 +                       pinctrl-names = "default";
 259 +                       pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
 260 +                       cs-gpios = <&gpio 18 1>;
 261 +                       status = "okay";
 262 +
 263 +                       spidev1_0: spidev@0 {
 264 +                               compatible = "spidev";
 265 +                               reg = <0>;      /* CE0 */
 266 +                               #address-cells = <1>;
 267 +                               #size-cells = <0>;
 268 +                               spi-max-frequency = <500000>;
 269 +                               status = "okay";
 270 +                       };
 271 +               };
 272 +       };
 273 +
 274 +       fragment@2 {
 275 +               target = <&aux>;
 276 +               __overlay__ {
 277 +                       status = "okay";
 278 +               };
 279 +       };
 280 +
 281 +       __overrides__ {
 282 +               cs0_pin  = <&spi1_cs_pins>,"brcm,pins:0",
 283 +                          <&frag1>,"cs-gpios:4";
 284 +               cs0_spidev = <&spidev1_0>,"status";
 285 +       };
 286 +};
 287 --- /dev/null
 288 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
 289 @@ -0,0 +1,69 @@
 290 +/dts-v1/;
 291 +/plugin/;
 292 +
 293 +
 294 +/ {
 295 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 296 +
 297 +       fragment@0 {
 298 +               target = <&gpio>;
 299 +               __overlay__ {
 300 +                       spi1_pins: spi1_pins {
 301 +                               brcm,pins = <19 20 21>;
 302 +                               brcm,function = <3>; /* alt4 */
 303 +                       };
 304 +
 305 +                       spi1_cs_pins: spi1_cs_pins {
 306 +                               brcm,pins = <18 17>;
 307 +                               brcm,function = <1>; /* output */
 308 +                       };
 309 +               };
 310 +       };
 311 +
 312 +       fragment@1 {
 313 +               target = <&spi1>;
 314 +               frag1: __overlay__ {
 315 +                       /* needed to avoid dtc warning */
 316 +                       #address-cells = <1>;
 317 +                       #size-cells = <0>;
 318 +                       pinctrl-names = "default";
 319 +                       pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
 320 +                       cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
 321 +                       status = "okay";
 322 +
 323 +                       spidev1_0: spidev@0 {
 324 +                               compatible = "spidev";
 325 +                               reg = <0>;      /* CE0 */
 326 +                               #address-cells = <1>;
 327 +                               #size-cells = <0>;
 328 +                               spi-max-frequency = <500000>;
 329 +                               status = "okay";
 330 +                       };
 331 +
 332 +                       spidev1_1: spidev@1 {
 333 +                               compatible = "spidev";
 334 +                               reg = <1>;      /* CE1 */
 335 +                               #address-cells = <1>;
 336 +                               #size-cells = <0>;
 337 +                               spi-max-frequency = <500000>;
 338 +                               status = "okay";
 339 +                       };
 340 +               };
 341 +       };
 342 +
 343 +       fragment@2 {
 344 +               target = <&aux>;
 345 +               __overlay__ {
 346 +                       status = "okay";
 347 +               };
 348 +       };
 349 +
 350 +       __overrides__ {
 351 +               cs0_pin  = <&spi1_cs_pins>,"brcm,pins:0",
 352 +                          <&frag1>,"cs-gpios:4";
 353 +               cs1_pin  = <&spi1_cs_pins>,"brcm,pins:4",
 354 +                          <&frag1>,"cs-gpios:16";
 355 +               cs0_spidev = <&spidev1_0>,"status";
 356 +               cs1_spidev = <&spidev1_1>,"status";
 357 +       };
 358 +};
 359 --- /dev/null
 360 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
 361 @@ -0,0 +1,81 @@
 362 +/dts-v1/;
 363 +/plugin/;
 364 +
 365 +
 366 +/ {
 367 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 368 +
 369 +       fragment@0 {
 370 +               target = <&gpio>;
 371 +               __overlay__ {
 372 +                       spi1_pins: spi1_pins {
 373 +                               brcm,pins = <19 20 21>;
 374 +                               brcm,function = <3>; /* alt4 */
 375 +                       };
 376 +
 377 +                       spi1_cs_pins: spi1_cs_pins {
 378 +                               brcm,pins = <18 17 16>;
 379 +                               brcm,function = <1>; /* output */
 380 +                       };
 381 +               };
 382 +       };
 383 +
 384 +       fragment@1 {
 385 +               target = <&spi1>;
 386 +               frag1: __overlay__ {
 387 +                       /* needed to avoid dtc warning */
 388 +                       #address-cells = <1>;
 389 +                       #size-cells = <0>;
 390 +                       pinctrl-names = "default";
 391 +                       pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
 392 +                       cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
 393 +                       status = "okay";
 394 +
 395 +                       spidev1_0: spidev@0 {
 396 +                               compatible = "spidev";
 397 +                               reg = <0>;      /* CE0 */
 398 +                               #address-cells = <1>;
 399 +                               #size-cells = <0>;
 400 +                               spi-max-frequency = <500000>;
 401 +                               status = "okay";
 402 +                       };
 403 +
 404 +                       spidev1_1: spidev@1 {
 405 +                               compatible = "spidev";
 406 +                               reg = <1>;      /* CE1 */
 407 +                               #address-cells = <1>;
 408 +                               #size-cells = <0>;
 409 +                               spi-max-frequency = <500000>;
 410 +                               status = "okay";
 411 +                       };
 412 +
 413 +                       spidev1_2: spidev@2 {
 414 +                               compatible = "spidev";
 415 +                               reg = <2>;      /* CE2 */
 416 +                               #address-cells = <1>;
 417 +                               #size-cells = <0>;
 418 +                               spi-max-frequency = <500000>;
 419 +                               status = "okay";
 420 +                       };
 421 +               };
 422 +       };
 423 +
 424 +       fragment@2 {
 425 +               target = <&aux>;
 426 +               __overlay__ {
 427 +                       status = "okay";
 428 +               };
 429 +       };
 430 +
 431 +       __overrides__ {
 432 +               cs0_pin  = <&spi1_cs_pins>,"brcm,pins:0",
 433 +                          <&frag1>,"cs-gpios:4";
 434 +               cs1_pin  = <&spi1_cs_pins>,"brcm,pins:4",
 435 +                          <&frag1>,"cs-gpios:16";
 436 +               cs2_pin  = <&spi1_cs_pins>,"brcm,pins:8",
 437 +                          <&frag1>,"cs-gpios:28";
 438 +               cs0_spidev = <&spidev1_0>,"status";
 439 +               cs1_spidev = <&spidev1_1>,"status";
 440 +               cs2_spidev = <&spidev1_2>,"status";
 441 +       };
 442 +};
 443 --- /dev/null
 444 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
 445 @@ -0,0 +1,57 @@
 446 +/dts-v1/;
 447 +/plugin/;
 448 +
 449 +
 450 +/ {
 451 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 452 +
 453 +       fragment@0 {
 454 +               target = <&gpio>;
 455 +               __overlay__ {
 456 +                       spi2_pins: spi2_pins {
 457 +                               brcm,pins = <40 41 42>;
 458 +                               brcm,function = <3>; /* alt4 */
 459 +                       };
 460 +
 461 +                       spi2_cs_pins: spi2_cs_pins {
 462 +                               brcm,pins = <43>;
 463 +                               brcm,function = <1>; /* output */
 464 +                       };
 465 +               };
 466 +       };
 467 +
 468 +       fragment@1 {
 469 +               target = <&spi2>;
 470 +               frag1: __overlay__ {
 471 +                       /* needed to avoid dtc warning */
 472 +                       #address-cells = <1>;
 473 +                       #size-cells = <0>;
 474 +                       pinctrl-names = "default";
 475 +                       pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
 476 +                       cs-gpios = <&gpio 43 1>;
 477 +                       status = "okay";
 478 +
 479 +                       spidev2_0: spidev@0 {
 480 +                               compatible = "spidev";
 481 +                               reg = <0>;      /* CE0 */
 482 +                               #address-cells = <1>;
 483 +                               #size-cells = <0>;
 484 +                               spi-max-frequency = <500000>;
 485 +                               status = "okay";
 486 +                       };
 487 +               };
 488 +       };
 489 +
 490 +       fragment@2 {
 491 +               target = <&aux>;
 492 +               __overlay__ {
 493 +                       status = "okay";
 494 +               };
 495 +       };
 496 +
 497 +       __overrides__ {
 498 +               cs0_pin  = <&spi2_cs_pins>,"brcm,pins:0",
 499 +                          <&frag1>,"cs-gpios:4";
 500 +               cs0_spidev = <&spidev2_0>,"status";
 501 +       };
 502 +};
 503 --- /dev/null
 504 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
 505 @@ -0,0 +1,69 @@
 506 +/dts-v1/;
 507 +/plugin/;
 508 +
 509 +
 510 +/ {
 511 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 512 +
 513 +       fragment@0 {
 514 +               target = <&gpio>;
 515 +               __overlay__ {
 516 +                       spi2_pins: spi2_pins {
 517 +                               brcm,pins = <40 41 42>;
 518 +                               brcm,function = <3>; /* alt4 */
 519 +                       };
 520 +
 521 +                       spi2_cs_pins: spi2_cs_pins {
 522 +                               brcm,pins = <43 44>;
 523 +                               brcm,function = <1>; /* output */
 524 +                       };
 525 +               };
 526 +       };
 527 +
 528 +       fragment@1 {
 529 +               target = <&spi2>;
 530 +               frag1: __overlay__ {
 531 +                       /* needed to avoid dtc warning */
 532 +                       #address-cells = <1>;
 533 +                       #size-cells = <0>;
 534 +                       pinctrl-names = "default";
 535 +                       pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
 536 +                       cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
 537 +                       status = "okay";
 538 +
 539 +                       spidev2_0: spidev@0 {
 540 +                               compatible = "spidev";
 541 +                               reg = <0>;      /* CE0 */
 542 +                               #address-cells = <1>;
 543 +                               #size-cells = <0>;
 544 +                               spi-max-frequency = <500000>;
 545 +                               status = "okay";
 546 +                       };
 547 +
 548 +                       spidev2_1: spidev@1 {
 549 +                               compatible = "spidev";
 550 +                               reg = <1>;      /* CE1 */
 551 +                               #address-cells = <1>;
 552 +                               #size-cells = <0>;
 553 +                               spi-max-frequency = <500000>;
 554 +                               status = "okay";
 555 +                       };
 556 +               };
 557 +       };
 558 +
 559 +       fragment@2 {
 560 +               target = <&aux>;
 561 +               __overlay__ {
 562 +                       status = "okay";
 563 +               };
 564 +       };
 565 +
 566 +       __overrides__ {
 567 +               cs0_pin  = <&spi2_cs_pins>,"brcm,pins:0",
 568 +                          <&frag1>,"cs-gpios:4";
 569 +               cs1_pin  = <&spi2_cs_pins>,"brcm,pins:4",
 570 +                          <&frag1>,"cs-gpios:16";
 571 +               cs0_spidev = <&spidev2_0>,"status";
 572 +               cs1_spidev = <&spidev2_1>,"status";
 573 +       };
 574 +};
 575 --- /dev/null
 576 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
 577 @@ -0,0 +1,81 @@
 578 +/dts-v1/;
 579 +/plugin/;
 580 +
 581 +
 582 +/ {
 583 +       compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
 584 +
 585 +       fragment@0 {
 586 +               target = <&gpio>;
 587 +               __overlay__ {
 588 +                       spi2_pins: spi2_pins {
 589 +                               brcm,pins = <40 41 42>;
 590 +                               brcm,function = <3>; /* alt4 */
 591 +                       };
 592 +
 593 +                       spi2_cs_pins: spi2_cs_pins {
 594 +                               brcm,pins = <43 44 45>;
 595 +                               brcm,function = <1>; /* output */
 596 +                       };
 597 +               };
 598 +       };
 599 +
 600 +       fragment@1 {
 601 +               target = <&spi2>;
 602 +               frag1: __overlay__ {
 603 +                       /* needed to avoid dtc warning */
 604 +                       #address-cells = <1>;
 605 +                       #size-cells = <0>;
 606 +                       pinctrl-names = "default";
 607 +                       pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
 608 +                       cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
 609 +                       status = "okay";
 610 +
 611 +                       spidev2_0: spidev@0 {
 612 +                               compatible = "spidev";
 613 +                               reg = <0>;      /* CE0 */
 614 +                               #address-cells = <1>;
 615 +                               #size-cells = <0>;
 616 +                               spi-max-frequency = <500000>;
 617 +                               status = "okay";
 618 +                       };
 619 +
 620 +                       spidev2_1: spidev@1 {
 621 +                               compatible = "spidev";
 622 +                               reg = <1>;      /* CE1 */
 623 +                               #address-cells = <1>;
 624 +                               #size-cells = <0>;
 625 +                               spi-max-frequency = <500000>;
 626 +                               status = "okay";
 627 +                       };
 628 +
 629 +                       spidev2_2: spidev@2 {
 630 +                               compatible = "spidev";
 631 +                               reg = <2>;      /* CE2 */
 632 +                               #address-cells = <1>;
 633 +                               #size-cells = <0>;
 634 +                               spi-max-frequency = <500000>;
 635 +                               status = "okay";
 636 +                       };
 637 +               };
 638 +       };
 639 +
 640 +       fragment@2 {
 641 +               target = <&aux>;
 642 +               __overlay__ {
 643 +                       status = "okay";
 644 +               };
 645 +       };
 646 +
 647 +       __overrides__ {
 648 +               cs0_pin  = <&spi2_cs_pins>,"brcm,pins:0",
 649 +                          <&frag1>,"cs-gpios:4";
 650 +               cs1_pin  = <&spi2_cs_pins>,"brcm,pins:4",
 651 +                          <&frag1>,"cs-gpios:16";
 652 +               cs2_pin  = <&spi2_cs_pins>,"brcm,pins:8",
 653 +                          <&frag1>,"cs-gpios:28";
 654 +               cs0_spidev = <&spidev2_0>,"status";
 655 +               cs1_spidev = <&spidev2_1>,"status";
 656 +               cs2_spidev = <&spidev2_2>,"status";
 657 +       };
 658 +};
 659 --- a/arch/arm/configs/bcm2709_defconfig
 660 +++ b/arch/arm/configs/bcm2709_defconfig
 661 @@ -601,6 +601,7 @@ CONFIG_I2C_BCM2708=m
 662  CONFIG_I2C_GPIO=m
 663  CONFIG_SPI=y
 664  CONFIG_SPI_BCM2835=m
 665 +CONFIG_SPI_BCM2835AUX=m
 666  CONFIG_SPI_SPIDEV=y
 667  CONFIG_PPS=m
 668  CONFIG_PPS_CLIENT_LDISC=m
 669 --- a/arch/arm/configs/bcmrpi_defconfig
 670 +++ b/arch/arm/configs/bcmrpi_defconfig
 671 @@ -593,6 +593,7 @@ CONFIG_I2C_BCM2708=m
 672  CONFIG_I2C_GPIO=m
 673  CONFIG_SPI=y
 674  CONFIG_SPI_BCM2835=m
 675 +CONFIG_SPI_BCM2835AUX=m
 676  CONFIG_SPI_SPIDEV=y
 677  CONFIG_PPS=m
 678  CONFIG_PPS_CLIENT_LDISC=m
 679 --- a/drivers/clk/bcm/Makefile
 680 +++ b/drivers/clk/bcm/Makefile
 681 @@ -4,7 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA)      += clk-bcm281
 682  obj-$(CONFIG_CLK_BCM_KONA)     += clk-bcm21664.o
 683  obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
 684  obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835.o
 685 -obj-$(CONFIG_ARCH_BCM2835)     += clk-bcm2835-aux.o
 686 +obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835-aux.o
 687  obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
 688  obj-$(CONFIG_ARCH_BCM_CYGNUS)  += clk-cygnus.o
 689  obj-$(CONFIG_ARCH_BCM_NSP)     += clk-nsp.o
 690 --- a/drivers/spi/Kconfig
 691 +++ b/drivers/spi/Kconfig
 692 @@ -90,7 +90,7 @@ config SPI_BCM2835
 693
 694  config SPI_BCM2835AUX
 695         tristate "BCM2835 SPI auxiliary controller"
 696 -       depends on ARCH_BCM2835 || COMPILE_TEST
 697 +       depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST
 698         depends on GPIOLIB
 699         help
 700           This selects a driver for the Broadcom BCM2835 SPI aux master.