b0cc812d2789c0cfbc9efdf2a819930b6816eeb0
[openwrt.git] / target / linux / brcm-2.4 / patches / 012-aec62xx.patch
1 Index: linux-2.4.35.4/drivers/ide/pci/aec62xx.c
2 ===================================================================
3 --- linux-2.4.35.4.orig/drivers/ide/pci/aec62xx.c
4 +++ linux-2.4.35.4/drivers/ide/pci/aec62xx.c
5 @@ -3,6 +3,8 @@
6   *
7   * Copyright (C) 1999-2002     Andre Hedrick <andre@linux-ide.org>
8   *
9 + * With Broadcom 4780 patches
10 + *
11   */
12  
13  #include <linux/module.h>
14 @@ -329,7 +331,11 @@ static int aec62xx_config_drive_xfer_rat
15         ide_hwif_t *hwif        = HWIF(drive);
16         struct hd_driveid *id   = drive->id;
17  
18 +#ifndef CONFIG_BCM947XX
19         if ((id->capability & 1) && drive->autodma) {
20 +#else
21 +       if (1) {
22 +#endif
23                 /* Consult the list of known "bad" drives */
24                 if (hwif->ide_dma_bad_drive(drive))
25                         goto fast_ata_pio;
26 @@ -414,10 +420,60 @@ static unsigned int __init init_chipset_
27  {
28         int bus_speed = system_bus_clock();
29  
30 +#ifndef CONFIG_BCM947XX
31         if (dev->resource[PCI_ROM_RESOURCE].start) {
32                 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
33                 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
34         }
35 +#else
36 +       if (dev->resource[PCI_ROM_RESOURCE].start) {
37 +               pci_write_config_dword(dev, PCI_ROM_ADDRESS,
38 +                                       dev->resource[PCI_ROM_RESOURCE].
39 +                                       start | PCI_ROM_ADDRESS_ENABLE);
40 +       } else {
41 +               pci_write_config_dword(dev, PCI_ROM_ADDRESS,
42 +                                       dev->resource[PCI_ROM_RESOURCE].
43 +                                       start);
44 +       }
45 +
46 +       /* Set IDE controller parameters manually - FIXME: replace magic values */
47 +       {
48 +               byte setting;
49 +
50 +               pci_write_config_word(dev, PCI_COMMAND, 0x0007);
51 +               //pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x5A);
52 +               pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x13);
53 +
54 +               pci_write_config_byte(dev, 0x40, 0x31);
55 +               pci_write_config_byte(dev, 0x41, 0x31);
56 +               pci_write_config_byte(dev, 0x42, 0x31);
57 +               pci_write_config_byte(dev, 0x43, 0x31);
58 +               // Set IDE Command Speed
59 +               pci_write_config_byte(dev, 0x48, 0x31);
60 +
61 +               // Disable WriteSubSysID & PIOROM
62 +               pci_read_config_byte(dev, 0x49, &setting);
63 +               setting &= 0x07;
64 +               pci_write_config_byte(dev, 0x49, setting);
65 +
66 +               // Enable PCI burst & INTA & PCI memory read multiple, FIFO threshold=80
67 +               pci_read_config_byte(dev, 0x4A, &setting);
68 +               //setting = (setting & 0xFE) | 0xA8;
69 +               setting = (setting & 0xFE) | 0xD8;
70 +               setting = (setting & 0xF7);
71 +               pci_write_config_byte(dev, 0x4A, setting);
72 +
73 +               //pci_write_config_byte(dev, 0x4B, 0x20);
74 +               pci_write_config_byte(dev, 0x4B, 0x2C);
75 +               //pci_write_config_byte(dev, 0x4B, 0x0C);
76 +
77 +               // Set PreRead count: 512 byte
78 +               pci_write_config_byte(dev, 0x4C, 0);
79 +               pci_write_config_word(dev, 0x4D, 0x0002);
80 +               pci_write_config_byte(dev, 0x54, 0);
81 +               pci_write_config_word(dev, 0x55, 0x0002);
82 +       }
83 +#endif
84  
85  #if defined(DISPLAY_AEC62XX_TIMINGS) && defined(CONFIG_PROC_FS)
86         aec_devs[n_aec_devs++] = dev;
87 @@ -500,6 +556,7 @@ static void __init init_setup_aec62xx (s
88  
89  static void __init init_setup_aec6x80 (struct pci_dev *dev, ide_pci_device_t *d)
90  {
91 +#ifndef CONFIG_BCM947XX /* Causes OOPS on BCM4780 */
92         unsigned long bar4reg = pci_resource_start(dev, 4);
93  
94         if (inb(bar4reg+2) & 0x10) {
95 @@ -512,6 +569,7 @@ static void __init init_setup_aec6x80 (s
96                         strcpy(d->name, "AEC6280R");
97         }
98  
99 +#endif
100         ide_setup_pci_device(dev, d);
101  }
102