target/linux/brcm-2.4/patches/001-bcm47xx.patch

   1 --- a/arch/mips/config-shared.in
   2 +++ b/arch/mips/config-shared.in
   3 @@ -208,6 +208,14 @@ if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]
   4     fi
   5     define_bool CONFIG_MIPS_RTC y
   6  fi
   7 +dep_bool 'Support for Broadcom MIPS-based boards' CONFIG_MIPS_BRCM $CONFIG_EXPERIMENTAL
   8 +dep_bool 'Support for Broadcom BCM947XX' CONFIG_BCM947XX $CONFIG_MIPS_BRCM
   9 +if [ "$CONFIG_BCM947XX" = "y" ] ; then
  10 +   bool '    Support for Broadcom BCM4710' CONFIG_BCM4710
  11 +   bool '    Support for Broadcom BCM4310' CONFIG_BCM4310
  12 +   bool '    Support for Broadcom BCM4704' CONFIG_BCM4704
  13 +   bool '    Support for Broadcom BCM5365' CONFIG_BCM5365
  14 +fi
  15  bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI
  16  bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226
  17  bool 'Support for TANBAC TB0229 (VR4131DIMM)' CONFIG_TANBAC_TB0229
  18 @@ -229,6 +237,11 @@ define_bool CONFIG_RWSEM_GENERIC_SPINLOC
  19  define_bool CONFIG_RWSEM_XCHGADD_ALGORITHM n
  20
  21  #
  22 +# Provide an option for a default kernel command line
  23 +#
  24 +string 'Default kernel command string' CONFIG_CMDLINE ""
  25 +
  26 +#
  27  # Select some configuration options automatically based on user selections.
  28  #
  29  if [ "$CONFIG_ACER_PICA_61" = "y" ]; then
  30 @@ -554,6 +567,12 @@ if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]
  31     define_bool CONFIG_SWAP_IO_SPACE_L y
  32     define_bool CONFIG_BOOT_ELF32 y
  33  fi
  34 +if [ "$CONFIG_BCM947XX" = "y" ] ; then
  35 +   define_bool CONFIG_PCI y
  36 +   define_bool CONFIG_NONCOHERENT_IO y
  37 +   define_bool CONFIG_NEW_TIME_C y
  38 +   define_bool CONFIG_NEW_IRQ y
  39 +fi
  40  if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then
  41     define_bool CONFIG_ARC32 y
  42     define_bool CONFIG_ARC_MEMORY y
  43 @@ -1042,7 +1061,11 @@ comment 'Kernel hacking'
  44
  45  bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE
  46  bool 'Enable run-time debugging' CONFIG_RUNTIME_DEBUG
  47 -bool 'Remote GDB kernel debugging' CONFIG_KGDB
  48 +if [ "$CONFIG_BCM947XX" = "y" ] ; then
  49 +       bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
  50 +else
  51 +       bool 'Remote GDB kernel debugging' CONFIG_KGDB
  52 +fi
  53  dep_bool '  Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_KGDB
  54  if [ "$CONFIG_KGDB" = "y" ]; then
  55     define_bool CONFIG_DEBUG_INFO y
  56 --- a/arch/mips/kernel/cpu-probe.c
  57 +++ b/arch/mips/kernel/cpu-probe.c
  58 @@ -162,7 +162,7 @@ static inline int __cpu_has_fpu(void)
  59
  60  static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
  61  {
  62 -       switch (c->processor_id & 0xff00) {
  63 +       switch (c->processor_id & PRID_IMP_MASK) {
  64         case PRID_IMP_R2000:
  65                 c->cputype = CPU_R2000;
  66                 c->isa_level = MIPS_CPU_ISA_I;
  67 @@ -172,7 +172,7 @@ static inline void cpu_probe_legacy(stru
  68                 c->tlbsize = 64;
  69                 break;
  70         case PRID_IMP_R3000:
  71 -               if ((c->processor_id & 0xff) == PRID_REV_R3000A)
  72 +               if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A)
  73                         if (cpu_has_confreg())
  74                                 c->cputype = CPU_R3081E;
  75                         else
  76 @@ -187,12 +187,12 @@ static inline void cpu_probe_legacy(stru
  77                 break;
  78         case PRID_IMP_R4000:
  79                 if (read_c0_config() & CONF_SC) {
  80 -                       if ((c->processor_id & 0xff) >= PRID_REV_R4400)
  81 +                       if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
  82                                 c->cputype = CPU_R4400PC;
  83                         else
  84                                 c->cputype = CPU_R4000PC;
  85                 } else {
  86 -                       if ((c->processor_id & 0xff) >= PRID_REV_R4400)
  87 +                       if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_R4400)
  88                                 c->cputype = CPU_R4400SC;
  89                         else
  90                                 c->cputype = CPU_R4000SC;
  91 @@ -438,7 +438,7 @@ static inline void decode_config1(struct
  92  static inline void cpu_probe_mips(struct cpuinfo_mips *c)
  93  {
  94         decode_config1(c);
  95 -       switch (c->processor_id & 0xff00) {
  96 +       switch (c->processor_id & PRID_IMP_MASK) {
  97         case PRID_IMP_4KC:
  98                 c->cputype = CPU_4KC;
  99                 c->isa_level = MIPS_CPU_ISA_M32;
 100 @@ -479,10 +479,10 @@ static inline void cpu_probe_alchemy(str
 101  {
 102         decode_config1(c);
 103         c->options |= MIPS_CPU_PREFETCH;
 104 -       switch (c->processor_id & 0xff00) {
 105 +       switch (c->processor_id & PRID_IMP_MASK) {
 106         case PRID_IMP_AU1_REV1:
 107         case PRID_IMP_AU1_REV2:
 108 -               switch ((c->processor_id >> 24) & 0xff) {
 109 +               switch ((c->processor_id >> 24) & PRID_REV_MASK) {
 110                 case 0:
 111                         c->cputype = CPU_AU1000;
 112                         break;
 113 @@ -510,10 +510,34 @@ static inline void cpu_probe_alchemy(str
 114         }
 115  }
 116
 117 +static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
 118 +{
 119 +       decode_config1(c);
 120 +       c->options |= MIPS_CPU_PREFETCH;
 121 +       switch (c->processor_id & PRID_IMP_MASK) {
 122 +       case PRID_IMP_BCM4710:
 123 +                       c->cputype = CPU_BCM4710;
 124 +                       c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
 125 +                                                               MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
 126 +                       c->scache.flags = MIPS_CACHE_NOT_PRESENT;
 127 +                       break;
 128 +       case PRID_IMP_4KC:
 129 +       case PRID_IMP_BCM3302:
 130 +                       c->cputype = CPU_BCM3302;
 131 +                       c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
 132 +                                                               MIPS_CPU_4KTLB | MIPS_CPU_COUNTER;
 133 +                       c->scache.flags = MIPS_CACHE_NOT_PRESENT;
 134 +                       break;
 135 +       default:
 136 +                       c->cputype = CPU_UNKNOWN;
 137 +                       break;
 138 +       }
 139 +}
 140 +
 141  static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
 142  {
 143         decode_config1(c);
 144 -       switch (c->processor_id & 0xff00) {
 145 +       switch (c->processor_id & PRID_IMP_MASK) {
 146         case PRID_IMP_SB1:
 147                 c->cputype = CPU_SB1;
 148                 c->isa_level = MIPS_CPU_ISA_M64;
 149 @@ -535,7 +559,7 @@ static inline void cpu_probe_sibyte(stru
 150  static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
 151  {
 152         decode_config1(c);
 153 -       switch (c->processor_id & 0xff00) {
 154 +       switch (c->processor_id & PRID_IMP_MASK) {
 155         case PRID_IMP_SR71000:
 156                 c->cputype = CPU_SR71000;
 157                 c->isa_level = MIPS_CPU_ISA_M64;
 158 @@ -560,7 +584,7 @@ __init void cpu_probe(void)
 159         c->cputype      = CPU_UNKNOWN;
 160
 161         c->processor_id = read_c0_prid();
 162 -       switch (c->processor_id & 0xff0000) {
 163 +       switch (c->processor_id & PRID_COMP_MASK) {
 164
 165         case PRID_COMP_LEGACY:
 166                 cpu_probe_legacy(c);
 167 @@ -571,6 +595,9 @@ __init void cpu_probe(void)
 168         case PRID_COMP_ALCHEMY:
 169                 cpu_probe_alchemy(c);
 170                 break;
 171 +       case PRID_COMP_BROADCOM:
 172 +               cpu_probe_broadcom(c);
 173 +               break;
 174         case PRID_COMP_SIBYTE:
 175                 cpu_probe_sibyte(c);
 176                 break;
 177 --- a/arch/mips/kernel/head.S
 178 +++ b/arch/mips/kernel/head.S
 179 @@ -28,12 +28,20 @@
 180  #include <asm/mipsregs.h>
 181  #include <asm/stackframe.h>
 182
 183 +#ifdef CONFIG_BCM4710
 184 +#undef eret
 185 +#define eret nop; nop; eret
 186 +#endif
 187 +
 188                 .text
 189 +               j       kernel_entry
 190 +               nop
 191 +
 192                 /*
 193                  * Reserved space for exception handlers.
 194                  * Necessary for machines which link their kernels at KSEG0.
 195                  */
 196 -               .fill   0x400
 197 +               .fill   0x3f4
 198
 199                 /* The following two symbols are used for kernel profiling. */
 200                 EXPORT(stext)
 201 --- a/arch/mips/kernel/proc.c
 202 +++ b/arch/mips/kernel/proc.c
 203 @@ -78,9 +78,10 @@ static const char *cpu_name[] = {
 204         [CPU_AU1550]    "Au1550",
 205         [CPU_24K]       "MIPS 24K",
 206         [CPU_AU1200]    "Au1200",
 207 +       [CPU_BCM4710]   "BCM4710",
 208 +       [CPU_BCM3302]   "BCM3302",
 209  };
 210
 211 -
 212  static int show_cpuinfo(struct seq_file *m, void *v)
 213  {
 214         unsigned int version = current_cpu_data.processor_id;
 215 --- a/arch/mips/kernel/setup.c
 216 +++ b/arch/mips/kernel/setup.c
 217 @@ -493,6 +493,7 @@ void __init setup_arch(char **cmdline_p)
 218         void swarm_setup(void);
 219         void hp_setup(void);
 220         void au1x00_setup(void);
 221 +       void brcm_setup(void);
 222         void frame_info_init(void);
 223
 224         frame_info_init();
 225 @@ -691,6 +692,11 @@ void __init setup_arch(char **cmdline_p)
 226                  pmc_yosemite_setup();
 227                  break;
 228  #endif
 229 +#if defined(CONFIG_BCM4710) || defined(CONFIG_BCM4310)
 230 +       case MACH_GROUP_BRCM:
 231 +                       brcm_setup();
 232 +                       break;
 233 +#endif
 234         default:
 235                 panic("Unsupported architecture");
 236         }
 237 --- a/arch/mips/kernel/traps.c
 238 +++ b/arch/mips/kernel/traps.c
 239 @@ -920,6 +920,7 @@ void __init per_cpu_trap_init(void)
 240  void __init trap_init(void)
 241  {
 242         extern char except_vec1_generic;
 243 +       extern char except_vec2_generic;
 244         extern char except_vec3_generic, except_vec3_r4000;
 245         extern char except_vec_ejtag_debug;
 246         extern char except_vec4;
 247 @@ -927,6 +928,7 @@ void __init trap_init(void)
 248
 249         /* Copy the generic exception handler code to it's final destination. */
 250         memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
 251 +       memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
 252
 253         /*
 254          * Setup default vectors
 255 @@ -985,6 +987,12 @@ void __init trap_init(void)
 256         set_except_vector(13, handle_tr);
 257         set_except_vector(22, handle_mdmx);
 258
 259 +       if (current_cpu_data.cputype == CPU_SB1) {
 260 +               /* Enable timer interrupt and scd mapped interrupt */
 261 +               clear_c0_status(0xf000);
 262 +               set_c0_status(0xc00);
 263 +       }
 264 +
 265         if (cpu_has_fpu && !cpu_has_nofpuex)
 266                 set_except_vector(15, handle_fpe);
 267
 268 --- a/arch/mips/Makefile
 269 +++ b/arch/mips/Makefile
 270 @@ -726,6 +726,19 @@ LOADADDR      += 0x80020000
 271  endif
 272
 273  #
 274 +# Broadcom BCM947XX variants
 275 +#
 276 +ifdef CONFIG_BCM947XX
 277 +LIBS           += arch/mips/bcm947xx/generic/brcm.o arch/mips/bcm947xx/bcm947xx.o
 278 +SUBDIRS                += arch/mips/bcm947xx/generic arch/mips/bcm947xx
 279 +LOADADDR       := 0x80001000
 280 +
 281 +zImage: vmlinux
 282 +       $(MAKE) -C arch/$(ARCH)/bcm947xx/compressed
 283 +export LOADADDR
 284 +endif
 285 +
 286 +#
 287  # Choosing incompatible machines durings configuration will result in
 288  # error messages during linking.  Select a default linkscript if
 289  # none has been choosen above.
 290 @@ -779,6 +792,7 @@ archclean:
 291         $(MAKE) -C arch/$(ARCH)/tools clean
 292         $(MAKE) -C arch/mips/baget clean
 293         $(MAKE) -C arch/mips/lasat clean
 294 +       $(MAKE) -C arch/mips/bcm947xx/compressed clean
 295
 296  archmrproper:
 297         @$(MAKEBOOT) mrproper
 298 --- a/arch/mips/mm/c-r4k.c
 299 +++ b/arch/mips/mm/c-r4k.c
 300 @@ -1118,3 +1118,47 @@ void __init ld_mmu_r4xx0(void)
 301         build_clear_page();
 302         build_copy_page();
 303  }
 304 +
 305 +#ifdef CONFIG_BCM4704
 306 +static void __init mips32_icache_fill(unsigned long addr, uint nbytes)
 307 +{
 308 +       unsigned long ic_lsize = current_cpu_data.icache.linesz;
 309 +       int i;
 310 +       for (i = 0; i < nbytes; i += ic_lsize)
 311 +               fill_icache_line((addr + i));
 312 +}
 313 +
 314 +/*
 315 + *  This must be run from the cache on 4704A0
 316 + *  so there are no mips core BIU ops in progress
 317 + *  when the PFC is enabled.
 318 + */
 319 +#define PFC_CR0         0xff400000      /* control reg 0 */
 320 +#define PFC_CR1         0xff400004      /* control reg 1 */
 321 +static void __init enable_pfc(u32 mode)
 322 +{
 323 +       /* write range */
 324 +       *(volatile u32 *)PFC_CR1 = 0xffff0000;
 325 +
 326 +       /* enable */
 327 +       *(volatile u32 *)PFC_CR0 = mode;
 328 +}
 329 +#endif
 330 +
 331 +
 332 +void check_enable_mips_pfc(int val)
 333 +{
 334 +
 335 +#ifdef CONFIG_BCM4704
 336 +       struct cpuinfo_mips *c = &current_cpu_data;
 337 +
 338 +       /* enable prefetch cache */
 339 +       if (((c->processor_id & (PRID_COMP_MASK | PRID_IMP_MASK)) == PRID_IMP_BCM3302)
 340 +               && (read_c0_diag() & (1 << 29))) {
 341 +                       mips32_icache_fill((unsigned long) &enable_pfc, 64);
 342 +                       enable_pfc(val);
 343 +       }
 344 +#endif
 345 +}
 346 +
 347 +
 348 --- a/arch/mips/pci/Makefile
 349 +++ b/arch/mips/pci/Makefile
 350 @@ -13,7 +13,9 @@ obj-$(CONFIG_MIPS_GT64120)    += ops-gt6412
 351  obj-$(CONFIG_MIPS_MSC)         += ops-msc.o
 352  obj-$(CONFIG_MIPS_NILE4)       += ops-nile4.o
 353  obj-$(CONFIG_SNI_RM200_PCI)    += ops-sni.o
 354 +ifndef CONFIG_BCM947XX
 355  obj-y                          += pci.o
 356 +endif
 357  obj-$(CONFIG_PCI_AUTO)         += pci_auto.o
 358
 359  include $(TOPDIR)/Rules.make
 360 --- a/drivers/char/serial.c
 361 +++ b/drivers/char/serial.c
 362 @@ -444,6 +444,10 @@ static _INLINE_ unsigned int serial_in(s
 363                 return inb(info->port+1);
 364  #endif
 365         case SERIAL_IO_MEM:
 366 +#ifdef CONFIG_BCM4310
 367 +               readb((unsigned long) info->iomem_base +
 368 +                               (UART_SCR<<info->iomem_reg_shift));
 369 +#endif
 370                 return readb((unsigned long) info->iomem_base +
 371                              (offset<<info->iomem_reg_shift));
 372         default:
 373 @@ -464,6 +468,9 @@ static _INLINE_ void serial_out(struct a
 374         case SERIAL_IO_MEM:
 375                 writeb(value, (unsigned long) info->iomem_base +
 376                               (offset<<info->iomem_reg_shift));
 377 +#ifdef CONFIG_BCM4704
 378 +               *((volatile unsigned int *) KSEG1ADDR(0x18000000));
 379 +#endif
 380                 break;
 381         default:
 382                 outb(value, info->port+offset);
 383 @@ -1728,7 +1735,7 @@ static void change_speed(struct async_st
 384                         /* Special case since 134 is really 134.5 */
 385                         quot = (2*baud_base / 269);
 386                 else if (baud)
 387 -                       quot = baud_base / baud;
 388 +                       quot = (baud_base + (baud / 2)) / baud;
 389         }
 390         /* If the quotient is zero refuse the change */
 391         if (!quot && old_termios) {
 392 @@ -1745,12 +1752,12 @@ static void change_speed(struct async_st
 393                                 /* Special case since 134 is really 134.5 */
 394                                 quot = (2*baud_base / 269);
 395                         else if (baud)
 396 -                               quot = baud_base / baud;
 397 +                               quot = (baud_base + (baud / 2)) / baud;
 398                 }
 399         }
 400         /* As a last resort, if the quotient is zero, default to 9600 bps */
 401         if (!quot)
 402 -               quot = baud_base / 9600;
 403 +               quot = (baud_base + 4800) / 9600;
 404         /*
 405          * Work around a bug in the Oxford Semiconductor 952 rev B
 406          * chip which causes it to seriously miscalculate baud rates
 407 @@ -5994,6 +6001,13 @@ static int __init serial_console_setup(s
 408          *      Divisor, bytesize and parity
 409          */
 410         state = rs_table + co->index;
 411 +       /*
 412 +        * Safe guard: state structure must have been initialized
 413 +        */
 414 +       if (state->iomem_base == NULL) {
 415 +               printk("!unable to setup serial console!\n");
 416 +               return -1;
 417 +       }
 418         if (doflow)
 419                 state->flags |= ASYNC_CONS_FLOW;
 420         info = &async_sercons;
 421 @@ -6007,7 +6021,7 @@ static int __init serial_console_setup(s
 422         info->io_type = state->io_type;
 423         info->iomem_base = state->iomem_base;
 424         info->iomem_reg_shift = state->iomem_reg_shift;
 425 -       quot = state->baud_base / baud;
 426 +       quot = (state->baud_base + (baud / 2)) / baud;
 427         cval = cflag & (CSIZE | CSTOPB);
 428  #if defined(__powerpc__) || defined(__alpha__)
 429         cval >>= 8;
 430 --- a/drivers/net/Makefile
 431 +++ b/drivers/net/Makefile
 432 @@ -3,6 +3,8 @@
 433  # Makefile for the Linux network (ethercard) device drivers.
 434  #
 435
 436 +EXTRA_CFLAGS := -I$(TOPDIR)/arch/mips/bcm947xx/include
 437 +
 438  obj-y           :=
 439  obj-m           :=
 440  obj-n           :=
 441 --- a/drivers/parport/Config.in
 442 +++ b/drivers/parport/Config.in
 443 @@ -11,6 +11,7 @@ comment 'Parallel port support'
 444  tristate 'Parallel port support' CONFIG_PARPORT
 445  if [ "$CONFIG_PARPORT" != "n" ]; then
 446     dep_tristate '  PC-style hardware' CONFIG_PARPORT_PC $CONFIG_PARPORT
 447 +   dep_tristate '  Asus WL500g parallel port' CONFIG_PARPORT_SPLINK $CONFIG_PARPORT
 448     if [ "$CONFIG_PARPORT_PC" != "n" -a "$CONFIG_SERIAL" != "n" ]; then
 449        if [ "$CONFIG_SERIAL" = "m" ]; then
 450           define_tristate CONFIG_PARPORT_PC_CML1 m
 451 --- a/drivers/parport/Makefile
 452 +++ b/drivers/parport/Makefile
 453 @@ -22,6 +22,7 @@ endif
 454
 455  obj-$(CONFIG_PARPORT)          += parport.o
 456  obj-$(CONFIG_PARPORT_PC)       += parport_pc.o
 457 +obj-$(CONFIG_PARPORT_SPLINK)   += parport_splink.o
 458  obj-$(CONFIG_PARPORT_PC_PCMCIA)        += parport_cs.o
 459  obj-$(CONFIG_PARPORT_AMIGA)    += parport_amiga.o
 460  obj-$(CONFIG_PARPORT_MFC3)     += parport_mfc3.o
 461 --- a/include/asm-mips/bootinfo.h
 462 +++ b/include/asm-mips/bootinfo.h
 463 @@ -37,6 +37,7 @@
 464  #define MACH_GROUP_HP_LJ       20 /* Hewlett Packard LaserJet               */
 465  #define MACH_GROUP_LASAT       21
 466  #define MACH_GROUP_TITAN       22 /* PMC-Sierra Titan                      */
 467 +#define MACH_GROUP_BRCM                   23 /* Broadcom */
 468
 469  /*
 470   * Valid machtype values for group unknown (low order halfword of mips_machtype)
 471 @@ -197,6 +198,15 @@
 472  #define MACH_TANBAC_TB0229     7       /* TANBAC TB0229 (VR4131DIMM) */
 473
 474  /*
 475 + * Valid machtypes for group Broadcom
 476 + */
 477 +#define MACH_BCM93725          0
 478 +#define MACH_BCM93725_VJ       1
 479 +#define MACH_BCM93730          2
 480 +#define MACH_BCM947XX          3
 481 +#define MACH_BCM933XX          4
 482 +
 483 +/*
 484   * Valid machtype for group TITAN
 485   */
 486  #define        MACH_TITAN_YOSEMITE     1       /* PMC-Sierra Yosemite */
 487 --- a/include/asm-mips/cpu.h
 488 +++ b/include/asm-mips/cpu.h
 489 @@ -22,6 +22,11 @@
 490     spec.
 491  */
 492
 493 +#define PRID_COPT_MASK         0xff000000
 494 +#define PRID_COMP_MASK         0x00ff0000
 495 +#define PRID_IMP_MASK          0x0000ff00
 496 +#define PRID_REV_MASK          0x000000ff
 497 +
 498  #define PRID_COMP_LEGACY       0x000000
 499  #define PRID_COMP_MIPS         0x010000
 500  #define PRID_COMP_BROADCOM     0x020000
 501 @@ -58,6 +63,7 @@
 502  #define PRID_IMP_RM7000                0x2700
 503  #define PRID_IMP_NEVADA                0x2800          /* RM5260 ??? */
 504  #define PRID_IMP_RM9000                0x3400
 505 +#define PRID_IMP_BCM4710       0x4000
 506  #define PRID_IMP_R5432         0x5400
 507  #define PRID_IMP_R5500         0x5500
 508  #define PRID_IMP_4KC           0x8000
 509 @@ -66,10 +72,16 @@
 510  #define PRID_IMP_4KEC          0x8400
 511  #define PRID_IMP_4KSC          0x8600
 512  #define PRID_IMP_25KF          0x8800
 513 +#define PRID_IMP_BCM3302       0x9000
 514 +#define PRID_IMP_BCM3303       0x9100
 515  #define PRID_IMP_24K           0x9300
 516
 517  #define PRID_IMP_UNKNOWN       0xff00
 518
 519 +#define       BCM330X(id) \
 520 +       (((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3302)) \
 521 +       || ((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3303)))
 522 +
 523  /*
 524   * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
 525   */
 526 @@ -174,7 +186,9 @@
 527  #define CPU_AU1550             57
 528  #define CPU_24K                        58
 529  #define CPU_AU1200             59
 530 -#define CPU_LAST               59
 531 +#define CPU_BCM4710            60
 532 +#define CPU_BCM3302            61
 533 +#define CPU_LAST               61
 534
 535  /*
 536   * ISA Level encodings
 537 --- a/include/asm-mips/r4kcache.h
 538 +++ b/include/asm-mips/r4kcache.h
 539 @@ -567,4 +567,17 @@ static inline void blast_scache128_page_
 540                         cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
 541  }
 542
 543 +extern inline void fill_icache_line(unsigned long addr)
 544 +{
 545 +       __asm__ __volatile__(
 546 +               ".set noreorder\n\t"
 547 +               ".set mips3\n\t"
 548 +               "cache %1, (%0)\n\t"
 549 +               ".set mips0\n\t"
 550 +               ".set reorder"
 551 +               :
 552 +               : "r" (addr),
 553 +               "i" (Fill));
 554 +}
 555 +
 556  #endif /* __ASM_R4KCACHE_H */
 557 --- a/include/asm-mips/serial.h
 558 +++ b/include/asm-mips/serial.h
 559 @@ -223,6 +223,13 @@
 560  #define TXX927_SERIAL_PORT_DEFNS
 561  #endif
 562
 563 +#ifdef CONFIG_BCM947XX
 564 +/* reserve 4 ports to be configured at runtime */
 565 +#define BCM947XX_SERIAL_PORT_DEFNS { 0, }, { 0, }, { 0, }, { 0, },
 566 +#else
 567 +#define BCM947XX_SERIAL_PORT_DEFNS
 568 +#endif
 569 +
 570  #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
 571  #define STD_SERIAL_PORT_DEFNS                  \
 572         /* UART CLK   PORT IRQ     FLAGS        */                      \
 573 @@ -470,6 +477,7 @@
 574  #define SERIAL_PORT_DFNS                       \
 575         ATLAS_SERIAL_PORT_DEFNS                 \
 576         AU1000_SERIAL_PORT_DEFNS                \
 577 +       BCM947XX_SERIAL_PORT_DEFNS              \
 578         COBALT_SERIAL_PORT_DEFNS                \
 579         DDB5477_SERIAL_PORT_DEFNS               \
 580         EV96100_SERIAL_PORT_DEFNS               \
 581 --- a/init/do_mounts.c
 582 +++ b/init/do_mounts.c
 583 @@ -255,7 +255,13 @@ static struct dev_name_struct {
 584         { "ftlb", 0x2c08 },
 585         { "ftlc", 0x2c10 },
 586         { "ftld", 0x2c18 },
 587 +#if defined(CONFIG_MTD_BLOCK) || defined(CONFIG_MTD_BLOCK_RO)
 588         { "mtdblock", 0x1f00 },
 589 +       { "mtdblock0",0x1f00 },
 590 +       { "mtdblock1",0x1f01 },
 591 +       { "mtdblock2",0x1f02 },
 592 +       { "mtdblock3",0x1f03 },
 593 +#endif
 594         { "nb", 0x2b00 },
 595         { NULL, 0 }
 596  };