bcm53xx: add support for the PCIe controller
[openwrt.git] / target / linux / bcm53xx / patches-3.14 / 130-ARM-BCM5301X-register-bcma-bus.patch
1 From 23bcd5e7cb2aaee48ba8b2351f032a230d948b6f Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 25 Jan 2014 17:03:07 +0100
4 Subject: [PATCH 08/15] ARM: BCM5301X: register bcma bus
5
6 ---
7  arch/arm/boot/dts/bcm4708.dtsi | 58 ++++++++++++++++++++++++++++++++++++++++++
8  1 file changed, 58 insertions(+)
9
10 --- a/arch/arm/boot/dts/bcm4708.dtsi
11 +++ b/arch/arm/boot/dts/bcm4708.dtsi
12 @@ -31,4 +31,62 @@
13                 };
14         };
15  
16 +       nvram0: nvram@0 {
17 +               compatible = "brcm,bcm47xx-nvram";
18 +               reg = <0x1c000000 0x01000000>;
19 +       };
20 +
21 +       sprom0: sprom@0 {
22 +               compatible = "brcm,bcm53xx-sprom";
23 +               nvram = <&nvram0>;
24 +       };
25 +
26 +       aix@18000000 {
27 +               compatible = "brcm,bus-aix";
28 +               reg = <0x18000000 0x1000>;
29 +               ranges = <0x00000000 0x18000000 0x00100000>;
30 +               #address-cells = <1>;
31 +               #size-cells = <1>;
32 +               sprom = <&sprom0>;
33 +
34 +               usb2@0 {
35 +                       reg = <0x18021000 0x1000>;
36 +                       interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
37 +               };
38 +
39 +               usb3@0 {
40 +                       reg = <0x18023000 0x1000>;
41 +                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
42 +               };
43 +
44 +               gmac@0 {
45 +                       reg = <0x18024000 0x1000>;
46 +                       interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
47 +               };
48 +
49 +               gmac@1 {
50 +                       reg = <0x18025000 0x1000>;
51 +                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
52 +               };
53 +
54 +               gmac@2 {
55 +                       reg = <0x18026000 0x1000>;
56 +                       interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
57 +               };
58 +
59 +               gmac@3 {
60 +                       reg = <0x18027000 0x1000>;
61 +                       interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
62 +               };
63 +
64 +               pcie@0 {
65 +                       reg = <0x18012000 0x1000>;
66 +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
67 +               };
68 +
69 +               pcie@1 {
70 +                       reg = <0x18013000 0x1000>;
71 +                       interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
72 +               };
73 +       };
74  };