bcm53xx: update patches adding bcma support
[openwrt.git] / target / linux / bcm53xx / patches-3.14 / 130-ARM-BCM5301X-register-bcma-bus.patch
1 From 414f0ad9b3a8e8ee6eaf09c6d79d5f448ac28630 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 25 Jan 2014 17:03:07 +0100
4 Subject: [PATCH 07/17] ARM: BCM5301X: register bcma bus
5
6 ---
7  arch/arm/boot/dts/bcm4708.dtsi | 58 ++++++++++++++++++++++++++++++++++++++++++
8  1 file changed, 58 insertions(+)
9
10 --- a/arch/arm/boot/dts/bcm5301x.dtsi
11 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
12 @@ -92,4 +92,100 @@
13                         clock-frequency = <400000000>;
14                 };
15         };
16 +
17 +       nvram0: nvram@1c000000 {
18 +               compatible = "brcm,bcm47xx-nvram";
19 +               reg = <0x1c000000 0x01000000>;
20 +       };
21 +
22 +       sprom0: sprom@0 {
23 +               compatible = "brcm,bcm47xx-sprom";
24 +               nvram = <&nvram0>;
25 +       };
26 +
27 +       axi@18000000 {
28 +               compatible = "brcm,bus-axi";
29 +               reg = <0x18000000 0x1000>;
30 +               ranges = <0x00000000 0x18000000 0x00100000>;
31 +               #address-cells = <1>;
32 +               #size-cells = <1>;
33 +               sprom = <&sprom0>;
34 +
35 +               chipcommon@0 {
36 +                       reg = <0x00000000 0x1000>;
37 +                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
38 +               };
39 +
40 +               pcie@12000 {
41 +                       reg = <0x00012000 0x1000>;
42 +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
43 +                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
44 +                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
45 +                                    <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
46 +                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
47 +                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
48 +               };
49 +
50 +               pcie@13000 {
51 +                       reg = <0x00013000 0x1000>;
52 +                       interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
53 +                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
54 +                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
55 +                                    <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
56 +                                    <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
57 +                                    <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
58 +               };
59 +
60 +               pcie@14000 {
61 +                       reg = <0x00014000 0x1000>;
62 +                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
63 +                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
64 +                                    <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
65 +                                    <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
66 +                                    <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
67 +                                    <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
68 +               };
69 +
70 +               usb2@21000 {
71 +                       reg = <0x00021000 0x1000>;
72 +                       interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
73 +               };
74 +
75 +               usb3@23000 {
76 +                       reg = <0x00023000 0x1000>;
77 +                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
78 +               };
79 +
80 +               ethernet@24000 {
81 +                       reg = <0x00024000 0x1000>;
82 +                       interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
83 +               };
84 +
85 +               ethernet@25000 {
86 +                       reg = <0x00025000 0x1000>;
87 +                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
88 +               };
89 +
90 +               ethernet@26000 {
91 +                       reg = <0x00026000 0x1000>;
92 +                       interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
93 +               };
94 +
95 +               ethernet@27000 {
96 +                       reg = <0x00027000 0x1000>;
97 +                       interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
98 +               };
99 +
100 +               nand@28000 {
101 +                       reg = <0x00028000 0x1000>;
102 +                       interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
103 +                                    <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
104 +                                    <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
105 +                                    <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
106 +                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
107 +                                    <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
108 +                                    <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
109 +                                    <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
110 +               };
111 +       };
112  };