[kernel] refresh 2.6.26 patches
[openwrt.git] / target / linux / atheros / patches-2.6.26 / 100-board.patch
1 --- a/arch/mips/Kconfig
2 +++ b/arch/mips/Kconfig
3 @@ -59,6 +59,18 @@ config BCM47XX
4         help
5          Support for BCM47XX based boards
6  
7 +config ATHEROS
8 +       bool "Atheros SoC support (EXPERIMENTAL)"
9 +       depends on EXPERIMENTAL
10 +       select DMA_NONCOHERENT
11 +       select CEVT_R4K
12 +       select CSRC_R4K
13 +       select IRQ_CPU
14 +       select SYS_HAS_CPU_MIPS32_R1
15 +       select SYS_SUPPORTS_BIG_ENDIAN
16 +       select SYS_SUPPORTS_32BIT_KERNEL
17 +       select GENERIC_GPIO
18 +
19  config MIPS_COBALT
20         bool "Cobalt Server"
21         select CEVT_R4K
22 @@ -687,6 +699,7 @@ config WR_PPMC
23  
24  endchoice
25  
26 +source "arch/mips/atheros/Kconfig"
27  source "arch/mips/au1000/Kconfig"
28  source "arch/mips/basler/excite/Kconfig"
29  source "arch/mips/jazz/Kconfig"
30 --- a/arch/mips/Makefile
31 +++ b/arch/mips/Makefile
32 @@ -276,6 +276,13 @@ libs-$(CONFIG_MIPS_XXS1500)        += arch/mips
33  load-$(CONFIG_MIPS_XXS1500)    += 0xffffffff80100000
34  
35  #
36 +# Atheros AR5312/AR2312 WiSoC
37 +#
38 +core-$(CONFIG_ATHEROS)         += arch/mips/atheros/
39 +cflags-$(CONFIG_ATHEROS)       += -Iinclude/asm-mips/mach-atheros
40 +load-$(CONFIG_ATHEROS)         += 0xffffffff80041000
41 +
42 +#
43  # Cobalt Server
44  #
45  core-$(CONFIG_MIPS_COBALT)     += arch/mips/cobalt/
46 --- a/include/asm-mips/bootinfo.h
47 +++ b/include/asm-mips/bootinfo.h
48 @@ -94,6 +94,18 @@
49  #define MACH_MSP7120_FPGA       5      /* PMC-Sierra MSP7120 Emulation */
50  #define MACH_MSP_OTHER        255      /* PMC-Sierra unknown board type */
51  
52 +/*
53 + * Valid machtype for group ATHEROS
54 + */
55 +#define MACH_GROUP_ATHEROS     26
56 +#define MACH_ATHEROS_AR5312    0
57 +#define MACH_ATHEROS_AR2312    1
58 +#define MACH_ATHEROS_AR2313    2
59 +#define MACH_ATHEROS_AR2315    3
60 +#define MACH_ATHEROS_AR2316    4
61 +#define MACH_ATHEROS_AR2317    5
62 +#define MACH_ATHEROS_AR2318    6
63 +
64  #define CL_SIZE                        COMMAND_LINE_SIZE
65  
66  extern char *system_type;