strip the kernel version suffix from target directories, except for brcm-2.4 (the...
[openwrt.git] / target / linux / atheros / files / drivers / mtd / devices / spiflash.h
1 /*
2  * SPI Flash Memory support header file.
3  *
4  * $Id: //depot/sw/releases/linuxsrc/src/kernels/mips-linux-2.4.25/drivers/mtd/devices/spiflash.h#3 $
5  *
6  *
7  * Copyright (c) 2005, Atheros Communications Inc.
8  * Copyright (C) 2006 FON Technology, SL.
9  * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
10  *
11  * This code is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  */
16 #define FLASH_1MB  1
17 #define FLASH_2MB  2
18 #define FLASH_4MB  3
19 #define FLASH_8MB  4
20 #define FLASH_16MB 5
21 #define MAX_FLASH  6
22
23 #define STM_PAGE_SIZE           256
24
25 #define SFI_WRITE_BUFFER_SIZE   4
26 #define SFI_FLASH_ADDR_MASK     0x00ffffff
27
28 #define STM_8MBIT_SIGNATURE     0x13
29 #define STM_M25P80_BYTE_COUNT   1048576
30 #define STM_M25P80_SECTOR_COUNT 16
31 #define STM_M25P80_SECTOR_SIZE  0x10000
32
33 #define STM_16MBIT_SIGNATURE    0x14
34 #define STM_M25P16_BYTE_COUNT   2097152
35 #define STM_M25P16_SECTOR_COUNT 32
36 #define STM_M25P16_SECTOR_SIZE  0x10000
37
38 #define STM_32MBIT_SIGNATURE    0x15
39 #define STM_M25P32_BYTE_COUNT   4194304
40 #define STM_M25P32_SECTOR_COUNT 64
41 #define STM_M25P32_SECTOR_SIZE  0x10000
42
43 #define STM_64MBIT_SIGNATURE    0x16
44 #define STM_M25P64_BYTE_COUNT   8388608
45 #define STM_M25P64_SECTOR_COUNT 128
46 #define STM_M25P64_SECTOR_SIZE  0x10000
47
48 #define STM_128MBIT_SIGNATURE   0x17
49 #define STM_M25P128_BYTE_COUNT   16777216
50 #define STM_M25P128_SECTOR_COUNT 256
51 #define STM_M25P128_SECTOR_SIZE  0x10000
52
53 #define STM_1MB_BYTE_COUNT   STM_M25P80_BYTE_COUNT
54 #define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
55 #define STM_1MB_SECTOR_SIZE  STM_M25P80_SECTOR_SIZE
56 #define STM_2MB_BYTE_COUNT   STM_M25P16_BYTE_COUNT
57 #define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
58 #define STM_2MB_SECTOR_SIZE  STM_M25P16_SECTOR_SIZE
59 #define STM_4MB_BYTE_COUNT   STM_M25P32_BYTE_COUNT
60 #define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
61 #define STM_4MB_SECTOR_SIZE  STM_M25P32_SECTOR_SIZE
62 #define STM_8MB_BYTE_COUNT   STM_M25P64_BYTE_COUNT
63 #define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
64 #define STM_8MB_SECTOR_SIZE  STM_M25P64_SECTOR_SIZE
65 #define STM_16MB_BYTE_COUNT   STM_M25P128_BYTE_COUNT
66 #define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
67 #define STM_16MB_SECTOR_SIZE  STM_M25P128_SECTOR_SIZE
68
69 /*
70  * ST Microelectronics Opcodes for Serial Flash
71  */
72
73 #define STM_OP_WR_ENABLE       0x06     /* Write Enable */
74 #define STM_OP_WR_DISABLE      0x04     /* Write Disable */
75 #define STM_OP_RD_STATUS       0x05     /* Read Status */
76 #define STM_OP_WR_STATUS       0x01     /* Write Status */
77 #define STM_OP_RD_DATA         0x03     /* Read Data */
78 #define STM_OP_FAST_RD_DATA    0x0b     /* Fast Read Data */
79 #define STM_OP_PAGE_PGRM       0x02     /* Page Program */
80 #define STM_OP_SECTOR_ERASE    0xd8     /* Sector Erase */
81 #define STM_OP_BULK_ERASE      0xc7     /* Bulk Erase */
82 #define STM_OP_DEEP_PWRDOWN    0xb9     /* Deep Power-Down Mode */
83 #define STM_OP_RD_SIG          0xab     /* Read Electronic Signature */
84
85 #define STM_STATUS_WIP       0x01       /* Write-In-Progress */
86 #define STM_STATUS_WEL       0x02       /* Write Enable Latch */
87 #define STM_STATUS_BP0       0x04       /* Block Protect 0 */
88 #define STM_STATUS_BP1       0x08       /* Block Protect 1 */
89 #define STM_STATUS_BP2       0x10       /* Block Protect 2 */
90 #define STM_STATUS_SRWD      0x80       /* Status Register Write Disable */
91
92 /*
93  * SPI Flash Interface Registers
94  */
95 #define AR531XPLUS_SPI_READ     0x08000000
96 #define AR531XPLUS_SPI_MMR      0x11300000
97 #define AR531XPLUS_SPI_MMR_SIZE 12
98
99 #define AR531XPLUS_SPI_CTL      0x00
100 #define AR531XPLUS_SPI_OPCODE   0x04
101 #define AR531XPLUS_SPI_DATA     0x08
102
103 #define SPI_FLASH_READ          AR531XPLUS_SPI_READ
104 #define SPI_FLASH_MMR           AR531XPLUS_SPI_MMR
105 #define SPI_FLASH_MMR_SIZE      AR531XPLUS_SPI_MMR_SIZE
106 #define SPI_FLASH_CTL           AR531XPLUS_SPI_CTL
107 #define SPI_FLASH_OPCODE        AR531XPLUS_SPI_OPCODE
108 #define SPI_FLASH_DATA          AR531XPLUS_SPI_DATA
109
110 #define SPI_CTL_START           0x00000100
111 #define SPI_CTL_BUSY            0x00010000
112 #define SPI_CTL_TXCNT_MASK      0x0000000f
113 #define SPI_CTL_RXCNT_MASK      0x000000f0
114 #define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
115 #define SPI_CTL_SIZE_MASK       0x00060000
116
117 #define SPI_CTL_CLK_SEL_MASK    0x03000000
118 #define SPI_OPCODE_MASK         0x000000ff
119
120 #define SPI_STATUS_WIP          STM_STATUS_WIP