1 From 1dece618b107f5db28c8f63d4d32424dd18324d1 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Mon, 4 Feb 2013 11:56:53 +0100
4 Subject: [PATCH] MIPS: ath79: move global PCI defines into a common header
6 commit ad4ce92e919f7ad5561a2060deb58899de58b40c upstream.
8 The constants will be used by a subsequent patch.
10 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
11 Patchwork: http://patchwork.linux-mips.org/patch/4907/
12 Signed-off-by: John Crispin <blogic@openwrt.org>
14 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 24 ++++++++++++++++++++++++
15 arch/mips/pci/pci-ar71xx.c | 16 ----------------
16 arch/mips/pci/pci-ar724x.c | 8 --------
17 3 files changed, 24 insertions(+), 24 deletions(-)
19 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
20 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
22 #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
23 #define AR71XX_RESET_SIZE 0x100
25 +#define AR71XX_PCI_MEM_BASE 0x10000000
26 +#define AR71XX_PCI_MEM_SIZE 0x07000000
28 +#define AR71XX_PCI_WIN0_OFFS 0x10000000
29 +#define AR71XX_PCI_WIN1_OFFS 0x11000000
30 +#define AR71XX_PCI_WIN2_OFFS 0x12000000
31 +#define AR71XX_PCI_WIN3_OFFS 0x13000000
32 +#define AR71XX_PCI_WIN4_OFFS 0x14000000
33 +#define AR71XX_PCI_WIN5_OFFS 0x15000000
34 +#define AR71XX_PCI_WIN6_OFFS 0x16000000
35 +#define AR71XX_PCI_WIN7_OFFS 0x07000000
37 +#define AR71XX_PCI_CFG_BASE \
38 + (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
39 +#define AR71XX_PCI_CFG_SIZE 0x100
41 #define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
42 #define AR7240_USB_CTRL_SIZE 0x100
43 #define AR7240_OHCI_BASE 0x1b000000
44 #define AR7240_OHCI_SIZE 0x1000
46 +#define AR724X_PCI_MEM_BASE 0x10000000
47 +#define AR724X_PCI_MEM_SIZE 0x04000000
49 +#define AR724X_PCI_CFG_BASE 0x14000000
50 +#define AR724X_PCI_CFG_SIZE 0x1000
51 +#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
52 +#define AR724X_PCI_CTRL_SIZE 0x100
54 #define AR724X_EHCI_BASE 0x1b000000
55 #define AR724X_EHCI_SIZE 0x1000
57 --- a/arch/mips/pci/pci-ar71xx.c
58 +++ b/arch/mips/pci/pci-ar71xx.c
60 #include <asm/mach-ath79/ath79.h>
61 #include <asm/mach-ath79/pci.h>
63 -#define AR71XX_PCI_MEM_BASE 0x10000000
64 -#define AR71XX_PCI_MEM_SIZE 0x07000000
66 -#define AR71XX_PCI_WIN0_OFFS 0x10000000
67 -#define AR71XX_PCI_WIN1_OFFS 0x11000000
68 -#define AR71XX_PCI_WIN2_OFFS 0x12000000
69 -#define AR71XX_PCI_WIN3_OFFS 0x13000000
70 -#define AR71XX_PCI_WIN4_OFFS 0x14000000
71 -#define AR71XX_PCI_WIN5_OFFS 0x15000000
72 -#define AR71XX_PCI_WIN6_OFFS 0x16000000
73 -#define AR71XX_PCI_WIN7_OFFS 0x07000000
75 -#define AR71XX_PCI_CFG_BASE \
76 - (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
77 -#define AR71XX_PCI_CFG_SIZE 0x100
79 #define AR71XX_PCI_REG_CRP_AD_CBE 0x00
80 #define AR71XX_PCI_REG_CRP_WRDATA 0x04
81 #define AR71XX_PCI_REG_CRP_RDDATA 0x08
82 --- a/arch/mips/pci/pci-ar724x.c
83 +++ b/arch/mips/pci/pci-ar724x.c
85 #include <asm/mach-ath79/ar71xx_regs.h>
86 #include <asm/mach-ath79/pci.h>
88 -#define AR724X_PCI_CFG_BASE 0x14000000
89 -#define AR724X_PCI_CFG_SIZE 0x1000
90 -#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
91 -#define AR724X_PCI_CTRL_SIZE 0x100
93 -#define AR724X_PCI_MEM_BASE 0x10000000
94 -#define AR724X_PCI_MEM_SIZE 0x04000000
96 #define AR724X_PCI_REG_RESET 0x18
97 #define AR724X_PCI_REG_INT_STATUS 0x4c
98 #define AR724X_PCI_REG_INT_MASK 0x50