1 --- a/arch/mips/ath79/irq.c
2 +++ b/arch/mips/ath79/irq.c
3 @@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsig
4 pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
5 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
7 - if (pending & MISC_INT_UART)
8 - generic_handle_irq(ATH79_MISC_IRQ_UART);
10 - else if (pending & MISC_INT_DMA)
11 - generic_handle_irq(ATH79_MISC_IRQ_DMA);
13 - else if (pending & MISC_INT_PERFC)
14 - generic_handle_irq(ATH79_MISC_IRQ_PERFC);
16 - else if (pending & MISC_INT_TIMER)
17 - generic_handle_irq(ATH79_MISC_IRQ_TIMER);
19 - else if (pending & MISC_INT_TIMER2)
20 - generic_handle_irq(ATH79_MISC_IRQ_TIMER2);
22 - else if (pending & MISC_INT_TIMER3)
23 - generic_handle_irq(ATH79_MISC_IRQ_TIMER3);
25 - else if (pending & MISC_INT_TIMER4)
26 - generic_handle_irq(ATH79_MISC_IRQ_TIMER4);
28 - else if (pending & MISC_INT_OHCI)
29 - generic_handle_irq(ATH79_MISC_IRQ_OHCI);
31 - else if (pending & MISC_INT_ERROR)
32 - generic_handle_irq(ATH79_MISC_IRQ_ERROR);
34 - else if (pending & MISC_INT_GPIO)
35 - generic_handle_irq(ATH79_MISC_IRQ_GPIO);
37 - else if (pending & MISC_INT_WDOG)
38 - generic_handle_irq(ATH79_MISC_IRQ_WDOG);
40 + spurious_interrupt();
44 - else if (pending & MISC_INT_ETHSW)
45 - generic_handle_irq(ATH79_MISC_IRQ_ETHSW);
47 + int bit = __ffs(pending);
50 - spurious_interrupt();
51 + generic_handle_irq(ATH79_MISC_IRQ(bit));
52 + pending &= ~BIT(bit);
56 static void ar71xx_misc_irq_unmask(struct irq_data *d)
57 --- a/arch/mips/include/asm/mach-ath79/irq.h
58 +++ b/arch/mips/include/asm/mach-ath79/irq.h
61 #define ATH79_MISC_IRQ_BASE 8
62 #define ATH79_MISC_IRQ_COUNT 32
63 +#define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x))
65 #define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
66 #define ATH79_PCI_IRQ_COUNT 6