2 * D-Link DIR-615 rev. E4 board support
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
15 #include <asm/mach-ath79/ath79.h>
17 #include "dev-ap9x-pci.h"
19 #include "dev-gpio-buttons.h"
20 #include "dev-leds-gpio.h"
21 #include "dev-m25p80.h"
22 #include "machtypes.h"
25 #define DIR_615_E4_GPIO_LED_WPS 0
26 #define DIR_615_E4_GPIO_LED_POWER_AMBER 1
27 #define DIR_615_E4_GPIO_LED_POWER_GREEN 6
28 #define DIR_615_E4_GPIO_LED_WAN_AMBER 7
29 #define DIR_615_E4_GPIO_LED_WAN_GREEN 17
30 #define DIR_615_E4_GPIO_LED_LAN1_GREEN 13
31 #define DIR_615_E4_GPIO_LED_LAN2_GREEN 14
32 #define DIR_615_E4_GPIO_LED_LAN3_GREEN 15
33 #define DIR_615_E4_GPIO_LED_LAN4_GREEN 16
35 #define DIR_615_E4_GPIO_BTN_RESET 8
36 #define DIR_615_E4_GPIO_BTN_WPS 12
38 #define DIR_615_E4_KEYS_POLL_INTERVAL 20
39 #define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
41 #define DIR_615_E4_NVRAM_ADDR 0x1f030000
42 #define DIR_615_E4_NVRAM_SIZE 0x10000
44 static struct mtd_partition dir_615_e4_partitions[] = {
49 .mask_flags = MTD_WRITEABLE,
66 .mask_flags = MTD_WRITEABLE,
71 .mask_flags = MTD_WRITEABLE,
79 static struct flash_platform_data dir_615_e4_flash_data = {
80 .parts = dir_615_e4_partitions,
81 .nr_parts = ARRAY_SIZE(dir_615_e4_partitions),
85 static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
87 .name = "dir-615-e4:green:power",
88 .gpio = DIR_615_E4_GPIO_LED_POWER_GREEN,
90 .name = "dir-615-e4:amber:power",
91 .gpio = DIR_615_E4_GPIO_LED_POWER_AMBER,
93 .name = "dir-615-e4:green:wan",
94 .gpio = DIR_615_E4_GPIO_LED_WAN_GREEN,
97 .name = "dir-615-e4:amber:wan",
98 .gpio = DIR_615_E4_GPIO_LED_WAN_AMBER,
100 .name = "dir-615-e4:green:lan1",
101 .gpio = DIR_615_E4_GPIO_LED_LAN1_GREEN,
104 .name = "dir-615-e4:green:lan2",
105 .gpio = DIR_615_E4_GPIO_LED_LAN2_GREEN,
108 .name = "dir-615-e4:green:lan3",
109 .gpio = DIR_615_E4_GPIO_LED_LAN3_GREEN,
112 .name = "dir-615-e4:green:lan4",
113 .gpio = DIR_615_E4_GPIO_LED_LAN4_GREEN,
116 .name = "dir-615-e4:blue:wps",
117 .gpio = DIR_615_E4_GPIO_LED_WPS,
122 static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
127 .debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
128 .gpio = DIR_615_E4_GPIO_BTN_RESET,
133 .code = KEY_WPS_BUTTON,
134 .debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
135 .gpio = DIR_615_E4_GPIO_BTN_WPS,
140 static void __init dir_615_e4_setup(void)
142 const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
143 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
147 if (ath79_nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
148 "lan_mac=", mac_buff) == 0) {
149 ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
150 ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
154 ath79_register_m25p80(&dir_615_e4_flash_data);
156 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
157 dir_615_e4_leds_gpio);
159 ath79_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
160 ARRAY_SIZE(dir_615_e4_gpio_keys),
161 dir_615_e4_gpio_keys);
163 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
164 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
166 ath79_register_mdio(0, 0x0);
169 ath79_register_eth(1);
172 ath79_register_eth(0);
174 ap9x_pci_setup_wmac_led_pin(0, 1);
175 ap91_pci_init(ee, mac);
178 MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",