2 * Atheros AR71xx SPI Controller driver
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/spinlock.h>
17 #include <linux/workqueue.h>
18 #include <linux/platform_device.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
22 #include <linux/bitops.h>
24 #include <asm/mach-ar71xx/ar71xx.h>
25 #include <asm/mach-ar71xx/platform.h>
27 #define DRV_DESC "Atheros AR71xx SPI Controller driver"
28 #define DRV_VERSION "0.2.4"
29 #define DRV_NAME "ar71xx-spi"
34 struct spi_bitbang bitbang;
40 struct platform_device *pdev;
41 u32 (*get_ioc_base)(u8 chip_select, int cs_high,
45 static inline u32 ar71xx_spi_rr(struct ar71xx_spi *sp, unsigned reg)
47 return __raw_readl(sp->base + reg);
50 static inline void ar71xx_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
52 __raw_writel(val, sp->base + reg);
55 static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
57 return spi_master_get_devdata(spi->master);
60 static u32 ar71xx_spi_get_ioc_base(u8 chip_select, int cs_high, int is_on)
64 if (is_on == AR71XX_SPI_CS_INACTIVE)
67 ret = SPI_IOC_CS_ALL & ~SPI_IOC_CS(chip_select);
72 static void ar71xx_spi_chipselect(struct spi_device *spi, int value)
74 struct ar71xx_spi *sp = spidev_to_sp(spi);
75 void __iomem *base = sp->base;
79 case BITBANG_CS_INACTIVE:
80 ioc_base = sp->get_ioc_base(spi->chip_select,
81 (spi->mode & SPI_CS_HIGH) != 0,
82 AR71XX_SPI_CS_INACTIVE);
83 __raw_writel(ioc_base, base + SPI_REG_IOC);
86 case BITBANG_CS_ACTIVE:
87 ioc_base = sp->get_ioc_base(spi->chip_select,
88 (spi->mode & SPI_CS_HIGH) != 0,
89 AR71XX_SPI_CS_ACTIVE);
91 __raw_writel(ioc_base, base + SPI_REG_IOC);
92 sp->ioc_base = ioc_base;
97 static void ar71xx_spi_setup_regs(struct ar71xx_spi *sp)
99 /* enable GPIO mode */
100 ar71xx_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
102 /* save CTRL register */
103 sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_CTRL);
105 /* TODO: setup speed? */
106 ar71xx_spi_wr(sp, SPI_REG_CTRL, 0x43);
109 static void ar71xx_spi_restore_regs(struct ar71xx_spi *sp)
111 /* restore CTRL register */
112 ar71xx_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
113 /* disable GPIO mode */
114 ar71xx_spi_wr(sp, SPI_REG_FS, 0);
117 static int ar71xx_spi_setup(struct spi_device *spi)
119 if (spi->bits_per_word > 32)
122 return spi_bitbang_setup(spi);
125 static void ar71xx_spi_cleanup(struct spi_device *spi)
127 spi_bitbang_cleanup(spi);
130 static u32 ar71xx_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
133 struct ar71xx_spi *sp = spidev_to_sp(spi);
134 void __iomem *base = sp->base;
135 u32 ioc = sp->ioc_base;
138 /* clock starts at inactive polarity */
139 for (word <<= (32 - bits); likely(bits); bits--) {
142 if (word & (1 << 31))
143 out = ioc | SPI_IOC_DO;
145 out = ioc & ~SPI_IOC_DO;
147 /* setup MSB (to slave) on trailing edge */
148 __raw_writel(out, base + SPI_REG_IOC);
150 __raw_writel(out | SPI_IOC_CLK, base + SPI_REG_IOC);
155 /* sample MSB (from slave) on leading edge */
156 ret = __raw_readl(base + SPI_REG_RDS);
157 __raw_writel(out, base + SPI_REG_IOC);
163 ret = __raw_readl(base + SPI_REG_RDS);
168 static int ar71xx_spi_probe(struct platform_device *pdev)
170 struct spi_master *master;
171 struct ar71xx_spi *sp;
172 struct ar71xx_spi_platform_data *pdata;
176 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
177 if (master == NULL) {
178 dev_err(&pdev->dev, "failed to allocate spi master\n");
182 sp = spi_master_get_devdata(master);
183 platform_set_drvdata(pdev, sp);
185 pdata = pdev->dev.platform_data;
187 master->setup = ar71xx_spi_setup;
188 master->cleanup = ar71xx_spi_cleanup;
190 sp->bitbang.master = spi_master_get(master);
191 sp->bitbang.chipselect = ar71xx_spi_chipselect;
192 sp->bitbang.txrx_word[SPI_MODE_0] = ar71xx_spi_txrx_mode0;
193 sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
195 sp->get_ioc_base = ar71xx_spi_get_ioc_base;
197 sp->bitbang.master->bus_num = pdata->bus_num;
198 sp->bitbang.master->num_chipselect = pdata->num_chipselect;
199 if (pdata->get_ioc_base)
200 sp->get_ioc_base = pdata->get_ioc_base;
202 sp->bitbang.master->bus_num = 0;
203 sp->bitbang.master->num_chipselect = 3;
206 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
212 sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
218 ar71xx_spi_setup_regs(sp);
220 ret = spi_bitbang_start(&sp->bitbang);
224 ar71xx_spi_restore_regs(sp);
227 platform_set_drvdata(pdev, NULL);
228 spi_master_put(sp->bitbang.master);
233 static int ar71xx_spi_remove(struct platform_device *pdev)
235 struct ar71xx_spi *sp = platform_get_drvdata(pdev);
237 spi_bitbang_stop(&sp->bitbang);
238 ar71xx_spi_restore_regs(sp);
240 platform_set_drvdata(pdev, NULL);
241 spi_master_put(sp->bitbang.master);
246 static void ar71xx_spi_shutdown(struct platform_device *pdev)
250 ret = ar71xx_spi_remove(pdev);
252 dev_err(&pdev->dev, "shutdown failed with %d\n", ret);
255 static struct platform_driver ar71xx_spi_drv = {
256 .probe = ar71xx_spi_probe,
257 .remove = ar71xx_spi_remove,
258 .shutdown = ar71xx_spi_shutdown,
261 .owner = THIS_MODULE,
265 static int __init ar71xx_spi_init(void)
267 printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
268 return platform_driver_register(&ar71xx_spi_drv);
270 module_init(ar71xx_spi_init);
272 static void __exit ar71xx_spi_exit(void)
274 platform_driver_unregister(&ar71xx_spi_drv);
276 module_exit(ar71xx_spi_exit);
278 MODULE_ALIAS("platform:" DRV_NAME);
279 MODULE_DESCRIPTION(DRV_DESC);
280 MODULE_VERSION(DRV_VERSION);
281 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
282 MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
283 MODULE_LICENSE("GPL v2");