2 * linux/drivers/serial/hornet_serial.c
4 * Driver for hornet serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2010 Ryan Hsu.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/tty_flip.h>
33 #include <linux/serial_reg.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/serial_8250.h>
37 #include <linux/nmi.h>
38 #include <linux/mutex.h>
39 #include <linux/slab.h>
41 #include <asm/mach-ar71xx/ar933x_uart.h>
42 #include <asm/mach-ar71xx/ar933x_uart_platform.h>
48 #define ar7240_reg_rmw_clear(_reg, _val) do {} while (0)
50 #define DRIVER_NAME "ar933x-uart"
52 #define AR933X_UART_REGS_SIZE 20
53 #define AR933X_UART_FIFO_SIZE 16
56 * uncomment below to enable WAR for EV81847.
58 //#define AR933X_EV81847_WAR
60 static struct uart_driver ar933x_uart_driver;
66 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
68 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
72 #define DEBUG_INTR(fmt...) printk(fmt)
74 #define DEBUG_INTR(fmt...) do { } while (0)
78 * We default to IRQ0 for the "no irq" hack. Some
79 * machine types want others as well - they're free
80 * to redefine this in their header file.
82 #define is_real_interrupt(irq) ((irq) != 0)
84 #include <asm/serial.h>
86 struct ar933x_uart_port {
87 struct uart_port port;
88 struct timer_list timer; /* "no irq" timer */
95 static inline int ar933x_ev81847_war(void)
97 #if defined(AR933X_EV81847_WAR)
104 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
107 return readl(up->port.membase + offset);
110 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
111 int offset, unsigned int value)
113 writel(value, up->port.membase + offset);
116 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
123 t = ar933x_uart_read(up, offset);
126 ar933x_uart_write(up, offset, t);
129 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
133 ar933x_uart_rmw(up, offset, 0, val);
136 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
140 ar933x_uart_rmw(up, offset, val, 0);
143 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
145 ar933x_uart_rmw_set(up, AR933X_UART_INT_EN_REG,
146 AR933X_UART_INT_TX_EMPTY);
149 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
151 if (up->ier & UART_IER_THRI) {
152 up->ier &= ~UART_IER_THRI;
154 /* FIXME: why this uses RXVALIDINTEN? */
155 ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
156 AR933X_UART_INT_RX_VALID);
160 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
162 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
166 spin_lock_irqsave(&up->port.lock, flags);
167 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
168 spin_unlock_irqrestore(&up->port.lock, flags);
170 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
173 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
178 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
182 static void ar933x_uart_start_tx(struct uart_port *port)
184 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
186 ar933x_uart_start_tx_interrupt(up);
189 static void ar933x_uart_stop_tx(struct uart_port *port)
191 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
193 ar933x_uart_stop_tx_interrupt(up);
196 static void ar933x_uart_stop_rx(struct uart_port *port)
198 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
200 up->ier &= ~UART_IER_RLSI;
201 up->port.read_status_mask &= ~UART_LSR_DR;
203 ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
204 AR933X_UART_INT_RX_VALID);
207 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
209 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
213 spin_lock_irqsave(&up->port.lock, flags);
215 if (break_state == -1)
216 up->lcr |= UART_LCR_SBC;
218 up->lcr &= ~UART_LCR_SBC;
220 rdata = ar933x_uart_read(up, AR933X_UART_CS_REG);
221 if (up->lcr & UART_LCR_SBC)
222 rdata |= AR933X_UART_CS_TX_BREAK;
224 rdata &= ~AR933X_UART_CS_TX_BREAK;
226 ar933x_uart_write(up, AR933X_UART_CS_REG, rdata);
228 spin_unlock_irqrestore(&up->port.lock, flags);
231 static void ar933x_uart_enable_ms(struct uart_port *port)
235 static inline unsigned int ar933x_uart_get_divisor(struct uart_port *port,
238 return (port->uartclk / (16 * baud)) - 1;
241 static void ar933x_uart_set_termios(struct uart_port *port,
242 struct ktermios *termios,
243 struct ktermios *old)
245 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
248 unsigned int baud, quot;
250 switch (termios->c_cflag & CSIZE) {
252 cval = UART_LCR_WLEN5;
255 cval = UART_LCR_WLEN6;
258 cval = UART_LCR_WLEN7;
262 cval = UART_LCR_WLEN8;
266 if (termios->c_cflag & CSTOPB)
267 cval |= UART_LCR_STOP;
268 if (termios->c_cflag & PARENB)
269 cval |= UART_LCR_PARITY;
270 if (!(termios->c_cflag & PARODD))
271 cval |= UART_LCR_EPAR;
273 if (termios->c_cflag & CMSPAR)
274 cval |= UART_LCR_SPAR;
278 * Ask the core to calculate the divisor for us.
280 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
281 quot = ar933x_uart_get_divisor(port, baud);
284 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
286 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
288 fcr = uart_config[up->port.type].fcr;
292 * MCR-based auto flow control. When AFE is enabled, RTS will be
293 * deasserted when the receive FIFO contains more characters than
294 * the trigger, or the MCR RTS bit is cleared. In the case where
295 * the remote UART is not using CTS auto flow control, we must
296 * have sufficient FIFO entries for the latency of the remote
297 * UART to respond. IOW, at least 32 bytes of FIFO.
299 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
300 up->mcr &= ~UART_MCR_AFE;
301 if (termios->c_cflag & CRTSCTS)
302 up->mcr |= UART_MCR_AFE;
307 * Ok, we're now changing the port state. Do it with
308 * interrupts disabled.
310 spin_lock_irqsave(&up->port.lock, flags);
313 * Update the per-port timeout.
315 uart_update_timeout(port, termios->c_cflag, baud);
317 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
318 if (termios->c_iflag & INPCK)
319 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
320 if (termios->c_iflag & (BRKINT | PARMRK))
321 up->port.read_status_mask |= UART_LSR_BI;
324 * Characteres to ignore
326 up->port.ignore_status_mask = 0;
327 if (termios->c_iflag & IGNPAR)
328 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
329 if (termios->c_iflag & IGNBRK) {
330 up->port.ignore_status_mask |= UART_LSR_BI;
332 * If we're ignoring parity and break indicators,
333 * ignore overruns too (for real raw support).
335 if (termios->c_iflag & IGNPAR)
336 up->port.ignore_status_mask |= UART_LSR_OE;
340 * ignore all characters if CREAD is not set
342 if ((termios->c_cflag & CREAD) == 0)
343 up->port.ignore_status_mask |= UART_LSR_DR;
346 * CTS flow control flag and modem status interrupts
348 up->ier &= ~UART_IER_MSI;
349 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
350 up->ier |= UART_IER_MSI;
352 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
353 AR933X_UART_CS_HOST_INT_EN);
358 ar933x_uart_set_mctrl(&up->port, up->port.mctrl);
359 spin_unlock_irqrestore(&up->port.lock, flags);
362 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up, int *status)
364 struct tty_struct *tty = up->port.state->port.tty;
365 unsigned int lsr = *status;
371 ch = lsr & AR933X_UART_DATA_TX_RX_MASK;
374 up->port.icount.rx++;
376 lsr = AR933X_UART_DATA_RX_CSR;
377 ar933x_uart_write(up, AR933X_UART_DATA_REG, lsr);
379 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
380 UART_LSR_FE | UART_LSR_OE))) {
382 * For statistics only
384 if (lsr & UART_LSR_BI) {
385 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
386 up->port.icount.brk++;
388 * We do the SysRQ and SAK checking
389 * here because otherwise the break
390 * may get masked by ignore_status_mask
391 * or read_status_mask.
393 if (uart_handle_break(&up->port))
395 } else if (lsr & UART_LSR_PE)
396 up->port.icount.parity++;
397 else if (lsr & UART_LSR_FE)
398 up->port.icount.frame++;
399 if (lsr & UART_LSR_OE)
400 up->port.icount.overrun++;
403 * Mask off conditions which should be ignored.
405 lsr &= up->port.read_status_mask;
407 if (lsr & UART_LSR_BI) {
408 DEBUG_INTR("handling break....");
410 } else if (lsr & UART_LSR_PE)
412 else if (lsr & UART_LSR_FE)
416 if (uart_handle_sysrq_char(&up->port, ch))
419 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
422 lsr = ar933x_uart_read(up, AR933X_UART_DATA_REG);
423 } while ((lsr & AR933X_UART_DATA_RX_CSR) && (max_count-- > 0));
425 spin_unlock(&up->port.lock);
426 tty_flip_buffer_push(tty);
427 spin_lock(&up->port.lock);
432 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
434 struct circ_buf *xmit = &up->port.state->xmit;
438 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
439 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
440 ar933x_uart_start_tx_interrupt(up);
444 if (up->port.x_char) {
445 rdata = up->port.x_char & AR933X_UART_DATA_TX_RX_MASK;
446 rdata |= AR933X_UART_DATA_TX_CSR;
447 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
448 up->port.icount.tx++;
450 ar933x_uart_start_tx_interrupt(up);
454 if (uart_tx_stopped(&up->port)) {
455 ar933x_uart_stop_tx(&up->port);
459 if (uart_circ_empty(xmit)) {
460 ar933x_uart_stop_tx_interrupt(up);
464 count = up->port.fifosize / 4;
466 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
467 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
468 ar933x_uart_start_tx_interrupt(up);
472 rdata = xmit->buf[xmit->tail] & AR933X_UART_DATA_TX_RX_MASK;
473 rdata |= AR933X_UART_DATA_TX_CSR;
474 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
476 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
477 up->port.icount.tx++;
478 if (uart_circ_empty(xmit))
480 } while (--count > 0);
482 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
483 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) {
484 ar933x_uart_start_tx_interrupt(up);
488 /* Re-enable TX Empty Interrupt to transmit pending chars */
489 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
490 uart_write_wakeup(&up->port);
491 ar933x_uart_start_tx_interrupt(up);
494 DEBUG_INTR("THRE...");
496 if (uart_circ_empty(xmit))
497 ar933x_uart_stop_tx_interrupt(up);
499 ar933x_uart_start_tx_interrupt(up);
502 /*! Hornet's interrupt status is not read clear, so that we have to...
503 * a. read out the interrupt status
504 * b. clear the interrupt mask to reset the interrupt status
505 * c. enable the interrupt to reactivate interrupt
507 * Disable and clear the interrupt status
509 static inline void ar933x_uart_clear_int(struct ar933x_uart_port *up)
511 #define BIT3 (0x1>>3)
513 /* 1. clear MISC interrupt mask */
514 //ar7240_reg_rmw_clear(AR7240_MISC_INT_MASK, BIT3);
516 /* 2. clear uartcs hostinten mask, bit13 */
517 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
518 AR933X_UART_CS_HOST_INT_EN);
520 /* 3. clear rx uartint */
521 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
523 /* 4. clear misc interrupt status */
524 ar7240_reg_rmw_clear(AR7240_MISC_INT_STATUS, BIT3);
526 /* 5. clear rx uartinten*/
527 ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
528 AR933X_UART_INT_RX_VALID);
530 /* 6. enable rx int*/
531 ar933x_uart_rmw_set(up, AR933X_UART_INT_EN_REG,
532 AR933X_UART_INT_RX_VALID);
534 /* 7. set uartcs hostinten mask */
535 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
536 AR933X_UART_CS_HOST_INT_EN);
538 /* 8. set misc int mask */
539 //ar7240_reg_wr(AR7240_MISC_INT_MASK, BIT3);
542 static inline void ar933x_uart_handle_port(struct ar933x_uart_port *up)
545 unsigned int int_status;
546 unsigned int en_status;
549 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
550 int_status = ar933x_uart_read(up, AR933X_UART_INT_REG);
551 en_status = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
553 spin_lock_irqsave(&up->port.lock, flags);
555 if( (int_status & en_status) & AR933X_UART_INT_RX_VALID )
556 ar933x_uart_rx_chars(up, &status);
558 if (((int_status & en_status) & AR933X_UART_INT_TX_EMPTY)) {
559 /* clear TX empty interrupts */
560 ar933x_uart_write(up, AR933X_UART_INT_REG,
561 AR933X_UART_INT_TX_EMPTY);
563 /* disable TX empty interrupts */
564 ar933x_uart_rmw_clear(up, AR933X_UART_INT_EN_REG,
565 AR933X_UART_INT_TX_EMPTY);
567 if (!uart_circ_empty(&up->port.state->xmit))
568 ar933x_uart_tx_chars(up);
571 spin_unlock_irqrestore(&up->port.lock, flags);
574 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
576 struct ar933x_uart_port *up;
579 up = (struct ar933x_uart_port *) dev_id;
581 iir = ar933x_uart_read(up, AR933X_UART_CS_REG);
582 if ((iir & AR933X_UART_CS_HOST_INT) == 0)
585 DEBUG_INTR("ar933x_uart_interrupt(%d)...", irq);
587 spin_lock(&up->port.lock);
588 ar933x_uart_handle_port(up);
589 ar933x_uart_clear_int(up);
590 spin_unlock(&up->port.lock);
592 DEBUG_INTR("end.\n");
597 static void ar933x_uart_timer(unsigned long data)
599 struct uart_port *port = (void *)data;
600 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
603 if (ar933x_ev81847_war()) {
604 struct circ_buf *xmit = &up->port.state->xmit;
607 if (!uart_circ_empty(xmit)) {
608 spin_lock_irqsave(&up->port.lock, flags);
609 ar933x_uart_tx_chars(up);
610 spin_unlock_irqrestore(&up->port.lock, flags);
613 iir = ar933x_uart_read(up, AR933X_UART_CS_REG);
614 if (iir & AR933X_UART_CS_HOST_INT) {
615 spin_lock(&up->port.lock);
616 ar933x_uart_handle_port(up);
617 spin_unlock(&up->port.lock);
621 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
624 static int ar933x_uart_startup(struct uart_port *port)
626 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
630 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
631 up->port.irqflags, dev_name(up->port.dev), up);
638 * Clear the interrupt registers.
640 ar933x_uart_read(up, AR933X_UART_CS_REG);
641 ar933x_uart_read(up, AR933X_UART_INT_REG);
643 if (!is_real_interrupt(up->port.irq) || ar933x_ev81847_war()) {
644 setup_timer(&up->timer, ar933x_uart_timer, (unsigned long)port);
645 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
649 spin_lock_irqsave(&up->port.lock, flags);
652 * Enable host interrupts
654 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
655 AR933X_UART_CS_HOST_INT_EN);
658 * Enable RX interrupts
660 up->ier = UART_IER_RLSI | UART_IER_RDI;
661 ar933x_uart_write(up, AR933X_UART_INT_EN_REG,
662 AR933X_UART_INT_RX_VALID);
665 * And clear the interrupt registers again for luck.
667 ar933x_uart_read(up, AR933X_UART_INT_REG);
669 spin_unlock_irqrestore(&up->port.lock, flags);
674 static void ar933x_uart_shutdown(struct uart_port *port)
676 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
680 * Disable all interrupts from this port
683 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
685 spin_lock_irqsave(&up->port.lock, flags);
686 up->port.mctrl &= ~TIOCM_OUT2;
687 ar933x_uart_set_mctrl(&up->port, up->port.mctrl);
688 spin_unlock_irqrestore(&up->port.lock, flags);
691 * Disable break condition
693 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
694 AR933X_UART_CS_TX_BREAK);
696 if (!is_real_interrupt(up->port.irq) ||
697 ar933x_ev81847_war())
698 del_timer_sync(&up->timer);
700 free_irq(up->port.irq, up);
703 static const char *ar933x_uart_type(struct uart_port *port)
705 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
708 static void ar933x_uart_release_port(struct uart_port *port)
710 /* Nothing to release ... */
713 static int ar933x_uart_request_port(struct uart_port *port)
715 /* UARTs always present */
719 static void ar933x_uart_config_port(struct uart_port *port, int flags)
721 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
723 port->type = PORT_AR933X;
725 /* Clear mask, so no surprise interrupts. */
726 ar933x_uart_read(up, AR933X_UART_CS_REG);
727 /* Clear interrupts status register */
728 ar933x_uart_read(up, AR933X_UART_INT_REG);
731 static int ar933x_uart_verify_port(struct uart_port *port,
732 struct serial_struct *ser)
737 static struct uart_ops ar933x_uart_ops = {
738 .tx_empty = ar933x_uart_tx_empty,
739 .set_mctrl = ar933x_uart_set_mctrl,
740 .get_mctrl = ar933x_uart_get_mctrl,
741 .stop_tx = ar933x_uart_stop_tx,
742 .start_tx = ar933x_uart_start_tx,
743 .stop_rx = ar933x_uart_stop_rx,
744 .enable_ms = ar933x_uart_enable_ms,
745 .break_ctl = ar933x_uart_break_ctl,
746 .startup = ar933x_uart_startup,
747 .shutdown = ar933x_uart_shutdown,
748 .set_termios = ar933x_uart_set_termios,
749 .type = ar933x_uart_type,
750 .release_port = ar933x_uart_release_port,
751 .request_port = ar933x_uart_request_port,
752 .config_port = ar933x_uart_config_port,
753 .verify_port = ar933x_uart_verify_port,
756 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
758 static struct ar933x_uart_port *ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
760 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
763 unsigned int timeout = 60000;
765 /* Wait up to 60ms for the character(s) to be sent. */
767 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
771 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
774 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
776 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
779 ar933x_uart_wait_xmitr(up);
781 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
782 rdata |= AR933X_UART_DATA_TX_CSR;
783 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
786 static void ar933x_uart_console_write(struct console *co, const char *s,
789 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
794 local_irq_save(flags);
796 if (up->port.sysrq) {
798 } else if (oops_in_progress) {
799 locked = spin_trylock(&up->port.lock);
801 spin_lock(&up->port.lock);
804 * First save the IER then disable the interrupts
806 ier = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
807 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
809 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
812 * Finally, wait for transmitter to become empty
813 * and restore the IER
815 ar933x_uart_wait_xmitr(up);
817 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, ier);
818 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
821 spin_unlock(&up->port.lock);
823 local_irq_restore(flags);
826 static int ar933x_uart_console_setup(struct console *co, char *options)
828 struct ar933x_uart_port *up;
834 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
837 up = ar933x_console_ports[co->index];
842 uart_parse_options(options, &baud, &parity, &bits, &flow);
844 return uart_set_options(&up->port, co, baud, parity, bits, flow);
847 static struct console ar933x_uart_console = {
849 .write = ar933x_uart_console_write,
850 .device = uart_console_device,
851 .setup = ar933x_uart_console_setup,
852 .flags = CON_PRINTBUFFER,
854 .data = &ar933x_uart_driver,
857 static int __init ar933x_uart_console_init(void)
859 register_console(&ar933x_uart_console);
862 console_initcall(ar933x_uart_console_init);
864 static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
866 ar933x_console_ports[up->port.line] = up;
869 #define AR933X_SERIAL_CONSOLE &ar933x_uart_console
873 static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
875 #define AR933X_SERIAL_CONSOLE NULL
877 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
879 static struct uart_driver ar933x_uart_driver = {
880 .owner = THIS_MODULE,
881 .driver_name = DRIVER_NAME,
882 .dev_name = "ttyATH",
883 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
884 .cons = AR933X_SERIAL_CONSOLE,
887 static int __devinit ar933x_uart_probe(struct platform_device *pdev)
889 struct ar933x_uart_platform_data *pdata;
890 struct ar933x_uart_port *up;
891 struct uart_port *port;
892 struct resource *mem_res;
893 struct resource *irq_res;
897 pdata = pdev->dev.platform_data;
905 if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
908 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
910 dev_err(&pdev->dev, "no MEM resource\n");
914 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
916 dev_err(&pdev->dev, "no IRQ resource\n");
920 up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL);
925 port->mapbase = mem_res->start;
927 port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE);
928 if (!port->membase) {
934 port->irq = irq_res->start;
935 port->dev = &pdev->dev;
936 port->type = PORT_AR933X;
937 port->iotype = UPIO_MEM32;
938 port->uartclk = pdata->uartclk;
941 port->fifosize = AR933X_UART_FIFO_SIZE;
942 port->ops = &ar933x_uart_ops;
944 ar933x_uart_add_console_port(up);
946 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
950 platform_set_drvdata(pdev, up);
954 iounmap(up->port.membase);
960 static int __devexit ar933x_uart_remove(struct platform_device *pdev)
962 struct ar933x_uart_port *up;
964 up = platform_get_drvdata(pdev);
965 platform_set_drvdata(pdev, NULL);
968 uart_remove_one_port(&ar933x_uart_driver, &up->port);
969 iounmap(up->port.membase);
976 static struct platform_driver ar933x_uart_platform_driver = {
977 .probe = ar933x_uart_probe,
978 .remove = __devexit_p(ar933x_uart_remove),
981 .owner = THIS_MODULE,
985 static int __init ar933x_uart_init(void)
989 ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
990 ret = uart_register_driver(&ar933x_uart_driver);
994 ret = platform_driver_register(&ar933x_uart_platform_driver);
996 goto err_unregister_uart_driver;
1000 err_unregister_uart_driver:
1001 uart_unregister_driver(&ar933x_uart_driver);
1006 static void __exit ar933x_uart_exit(void)
1008 platform_driver_unregister(&ar933x_uart_platform_driver);
1009 uart_unregister_driver(&ar933x_uart_driver);
1012 module_init(ar933x_uart_init);
1013 module_exit(ar933x_uart_exit);
1015 MODULE_DESCRIPTION("Atheros AR933X UART driver");
1016 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1017 MODULE_LICENSE("GPL v2");
1018 MODULE_ALIAS("platform:" DRV_NAME);