target/linux/ar71xx/files/drivers/net/phy/rtl8366_smi.c

   1 /*
   2  * Platform driver for the Realtek RTL8366 ethernet switch
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/gpio.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/skbuff.h>
  20 #include <linux/switch.h>
  21 #include <linux/phy.h>
  22 #include <linux/rtl8366_smi.h>
  23
  24 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
  25 #include <linux/debugfs.h>
  26 #endif
  27
  28 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
  29 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
  30 #define RTL8366_SMI_DRIVER_VER  "0.1.1"
  31
  32 #define RTL8366S_PHY_NO_MAX                 4
  33 #define RTL8366S_PHY_PAGE_MAX               7
  34 #define RTL8366S_PHY_ADDR_MAX               31
  35
  36 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  37 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  38
  39 #define RTL8366_RESET_CTRL_REG              0x0100
  40 #define RTL8366_CHIP_CTRL_RESET_HW          1
  41 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  42
  43 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x0104
  44 #define RTL8366S_CHIP_VERSION_MASK          0xf
  45 #define RTL8366S_CHIP_ID_REG                0x0105
  46 #define RTL8366S_CHIP_ID_8366               0x8366
  47
  48 /* PHY registers control */
  49 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8028
  50 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8029
  51
  52 #define RTL8366S_PHY_CTRL_READ              1
  53 #define RTL8366S_PHY_CTRL_WRITE             0
  54
  55 #define RTL8366S_PHY_REG_MASK               0x1f
  56 #define RTL8366S_PHY_PAGE_OFFSET            5
  57 #define RTL8366S_PHY_PAGE_MASK              (0x7 << 5)
  58 #define RTL8366S_PHY_NO_OFFSET              9
  59 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  60
  61 #define RTL8366_SMI_ACK_RETRY_COUNT         5
  62 #define RTL8366_SMI_CLK_DELAY               10 /* nsec */
  63
  64 /* LED control registers */
  65 #define RTL8366_LED_BLINKRATE_REG           0x0420
  66 #define RTL8366_LED_BLINKRATE_BIT           0
  67 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  68
  69 #define RTL8366_LED_CTRL_REG                0x0421
  70 #define RTL8366_LED_0_1_CTRL_REG            0x0422
  71 #define RTL8366_LED_2_3_CTRL_REG            0x0423
  72
  73 #define RTL8366S_MIB_COUNT                  33
  74 #define RTL8366S_GLOBAL_MIB_COUNT           1
  75 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0040
  76 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  77 #define RTL8366S_MIB_CTRL_REG               0x11F0
  78 #define RTL8366S_MIB_CTRL_USER_MASK         0x01FF
  79 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  80 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0002
  81
  82 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  83 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  84 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  85
  86
  87 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0058
  88 #define RTL8366S_PORT_VLAN_CTRL_REG(_p)  \
  89                 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
  90 #define RTL8366S_PORT_VLAN_CTRL_MASK        0xf
  91 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p)   (4 * ((_p) % 4))
  92
  93
  94 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018B
  95 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  96
  97 #define RTL8366S_VLAN_TB_CTRL_REG           0x010F
  98
  99 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
 100 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
 101 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
 102
 103 #define RTL8366S_VLAN_MEMCONF_BASE          0x0016
 104
 105
 106 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0060
 107 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 108 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 109 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 110 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 111 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 112 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 113
 114
 115 #define RTL8366_PORT_NUM_CPU                5
 116 #define RTL8366_NUM_PORTS                   6
 117 #define RTL8366_NUM_VLANS                   16
 118 #define RTL8366_NUM_LEDGROUPS               4
 119 #define RTL8366_NUM_VIDS                    4096
 120 #define RTL8366S_PRIORITYMAX                7
 121 #define RTL8366S_FIDMAX                     7
 122
 123
 124 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 125 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 126 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 127 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 128
 129 #define RTL8366_PORT_UNKNOWN                (1 << 4) /* No known connection */
 130 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 131
 132 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 133                                              RTL8366_PORT_2 |       \
 134                                              RTL8366_PORT_3 |       \
 135                                              RTL8366_PORT_4 |       \
 136                                              RTL8366_PORT_UNKNOWN | \
 137                                              RTL8366_PORT_CPU)
 138
 139 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 140                                              RTL8366_PORT_2 |       \
 141                                              RTL8366_PORT_3 |       \
 142                                              RTL8366_PORT_4 |       \
 143                                              RTL8366_PORT_UNKNOWN)
 144
 145 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 146                                              RTL8366_PORT_2 |       \
 147                                              RTL8366_PORT_3 |       \
 148                                              RTL8366_PORT_4)
 149
 150 #define RTL8366_PORT_ALL_INTERNAL           (RTL8366_PORT_UNKNOWN | \
 151                                              RTL8366_PORT_CPU)
 152
 153 struct rtl8366s_vlanconfig {
 154         u16     reserved2:1;
 155         u16     priority:3;
 156         u16     vid:12;
 157
 158         u16     reserved1:1;
 159         u16     fid:3;
 160         u16     untag:6;
 161         u16     member:6;
 162 };
 163
 164 struct rtl8366s_vlan4kentry {
 165         u16     reserved1:4;
 166         u16     vid:12;
 167
 168         u16     reserved2:1;
 169         u16     fid:3;
 170         u16     untag:6;
 171         u16     member:6;
 172 };
 173
 174 static const char *MIBCOUNTERS[] = {
 175         "IfInOctets                        ",
 176         "EtherStatsOctets                  ",
 177         "EtherStatsUnderSizePkts           ",
 178         "EtherFregament                    ",
 179         "EtherStatsPkts64Octets            ",
 180         "EtherStatsPkts65to127Octets       ",
 181         "EtherStatsPkts128to255Octets      ",
 182         "EtherStatsPkts256to511Octets      ",
 183         "EtherStatsPkts512to1023Octets     ",
 184         "EtherStatsPkts1024to1518Octets    ",
 185         "EtherOversizeStats                ",
 186         "EtherStatsJabbers                 ",
 187         "IfInUcastPkts                     ",
 188         "EtherStatsMulticastPkts           ",
 189         "EtherStatsBroadcastPkts           ",
 190         "EtherStatsDropEvents              ",
 191         "Dot3StatsFCSErrors                ",
 192         "Dot3StatsSymbolErrors             ",
 193         "Dot3InPauseFrames                 ",
 194         "Dot3ControlInUnknownOpcodes       ",
 195         "IfOutOctets                       ",
 196         "Dot3StatsSingleCollisionFrames    ",
 197         "Dot3StatMultipleCollisionFrames   ",
 198         "Dot3sDeferredTransmissions        ",
 199         "Dot3StatsLateCollisions           ",
 200         "EtherStatsCollisions              ",
 201         "Dot3StatsExcessiveCollisions      ",
 202         "Dot3OutPauseFrames                ",
 203         "Dot1dBasePortDelayExceededDiscards",
 204         "Dot1dTpPortInDiscards             ",
 205         "IfOutUcastPkts                    ",
 206         "IfOutMulticastPkts                ",
 207         "IfOutBroadcastPkts                ",
 208         NULL,
 209 };
 210
 211 struct rtl8366_smi {
 212         struct platform_device             *pdev;
 213         struct rtl8366_smi_platform_data   *pdata;
 214         spinlock_t                         lock;
 215         struct mii_bus                     *mii_bus;
 216         struct switch_dev                  dev;
 217         int                                mii_irq[PHY_MAX_ADDR];
 218         char                               buf[4096];
 219 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 220         struct dentry                      *debugfs_root;
 221 #endif
 222 };
 223
 224 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 225 u16 g_dbg_reg;
 226 #endif
 227
 228 static inline struct rtl8366_smi *sw_to_rtl8366(struct switch_dev *sw)
 229 {
 230         return container_of(sw, struct rtl8366_smi, dev);
 231 }
 232
 233 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
 234 {
 235         ndelay(RTL8366_SMI_CLK_DELAY);
 236 }
 237
 238 static void rtl8366_smi_start(struct rtl8366_smi *smi)
 239 {
 240         unsigned int sda = smi->pdata->gpio_sda;
 241         unsigned int sck = smi->pdata->gpio_sck;
 242
 243         /*
 244          * Set GPIO pins to output mode, with initial state:
 245          * SCK = 0, SDA = 1
 246          */
 247         gpio_direction_output(sck, 0);
 248         gpio_direction_output(sda, 1);
 249         rtl8366_smi_clk_delay(smi);
 250
 251         /* CLK 1: 0 -> 1, 1 -> 0 */
 252         gpio_set_value(sck, 1);
 253         rtl8366_smi_clk_delay(smi);
 254         gpio_set_value(sck, 0);
 255         rtl8366_smi_clk_delay(smi);
 256
 257         /* CLK 2: */
 258         gpio_set_value(sck, 1);
 259         rtl8366_smi_clk_delay(smi);
 260         gpio_set_value(sda, 0);
 261         rtl8366_smi_clk_delay(smi);
 262         gpio_set_value(sck, 0);
 263         rtl8366_smi_clk_delay(smi);
 264         gpio_set_value(sda, 1);
 265 }
 266
 267 static void rtl8366_smi_stop(struct rtl8366_smi *smi)
 268 {
 269         unsigned int sda = smi->pdata->gpio_sda;
 270         unsigned int sck = smi->pdata->gpio_sck;
 271
 272         rtl8366_smi_clk_delay(smi);
 273         gpio_set_value(sda, 0);
 274         gpio_set_value(sck, 1);
 275         rtl8366_smi_clk_delay(smi);
 276         gpio_set_value(sda, 1);
 277         rtl8366_smi_clk_delay(smi);
 278         gpio_set_value(sck, 1);
 279         rtl8366_smi_clk_delay(smi);
 280         gpio_set_value(sck, 0);
 281         rtl8366_smi_clk_delay(smi);
 282         gpio_set_value(sck, 1);
 283
 284         /* add a click */
 285         rtl8366_smi_clk_delay(smi);
 286         gpio_set_value(sck, 0);
 287         rtl8366_smi_clk_delay(smi);
 288         gpio_set_value(sck, 1);
 289
 290         /* set GPIO pins to input mode */
 291         gpio_direction_input(sda);
 292         gpio_direction_input(sck);
 293 }
 294
 295 static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
 296 {
 297         unsigned int sda = smi->pdata->gpio_sda;
 298         unsigned int sck = smi->pdata->gpio_sck;
 299
 300         for (; len > 0; len--) {
 301                 rtl8366_smi_clk_delay(smi);
 302
 303                 /* prepare data */
 304                 if ( data & ( 1 << (len - 1)) )
 305                         gpio_set_value(sda, 1);
 306                 else
 307                         gpio_set_value(sda, 0);
 308                 rtl8366_smi_clk_delay(smi);
 309
 310                 /* clocking */
 311                 gpio_set_value(sck, 1);
 312                 rtl8366_smi_clk_delay(smi);
 313                 gpio_set_value(sck, 0);
 314         }
 315 }
 316
 317 static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
 318 {
 319         unsigned int sda = smi->pdata->gpio_sda;
 320         unsigned int sck = smi->pdata->gpio_sck;
 321
 322         gpio_direction_input(sda);
 323
 324         for (*data = 0; len > 0; len--) {
 325                 u32 u;
 326
 327                 rtl8366_smi_clk_delay(smi);
 328
 329                 /* clocking */
 330                 gpio_set_value(sck, 1);
 331                 rtl8366_smi_clk_delay(smi);
 332                 u = gpio_get_value(sda);
 333                 gpio_set_value(sck, 0);
 334
 335                 *data |= (u << (len - 1));
 336         }
 337
 338         gpio_direction_output(sda, 0);
 339 }
 340
 341 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
 342 {
 343         int retry_cnt;
 344
 345         retry_cnt = 0;
 346         do {
 347                 u32 ack;
 348
 349                 rtl8366_smi_read_bits(smi, 1, &ack);
 350                 if (ack == 0)
 351                         break;
 352
 353                 if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
 354                         return -EIO;
 355         } while (1);
 356
 357         return 0;
 358 }
 359
 360 static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
 361 {
 362         rtl8366_smi_write_bits(smi, data, 8);
 363         return rtl8366_smi_wait_for_ack(smi);
 364 }
 365
 366 static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
 367 {
 368         u32 t;
 369
 370         /* read data */
 371         rtl8366_smi_read_bits(smi, 8, &t);
 372         *data = (t & 0xff);
 373
 374         /* send an ACK */
 375         rtl8366_smi_write_bits(smi, 0x00, 1);
 376
 377         return 0;
 378 }
 379
 380 static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
 381 {
 382         u32 t;
 383
 384         /* read data */
 385         rtl8366_smi_read_bits(smi, 8, &t);
 386         *data = (t & 0xff);
 387
 388         /* send an ACK */
 389         rtl8366_smi_write_bits(smi, 0x01, 1);
 390
 391         return 0;
 392 }
 393
 394 static int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
 395 {
 396         unsigned long flags;
 397         u8 lo = 0;
 398         u8 hi = 0;
 399         int ret;
 400
 401         spin_lock_irqsave(&smi->lock, flags);
 402
 403         rtl8366_smi_start(smi);
 404
 405         /* send READ command */
 406         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
 407         if (ret)
 408                 goto out;
 409
 410         /* set ADDR[7:0] */
 411         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 412         if (ret)
 413                 goto out;
 414
 415         /* set ADDR[15:8] */
 416         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 417         if (ret)
 418                 goto out;
 419
 420         /* read DATA[7:0] */
 421         rtl8366_smi_read_byte0(smi, &lo);
 422         /* read DATA[15:8] */
 423         rtl8366_smi_read_byte1(smi, &hi);
 424
 425         *data = ((u32) lo) | (((u32) hi) << 8);
 426
 427         ret = 0;
 428
 429  out:
 430         rtl8366_smi_stop(smi);
 431         spin_unlock_irqrestore(&smi->lock, flags);
 432
 433         return ret;
 434 }
 435
 436 static int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
 437 {
 438         unsigned long flags;
 439         int ret;
 440
 441         spin_lock_irqsave(&smi->lock, flags);
 442
 443         rtl8366_smi_start(smi);
 444
 445         /* send WRITE command */
 446         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
 447         if (ret)
 448                 goto out;
 449
 450         /* set ADDR[7:0] */
 451         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 452         if (ret)
 453                 goto out;
 454
 455         /* set ADDR[15:8] */
 456         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 457         if (ret)
 458                 goto out;
 459
 460         /* write DATA[7:0] */
 461         ret = rtl8366_smi_write_byte(smi, data & 0xff);
 462         if (ret)
 463                 goto out;
 464
 465         /* write DATA[15:8] */
 466         ret = rtl8366_smi_write_byte(smi, data >> 8);
 467         if (ret)
 468                 goto out;
 469
 470         ret = 0;
 471
 472  out:
 473         rtl8366_smi_stop(smi);
 474         spin_unlock_irqrestore(&smi->lock, flags);
 475
 476         return ret;
 477 }
 478
 479 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi *smi,
 480                                     u32 phy_no, u32 page, u32 addr, u32 *data)
 481 {
 482         u32 reg;
 483         int ret;
 484
 485         if (phy_no > RTL8366S_PHY_NO_MAX)
 486                 return -EINVAL;
 487
 488         if (page > RTL8366S_PHY_PAGE_MAX)
 489                 return -EINVAL;
 490
 491         if (addr > RTL8366S_PHY_ADDR_MAX)
 492                 return -EINVAL;
 493
 494         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 495                                     RTL8366S_PHY_CTRL_READ);
 496         if (ret)
 497                 return ret;
 498
 499         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 500               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 501               (addr & RTL8366S_PHY_REG_MASK);
 502
 503         ret = rtl8366_smi_write_reg(smi, reg, 0);
 504         if (ret)
 505                 return ret;
 506
 507         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 508         if (ret)
 509                 return ret;
 510
 511         return 0;
 512 }
 513
 514 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi *smi,
 515                                      u32 phy_no, u32 page, u32 addr, u32 data)
 516 {
 517         u32 reg;
 518         int ret;
 519
 520         if (phy_no > RTL8366S_PHY_NO_MAX)
 521                 return -EINVAL;
 522
 523         if (page > RTL8366S_PHY_PAGE_MAX)
 524                 return -EINVAL;
 525
 526         if (addr > RTL8366S_PHY_ADDR_MAX)
 527                 return -EINVAL;
 528
 529         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 530                                     RTL8366S_PHY_CTRL_WRITE);
 531         if (ret)
 532                 return ret;
 533
 534         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 535               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 536               (addr & RTL8366S_PHY_REG_MASK);
 537
 538         ret = rtl8366_smi_write_reg(smi, reg, data);
 539         if (ret)
 540                 return ret;
 541
 542         return 0;
 543 }
 544
 545 static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter,
 546                                    int port, unsigned long long *val)
 547 {
 548         int i;
 549         int err;
 550         u32 addr, data, regoffset;
 551         u64 mibvalue;
 552
 553         /* address offset to MIBs counter */
 554         const u16 mibLength[RTL8366S_MIB_COUNT] = {4, 4, 2, 2, 2, 2, 2, 2, 2,
 555                                                    2, 2, 2, 2, 2, 2, 2, 2, 2,
 556                                                    2, 2, 4, 2, 2, 2, 2, 2, 2,
 557                                                    2, 2, 2, 2, 2, 2};
 558
 559         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 560                 return -EINVAL;
 561
 562         regoffset = RTL8366S_MIB_COUNTER_PORT_OFFSET * (port);
 563
 564         for (i = 0; i < counter; i++)
 565                 regoffset += mibLength[i];
 566
 567         addr = RTL8366S_MIB_COUNTER_BASE + regoffset;
 568
 569         /*
 570          * Writing access counter address first
 571          * then ASIC will prepare 64bits counter wait for being retrived
 572          */
 573         data = 0; /* writing data will be discard by ASIC */
 574         err = rtl8366_smi_write_reg(smi, addr, data);
 575         if (err)
 576                 return err;
 577
 578         /* read MIB control register */
 579         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 580         if (err)
 581                 return err;
 582
 583         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 584                 return -EBUSY;
 585
 586         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 587                 return -EIO;
 588
 589         mibvalue = 0;
 590         addr = addr + mibLength[counter] - 1;
 591         i = mibLength[counter];
 592
 593         while (i) {
 594                 err = rtl8366_smi_read_reg(smi, addr, &data);
 595                 if (err)
 596                         return err;
 597
 598                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 599
 600                 addr--;
 601                 i--;
 602         }
 603
 604         *val = mibvalue;
 605         return 0;
 606 }
 607
 608 static int rtl8366s_get_vlan_4k_entry(struct rtl8366_smi *smi, u32 vid,
 609                                       struct rtl8366s_vlan4kentry *vlan4k)
 610 {
 611         int err;
 612         u32 data;
 613         u16 *tableaddr;
 614
 615         memset(vlan4k, '\0', sizeof(struct rtl8366s_vlan4kentry));
 616         vlan4k->vid = vid;
 617
 618         if (vid >= RTL8366_NUM_VIDS)
 619                 return -EINVAL;
 620
 621         tableaddr = (u16 *)vlan4k;
 622
 623         /* write VID */
 624         data = *tableaddr;
 625         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 626         if (err)
 627                 return err;
 628
 629         /* write table access control word */
 630         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 631                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 632         if (err)
 633                 return err;
 634
 635         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 636         if (err)
 637                 return err;
 638
 639         *tableaddr = data;
 640         tableaddr++;
 641
 642         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 643                                    &data);
 644         if (err)
 645                 return err;
 646
 647         *tableaddr = data;
 648         vlan4k->vid = vid;
 649
 650         return 0;
 651 }
 652
 653 static int rtl8366s_set_vlan_4k_entry(struct rtl8366_smi *smi,
 654                                       const struct rtl8366s_vlan4kentry *vlan4k)
 655 {
 656         int err;
 657         u32 data;
 658         u16 *tableaddr;
 659
 660         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 661             vlan4k->member > RTL8366_PORT_ALL ||
 662             vlan4k->untag > RTL8366_PORT_ALL ||
 663             vlan4k->fid > RTL8366S_FIDMAX)
 664                 return -EINVAL;
 665
 666         tableaddr = (u16 *)vlan4k;
 667
 668         data = *tableaddr;
 669
 670         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 671         if (err)
 672                 return err;
 673
 674         tableaddr++;
 675
 676         data = *tableaddr;
 677
 678         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 679                                     data);
 680         if (err)
 681                 return err;
 682
 683         /* write table access control word */
 684         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 685                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 686
 687         return err;
 688 }
 689
 690 static int rtl8366s_get_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 691                                            struct rtl8366s_vlanconfig *vlanmc)
 692 {
 693         int err;
 694         u32 addr;
 695         u32 data;
 696         u16 *tableaddr;
 697
 698         memset(vlanmc, '\0', sizeof(struct rtl8366s_vlanconfig));
 699
 700         if (index >= RTL8366_NUM_VLANS)
 701                 return -EINVAL;
 702
 703         tableaddr = (u16 *)vlanmc;
 704
 705         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 706         err = rtl8366_smi_read_reg(smi, addr, &data);
 707         if (err)
 708                 return err;
 709
 710         *tableaddr = data;
 711         tableaddr++;
 712
 713         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 714         err = rtl8366_smi_read_reg(smi, addr, &data);
 715         if (err)
 716                 return err;
 717
 718         *tableaddr = data;
 719
 720         return 0;
 721 }
 722
 723 static int rtl8366s_set_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 724                                            const struct rtl8366s_vlanconfig
 725                                            *vlanmc)
 726 {
 727         int err;
 728         u32 addr;
 729         u32 data;
 730         u16 *tableaddr;
 731
 732         if (index >= RTL8366_NUM_VLANS ||
 733             vlanmc->vid >= RTL8366_NUM_VIDS ||
 734             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 735             vlanmc->member > RTL8366_PORT_ALL ||
 736             vlanmc->untag > RTL8366_PORT_ALL ||
 737             vlanmc->fid > RTL8366S_FIDMAX)
 738                 return -EINVAL;
 739
 740         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 741
 742         tableaddr = (u16 *)vlanmc;
 743         data = *tableaddr;
 744
 745         err = rtl8366_smi_write_reg(smi, addr, data);
 746         if (err)
 747                 return err;
 748
 749         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 750
 751         tableaddr++;
 752         data = *tableaddr;
 753
 754         err = rtl8366_smi_write_reg(smi, addr, data);
 755         if (err)
 756                 return err;
 757
 758         return 0;
 759 }
 760
 761 static int rtl8366_get_port_vlan_index(struct rtl8366_smi *smi, int port,
 762                                        int *val)
 763 {
 764         u32 data;
 765         int err;
 766
 767         if (port >= RTL8366_NUM_PORTS)
 768                 return -EINVAL;
 769
 770         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 771                                    &data);
 772         if (err)
 773                 return err;
 774
 775         *val = (data >> RTL8366S_PORT_VLAN_CTRL_SHIFT(port)) &
 776                RTL8366S_PORT_VLAN_CTRL_MASK;
 777
 778         return 0;
 779
 780 }
 781
 782 static int rtl8366_get_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 783                                       int *val)
 784 {
 785         struct rtl8366s_vlanconfig vlanmc;
 786         int err;
 787         int index;
 788
 789         err = rtl8366_get_port_vlan_index(smi, port, &index);
 790         if (err)
 791                 return err;
 792
 793         err = rtl8366s_get_vlan_member_config(smi, index, &vlanmc);
 794         if (err)
 795                 return err;
 796
 797         *val = vlanmc.vid;
 798         return 0;
 799 }
 800
 801 static int rtl8366_set_port_vlan_index(struct rtl8366_smi *smi, int port,
 802                                        int index)
 803 {
 804         u32 data;
 805         int err;
 806
 807         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 808                 return -EINVAL;
 809
 810         err = rtl8366_smi_read_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 811                                    &data);
 812         if (err)
 813                 return err;
 814
 815         data &= ~(RTL8366S_PORT_VLAN_CTRL_MASK <<
 816                   RTL8366S_PORT_VLAN_CTRL_SHIFT(port));
 817         data |= (index & RTL8366S_PORT_VLAN_CTRL_MASK) <<
 818                  RTL8366S_PORT_VLAN_CTRL_SHIFT(port);
 819
 820         err = rtl8366_smi_write_reg(smi, RTL8366S_PORT_VLAN_CTRL_REG(port),
 821                                     data);
 822         return err;
 823 }
 824
 825 static int rtl8366_set_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 826                                       int val)
 827 {
 828         int i;
 829         struct rtl8366s_vlanconfig vlanmc;
 830         struct rtl8366s_vlan4kentry vlan4k;
 831
 832         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 833                 return -EINVAL;
 834
 835         /* Updating the 4K entry; lookup it and change the port member set */
 836         rtl8366s_get_vlan_4k_entry(smi, val, &vlan4k);
 837         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 838         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 839         rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
 840
 841         /*
 842          * For the 16 entries more work needs to be done. First see if such
 843          * VID is already there and change it
 844          */
 845         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 846                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
 847
 848                 /* Try to find an existing vid and update port member set */
 849                 if (val == vlanmc.vid) {
 850                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 851                         rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 852
 853                         /* Now update PVID register settings */
 854                         rtl8366_set_port_vlan_index(smi, port, i);
 855
 856                         return 0;
 857                 }
 858         }
 859
 860         /*
 861          * PVID could not be found from vlan table. Replace unused (one that
 862          * has no member ports) with new one
 863          */
 864         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 865                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
 866
 867                 /*
 868                  * See if this vlan member configuration is unused. It is
 869                  * unused if member set contains no ports or CPU port only
 870                  */
 871                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 872                         vlanmc.vid = val;
 873                         vlanmc.priority = 0;
 874                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 875                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 876                         vlanmc.fid = 0;
 877
 878                         rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 879
 880                         /* Now update PVID register settings */
 881                         rtl8366_set_port_vlan_index(smi, port, i);
 882
 883                         return 0;
 884                 }
 885         }
 886
 887         dev_err(&smi->pdev->dev,
 888                 "All 16 vlan member configurations are in use\n");
 889
 890         return -EINVAL;
 891 }
 892
 893
 894 static int rtl8366_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
 895 {
 896         u32 data = 0;
 897
 898         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 899
 900         if (enable)
 901                 data |= RTL8366_CHIP_CTRL_VLAN;
 902         else
 903                 data &= ~RTL8366_CHIP_CTRL_VLAN;
 904
 905         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 906 }
 907
 908 static int rtl8366_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
 909 {
 910         u32 data = 0;
 911
 912         rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 913
 914         if (enable)
 915                 data |= 1;
 916         else
 917                 data &= ~1;
 918
 919         return rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, data);
 920 }
 921
 922 static int rtl8366s_reset_vlan(struct rtl8366_smi *smi)
 923 {
 924         struct rtl8366s_vlan4kentry vlan4k;
 925         struct rtl8366s_vlanconfig vlanmc;
 926         int err;
 927         int i;
 928
 929         /* clear 16 VLAN member configuration */
 930         vlanmc.vid = 0;
 931         vlanmc.priority = 0;
 932         vlanmc.member = 0;
 933         vlanmc.untag = 0;
 934         vlanmc.fid = 0;
 935         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 936                 err = rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 937                 if (err)
 938                         return err;
 939         }
 940
 941         /* Set a default VLAN with vid 1 to 4K table for all ports */
 942         vlan4k.vid = 1;
 943         vlan4k.member = RTL8366_PORT_ALL;
 944         vlan4k.untag = RTL8366_PORT_ALL;
 945         vlan4k.fid = 0;
 946         err = rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
 947         if (err)
 948                 return err;
 949
 950         /* Set all ports PVID to default VLAN */
 951         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 952                 err = rtl8366_set_vlan_port_pvid(smi, i, 0);
 953                 if (err)
 954                         return err;
 955         }
 956
 957         return 0;
 958 }
 959
 960 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 961 static int rtl8366_debugfs_open(struct inode *inode, struct file *file)
 962 {
 963         file->private_data = inode->i_private;
 964         return 0;
 965 }
 966
 967 static ssize_t rtl8366_read_debugfs_mibs(struct file *file,
 968                                          char __user *user_buf,
 969                                          size_t count, loff_t *ppos)
 970 {
 971         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
 972         int i, j, len = 0;
 973         char *buf = smi->buf;
 974
 975         len += snprintf(buf + len, sizeof(smi->buf) - len, "MIB Counters:\n");
 976         len += snprintf(buf + len, sizeof(smi->buf) - len, "Counter"
 977                         "                            "
 978                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 979                         "Port 4\n");
 980
 981         for (i = 0; i < 33; ++i) {
 982                 len += snprintf(buf + len, sizeof(smi->buf) - len, "%d:%s ",
 983                                 i, MIBCOUNTERS[i]);
 984                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 985                         unsigned long long counter = 0;
 986
 987                         if (!rtl8366_get_mib_counter(smi, i, j, &counter))
 988                                 len += snprintf(buf + len,
 989                                                 sizeof(smi->buf) - len,
 990                                                 "[%llu]", counter);
 991                         else
 992                                 len += snprintf(buf + len,
 993                                                 sizeof(smi->buf) - len,
 994                                                 "[error]");
 995
 996                         if (j != RTL8366_NUM_PORTS - 1) {
 997                                 if (counter < 100000)
 998                                         len += snprintf(buf + len,
 999                                                         sizeof(smi->buf) - len,
1000                                                         "\t");
1001
1002                                 len += snprintf(buf + len,
1003                                                 sizeof(smi->buf) - len,
1004                                                 "\t");
1005                         }
1006                 }
1007                 len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1008         }
1009
1010         len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1011
1012         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1013 }
1014
1015 static ssize_t rtl8366_read_debugfs_vlan(struct file *file,
1016                                          char __user *user_buf,
1017                                          size_t count, loff_t *ppos)
1018 {
1019         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1020         int i, j, len = 0;
1021         char *buf = smi->buf;
1022
1023         len += snprintf(buf + len, sizeof(smi->buf) - len,
1024                         "VLAN Member Config:\n");
1025         len += snprintf(buf + len, sizeof(smi->buf) - len,
1026                         "\t id \t vid \t prio \t member \t untag  \t fid "
1027                         "\tports\n");
1028
1029         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
1030                 struct rtl8366s_vlanconfig vlanmc;
1031
1032                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
1033
1034                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1035                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
1036                                 "\t", i, vlanmc.vid, vlanmc.priority,
1037                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
1038
1039                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
1040                         int index = 0;
1041                         if (!rtl8366_get_port_vlan_index(smi, j, &index)) {
1042                                 if (index == i)
1043                                         len += snprintf(buf + len,
1044                                                         sizeof(smi->buf) - len,
1045                                                         "%d", j);
1046                         }
1047                 }
1048                 len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1049         }
1050
1051         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1052 }
1053
1054 static ssize_t rtl8366_read_debugfs_reg(struct file *file,
1055                                         char __user *user_buf,
1056                                         size_t count, loff_t *ppos)
1057 {
1058         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1059         u32 t, reg = g_dbg_reg;
1060         int err, len = 0;
1061         char *buf = smi->buf;
1062
1063         memset(buf, '\0', sizeof(smi->buf));
1064
1065         err = rtl8366_smi_read_reg(smi, reg, &t);
1066         if (err) {
1067                 len += snprintf(buf, sizeof(smi->buf),
1068                                 "Read failed (reg: 0x%04x)\n", reg);
1069                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1070         }
1071
1072         len += snprintf(buf, sizeof(smi->buf), "reg = 0x%04x, val = 0x%04x\n",
1073                         reg, t);
1074
1075         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1076 }
1077
1078 static ssize_t rtl8366_write_debugfs_reg(struct file *file,
1079                                          const char __user *user_buf,
1080                                          size_t count, loff_t *ppos)
1081 {
1082         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1083         unsigned long data;
1084         u32 reg = g_dbg_reg;
1085         int err;
1086         size_t len;
1087         char *buf = smi->buf;
1088
1089         len = min(count, sizeof(smi->buf) - 1);
1090         if (copy_from_user(buf, user_buf, len)) {
1091                 dev_err(&smi->pdev->dev, "copy from user failed\n");
1092                 return -EFAULT;
1093         }
1094
1095         buf[len] = '\0';
1096         if (len > 0 && buf[len - 1] == '\n')
1097                 buf[len - 1] = '\0';
1098
1099
1100         if (strict_strtoul(buf, 16, &data)) {
1101                 dev_err(&smi->pdev->dev, "Invalid reg value %s\n", buf);
1102         } else {
1103                 err = rtl8366_smi_write_reg(smi, reg, data);
1104                 if (err) {
1105                         dev_err(&smi->pdev->dev,
1106                                 "writing reg 0x%04x val 0x%04lx failed\n",
1107                                 reg, data);
1108                 }
1109         }
1110
1111         return count;
1112 }
1113
1114 static const struct file_operations fops_rtl8366_regs = {
1115         .read = rtl8366_read_debugfs_reg,
1116         .write = rtl8366_write_debugfs_reg,
1117         .open = rtl8366_debugfs_open,
1118         .owner = THIS_MODULE
1119 };
1120
1121 static const struct file_operations fops_rtl8366_vlan = {
1122         .read = rtl8366_read_debugfs_vlan,
1123         .open = rtl8366_debugfs_open,
1124         .owner = THIS_MODULE
1125 };
1126
1127 static const struct file_operations fops_rtl8366_mibs = {
1128         .read = rtl8366_read_debugfs_mibs,
1129         .open = rtl8366_debugfs_open,
1130         .owner = THIS_MODULE
1131 };
1132
1133 static void rtl8366_debugfs_init(struct rtl8366_smi *smi)
1134 {
1135         struct dentry *node;
1136         struct dentry *root;
1137
1138         if (!smi->debugfs_root)
1139                 smi->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
1140
1141         if (!smi->debugfs_root) {
1142                 dev_err(&smi->pdev->dev, "Unable to create debugfs dir\n");
1143                 return;
1144         }
1145         root = smi->debugfs_root;
1146
1147         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
1148         if (!node) {
1149                 dev_err(&smi->pdev->dev, "Creating debugfs file reg failed\n");
1150                 return;
1151         }
1152
1153         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, smi,
1154                                    &fops_rtl8366_regs);
1155         if (!node) {
1156                 dev_err(&smi->pdev->dev, "Creating debugfs file val failed\n");
1157                 return;
1158         }
1159
1160         node = debugfs_create_file("vlan", S_IRUSR, root, smi,
1161                                    &fops_rtl8366_vlan);
1162         if (!node) {
1163                 dev_err(&smi->pdev->dev,
1164                         "Creating debugfs file vlan failed\n");
1165                 return;
1166         }
1167
1168         node = debugfs_create_file("mibs", S_IRUSR, root, smi,
1169                                    &fops_rtl8366_mibs);
1170         if (!node) {
1171                 dev_err(&smi->pdev->dev,
1172                         "Creating debugfs file mibs failed\n");
1173                 return;
1174         }
1175 }
1176
1177 static void rtl8366_debugfs_remove(struct rtl8366_smi *smi)
1178 {
1179         if (smi->debugfs_root) {
1180                 debugfs_remove_recursive(smi->debugfs_root);
1181                 smi->debugfs_root = NULL;
1182         }
1183 }
1184
1185 #else
1186 static inline void rtl8366_debugfs_init(struct rtl8366_smi *smi) {}
1187 static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {}
1188 #endif /* CONFIG_RTL8366_SMI_DEBUG_FS */
1189
1190 static int rtl8366_sw_reset_mibs(struct switch_dev *dev,
1191                                  const struct switch_attr *attr,
1192                                  struct switch_val *val)
1193 {
1194         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1195         u32 data = 0;
1196
1197         if (val->value.i == 1) {
1198                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1199                 data |= (1 << 2);
1200                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1201         }
1202
1203         return 0;
1204 }
1205
1206 static int rtl8366_sw_get_vlan_enable(struct switch_dev *dev,
1207                                       const struct switch_attr *attr,
1208                                       struct switch_val *val)
1209 {
1210         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1211         u32 data;
1212
1213         if (attr->ofs == 1) {
1214                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1215
1216                 if (data & RTL8366_CHIP_CTRL_VLAN)
1217                         val->value.i = 1;
1218                 else
1219                         val->value.i = 0;
1220         } else if (attr->ofs == 2) {
1221                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
1222
1223                 if (data & 0x0001)
1224                         val->value.i = 1;
1225                 else
1226                         val->value.i = 0;
1227         }
1228
1229         return 0;
1230 }
1231
1232 static int rtl8366_sw_get_blinkrate(struct switch_dev *dev,
1233                                     const struct switch_attr *attr,
1234                                     struct switch_val *val)
1235 {
1236         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1237         u32 data;
1238
1239         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1240
1241         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1242
1243         return 0;
1244 }
1245
1246 static int rtl8366_sw_set_blinkrate(struct switch_dev *dev,
1247                                     const struct switch_attr *attr,
1248                                     struct switch_val *val)
1249 {
1250         u32 data;
1251         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1252
1253         if (val->value.i >= 6)
1254                 return -EINVAL;
1255
1256         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1257
1258         data &= ~RTL8366_LED_BLINKRATE_MASK;
1259         data |= val->value.i;
1260
1261         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1262
1263         return 0;
1264 }
1265
1266 static int rtl8366_sw_set_vlan_enable(struct switch_dev *dev,
1267                                       const struct switch_attr *attr,
1268                                       struct switch_val *val)
1269 {
1270         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1271
1272         if (attr->ofs == 1)
1273                 return rtl8366_vlan_set_vlan(smi, val->value.i);
1274         else
1275                 return rtl8366_vlan_set_4ktable(smi, val->value.i);
1276 }
1277
1278 static const char *rtl8366_speed_str(unsigned speed)
1279 {
1280         switch (speed) {
1281         case 0:
1282                 return "10baseT";
1283         case 1:
1284                 return "100baseT";
1285         case 2:
1286                 return "1000baseT";
1287         }
1288
1289         return "unknown";
1290 }
1291
1292 static int rtl8366_sw_get_port_link(struct switch_dev *dev,
1293                                     const struct switch_attr *attr,
1294                                     struct switch_val *val)
1295 {
1296         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1297         u32 len = 0, data = 0;
1298
1299         if (val->port_vlan >= RTL8366_NUM_PORTS)
1300                 return -EINVAL;
1301
1302         memset(smi->buf, '\0', sizeof(smi->buf));
1303         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1304                              (val->port_vlan / 2), &data);
1305
1306         if (val->port_vlan % 2)
1307                 data = data >> 8;
1308
1309         len = snprintf(smi->buf, sizeof(smi->buf),
1310                         "port:%d link:%s speed:%s %s-duplex %s%s%s",
1311                         val->port_vlan,
1312                         (data & RTL8366S_PORT_STATUS_LINK_MASK) ? "up" : "down",
1313                         rtl8366_speed_str(data &
1314                                           RTL8366S_PORT_STATUS_SPEED_MASK),
1315                         (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) ?
1316                                 "full" : "half",
1317                         (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) ?
1318                                 "tx-pause ": "",
1319                         (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) ?
1320                                 "rx-pause " : "",
1321                         (data & RTL8366S_PORT_STATUS_AN_MASK) ? "nway ": "");
1322
1323         val->value.s = smi->buf;
1324         val->len = len;
1325
1326         return 0;
1327 }
1328
1329 static int rtl8366_sw_get_vlan_info(struct switch_dev *dev,
1330                                     const struct switch_attr *attr,
1331                                     struct switch_val *val)
1332 {
1333         int i;
1334         u32 len = 0;
1335         struct rtl8366s_vlanconfig vlanmc;
1336         struct rtl8366s_vlan4kentry vlan4k;
1337         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1338         char *buf = smi->buf;
1339
1340         if (val->port_vlan >= RTL8366_NUM_VLANS)
1341                 return -EINVAL;
1342
1343         memset(buf, '\0', sizeof(smi->buf));
1344
1345         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1346         rtl8366s_get_vlan_4k_entry(smi, vlanmc.vid, &vlan4k);
1347
1348         len += snprintf(buf + len, sizeof(smi->buf) - len, "VLAN %d: Ports: ",
1349                         val->port_vlan);
1350
1351         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1352                 int index = 0;
1353                 if (!rtl8366_get_port_vlan_index(smi, i, &index) &&
1354                     index == val->port_vlan)
1355                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1356                                         "%d", i);
1357         }
1358         len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1359
1360         len += snprintf(buf + len, sizeof(smi->buf) - len,
1361                         "\t\t vid \t prio \t member \t untag \t fid\n");
1362         len += snprintf(buf + len, sizeof(smi->buf) - len, "\tMC:\t");
1363         len += snprintf(buf + len, sizeof(smi->buf) - len,
1364                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1365                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1366                         vlanmc.untag, vlanmc.fid);
1367         len += snprintf(buf + len, sizeof(smi->buf) - len, "\t4K:\t");
1368         len += snprintf(buf + len, sizeof(smi->buf) - len,
1369                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1370                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1371
1372         val->value.s = buf;
1373         val->len = len;
1374
1375         return 0;
1376 }
1377
1378 static int rtl8366_sw_set_port_led(struct switch_dev *dev,
1379                                    const struct switch_attr *attr,
1380                                    struct switch_val *val)
1381 {
1382         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1383         u32 data = 0;
1384
1385         if (val->port_vlan >= RTL8366_NUM_PORTS ||
1386             (1 << val->port_vlan) == RTL8366_PORT_UNKNOWN)
1387                 return -EINVAL;
1388
1389         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1390                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1391                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1392                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1393         } else {
1394                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1395                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1396                         (val->value.i << (val->port_vlan * 4));
1397                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1398         }
1399
1400         return 0;
1401 }
1402
1403 static int rtl8366_sw_get_port_led(struct switch_dev *dev,
1404                                    const struct switch_attr *attr,
1405                                    struct switch_val *val)
1406 {
1407         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1408         u32 data = 0;
1409
1410         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1411                 return -EINVAL;
1412
1413         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1414         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1415
1416         return 0;
1417 }
1418
1419 static int rtl8366_sw_reset_port_mibs(struct switch_dev *dev,
1420                                       const struct switch_attr *attr,
1421                                       struct switch_val *val)
1422 {
1423         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1424         u32 data = 0;
1425
1426         if (val->port_vlan >= RTL8366_NUM_PORTS)
1427                 return -EINVAL;
1428
1429         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1430         data |= (1 << (val->port_vlan + 3));
1431         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1432
1433         return 0;
1434 }
1435
1436 static int rtl8366_sw_get_port_mib(struct switch_dev *dev,
1437                                    const struct switch_attr *attr,
1438                                    struct switch_val *val)
1439 {
1440         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1441         int i, len = 0;
1442         unsigned long long counter = 0;
1443         char *buf = smi->buf;
1444
1445         if (val->port_vlan >= RTL8366_NUM_PORTS)
1446                 return -EINVAL;
1447
1448         len += snprintf(buf + len, sizeof(smi->buf) - len,
1449                         "Port %d MIB counters\n",
1450                         val->port_vlan);
1451
1452         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1453                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1454                                 "%d:%s\t", i, MIBCOUNTERS[i]);
1455                 if (!rtl8366_get_mib_counter(smi, i, val->port_vlan, &counter))
1456                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1457                                         "[%llu]\n", counter);
1458                 else
1459                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1460                                         "[error]\n");
1461         }
1462
1463         val->value.s = buf;
1464         val->len = len;
1465         return 0;
1466 }
1467
1468 static int rtl8366_sw_get_vlan_ports(struct switch_dev *dev,
1469                                      struct switch_val *val)
1470 {
1471         struct rtl8366s_vlanconfig vlanmc;
1472         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1473         struct switch_port *port;
1474         int i;
1475
1476         if (val->port_vlan >= RTL8366_NUM_VLANS)
1477                 return -EINVAL;
1478
1479         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1480
1481         port = &val->value.ports[0];
1482         val->len = 0;
1483         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1484                 if (!(vlanmc.member & BIT(i)))
1485                         continue;
1486
1487                 port->id = i;
1488                 port->flags = (vlanmc.untag & BIT(i)) ?
1489                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1490                 val->len++;
1491                 port++;
1492         }
1493         return 0;
1494 }
1495
1496 static int rtl8366_sw_set_vlan_ports(struct switch_dev *dev,
1497                                      struct switch_val *val)
1498 {
1499         struct rtl8366s_vlanconfig vlanmc;
1500         struct rtl8366s_vlan4kentry vlan4k;
1501         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1502         struct switch_port *port;
1503         int i;
1504
1505         if (val->port_vlan >= RTL8366_NUM_VLANS)
1506                 return -EINVAL;
1507
1508         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1509         rtl8366s_get_vlan_4k_entry(smi, vlanmc.vid, &vlan4k);
1510
1511         vlanmc.untag = 0;
1512         vlanmc.member = 0;
1513
1514         port = &val->value.ports[0];
1515         for (i = 0; i < val->len; i++, port++) {
1516                 vlanmc.member |= BIT(port->id);
1517
1518                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1519                         vlanmc.untag |= BIT(port->id);
1520         }
1521
1522         vlan4k.member = vlanmc.member;
1523         vlan4k.untag = vlanmc.untag;
1524
1525         rtl8366s_set_vlan_member_config(smi, val->port_vlan, &vlanmc);
1526         rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
1527         return 0;
1528 }
1529
1530 static int rtl8366_sw_get_port_pvid(struct switch_dev *dev, int port, int *val)
1531 {
1532         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1533         return rtl8366_get_vlan_port_pvid(smi, port, val);
1534 }
1535
1536 static int rtl8366_sw_set_port_pvid(struct switch_dev *dev, int port, int val)
1537 {
1538         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1539         return rtl8366_set_vlan_port_pvid(smi, port, val);
1540 }
1541
1542 static int rtl8366_sw_reset_switch(struct switch_dev *dev)
1543 {
1544         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1545         int timeout = 10;
1546         u32 data;
1547
1548         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
1549                               RTL8366_CHIP_CTRL_RESET_HW);
1550         do {
1551                 msleep(1);
1552                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
1553                         return -EIO;
1554
1555                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
1556                         break;
1557         } while (--timeout);
1558
1559         if (!timeout) {
1560                 printk("Timeout waiting for the switch to reset\n");
1561                 return -EIO;
1562         }
1563
1564         return rtl8366s_reset_vlan(smi);
1565 }
1566
1567 static struct switch_attr rtl8366_globals[] = {
1568         {
1569                 .type = SWITCH_TYPE_INT,
1570                 .name = "enable_vlan",
1571                 .description = "Enable VLAN mode",
1572                 .set = rtl8366_sw_set_vlan_enable,
1573                 .get = rtl8366_sw_get_vlan_enable,
1574                 .max = 1,
1575                 .ofs = 1
1576         }, {
1577                 .type = SWITCH_TYPE_INT,
1578                 .name = "enable_vlan4k",
1579                 .description = "Enable VLAN 4K mode",
1580                 .set = rtl8366_sw_set_vlan_enable,
1581                 .get = rtl8366_sw_get_vlan_enable,
1582                 .max = 1,
1583                 .ofs = 2
1584         }, {
1585                 .type = SWITCH_TYPE_INT,
1586                 .name = "reset_mibs",
1587                 .description = "Reset all MIB counters",
1588                 .set = rtl8366_sw_reset_mibs,
1589                 .get = NULL,
1590                 .max = 1
1591         }, {
1592                 .type = SWITCH_TYPE_INT,
1593                 .name = "blinkrate",
1594                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1595                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1596                 .set = rtl8366_sw_set_blinkrate,
1597                 .get = rtl8366_sw_get_blinkrate,
1598                 .max = 5
1599         },
1600 };
1601
1602 static struct switch_attr rtl8366_port[] = {
1603         {
1604                 .type = SWITCH_TYPE_STRING,
1605                 .name = "link",
1606                 .description = "Get port link information",
1607                 .max = 1,
1608                 .set = NULL,
1609                 .get = rtl8366_sw_get_port_link,
1610         }, {
1611                 .type = SWITCH_TYPE_INT,
1612                 .name = "reset_mib",
1613                 .description = "Reset single port MIB counters",
1614                 .max = 1,
1615                 .set = rtl8366_sw_reset_port_mibs,
1616                 .get = NULL,
1617         }, {
1618                 .type = SWITCH_TYPE_STRING,
1619                 .name = "mib",
1620                 .description = "Get MIB counters for port",
1621                 .max = 33,
1622                 .set = NULL,
1623                 .get = rtl8366_sw_get_port_mib,
1624         }, {
1625                 .type = SWITCH_TYPE_INT,
1626                 .name = "led",
1627                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1628                 .max = 15,
1629                 .set = rtl8366_sw_set_port_led,
1630                 .get = rtl8366_sw_get_port_led,
1631         },
1632 };
1633
1634 static struct switch_attr rtl8366_vlan[] = {
1635         {
1636                 .type = SWITCH_TYPE_STRING,
1637                 .name = "info",
1638                 .description = "Get vlan information",
1639                 .max = 1,
1640                 .set = NULL,
1641                 .get = rtl8366_sw_get_vlan_info,
1642         },
1643 };
1644
1645
1646 /* template */
1647 static struct switch_dev rtldev = {
1648         .name = "RTL8366S",
1649         .cpu_port = RTL8366_PORT_NUM_CPU,
1650         .ports = RTL8366_NUM_PORTS,
1651         .vlans = RTL8366_NUM_VLANS,
1652         .attr_global = {
1653                 .attr = rtl8366_globals,
1654                 .n_attr = ARRAY_SIZE(rtl8366_globals),
1655         },
1656         .attr_port = {
1657                 .attr = rtl8366_port,
1658                 .n_attr = ARRAY_SIZE(rtl8366_port),
1659         },
1660         .attr_vlan = {
1661                 .attr = rtl8366_vlan,
1662                 .n_attr = ARRAY_SIZE(rtl8366_vlan),
1663         },
1664
1665         .get_vlan_ports = rtl8366_sw_get_vlan_ports,
1666         .set_vlan_ports = rtl8366_sw_set_vlan_ports,
1667         .get_port_pvid = rtl8366_sw_get_port_pvid,
1668         .set_port_pvid = rtl8366_sw_set_port_pvid,
1669         .reset_switch = rtl8366_sw_reset_switch,
1670 };
1671
1672 static int rtl8366_smi_switch_init(struct rtl8366_smi *smi)
1673 {
1674         struct switch_dev *dev = &smi->dev;
1675         int err;
1676
1677         memcpy(dev, &rtldev, sizeof(struct switch_dev));
1678         dev->priv = smi;
1679         dev->devname = dev_name(&smi->pdev->dev);
1680
1681         err = register_switch(dev, NULL);
1682         if (err)
1683                 dev_err(&smi->pdev->dev, "switch registration failed\n");
1684
1685         return err;
1686 }
1687
1688 static void rtl8366_smi_switch_cleanup(struct rtl8366_smi *smi)
1689 {
1690         unregister_switch(&smi->dev);
1691 }
1692
1693 static int rtl8366_smi_mii_read(struct mii_bus *bus, int addr, int reg)
1694 {
1695         struct rtl8366_smi *smi = bus->priv;
1696         u32 val = 0;
1697         int err;
1698
1699         err = rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &val);
1700         if (err)
1701                 return 0xffff;
1702
1703         return val;
1704 }
1705
1706 static int rtl8366_smi_mii_write(struct mii_bus *bus, int addr, int reg,
1707                                      u16 val)
1708 {
1709         struct rtl8366_smi *smi = bus->priv;
1710         u32 t;
1711         int err;
1712
1713         err = rtl8366_smi_write_phy_reg(smi, addr, 0, reg, val);
1714         /* flush write */
1715         (void) rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &t);
1716
1717         return err;
1718 }
1719
1720 static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
1721 {
1722         int ret;
1723         int i;
1724
1725         smi->mii_bus = mdiobus_alloc();
1726         if (smi->mii_bus == NULL) {
1727                 ret = -ENOMEM;
1728                 goto err;
1729         }
1730
1731         spin_lock_init(&smi->lock);
1732         smi->mii_bus->priv = (void *) smi;
1733         smi->mii_bus->name = "rtl8366-smi";
1734         smi->mii_bus->read = rtl8366_smi_mii_read;
1735         smi->mii_bus->write = rtl8366_smi_mii_write;
1736         snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
1737                         dev_name(&smi->pdev->dev));
1738         smi->mii_bus->parent = &smi->pdev->dev;
1739         smi->mii_bus->phy_mask = ~(0x1f);
1740         smi->mii_bus->irq = smi->mii_irq;
1741         for (i = 0; i < PHY_MAX_ADDR; i++)
1742                 smi->mii_irq[i] = PHY_POLL;
1743
1744         ret = mdiobus_register(smi->mii_bus);
1745         if (ret)
1746                 goto err_free;
1747
1748         return 0;
1749
1750  err_free:
1751         mdiobus_free(smi->mii_bus);
1752  err:
1753         return ret;
1754 }
1755
1756 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
1757 {
1758         mdiobus_unregister(smi->mii_bus);
1759         mdiobus_free(smi->mii_bus);
1760 }
1761
1762 static int rtl8366_smi_mii_bus_match(struct mii_bus *bus)
1763 {
1764         return (bus->read == rtl8366_smi_mii_read &&
1765                 bus->write == rtl8366_smi_mii_write);
1766 }
1767
1768 static int rtl8366_smi_setup(struct rtl8366_smi *smi)
1769 {
1770         u32 chip_id = 0;
1771         u32 chip_ver = 0;
1772         int ret;
1773
1774         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1775         if (ret) {
1776                 dev_err(&smi->pdev->dev, "unable to read chip id\n");
1777                 return ret;
1778         }
1779
1780         switch (chip_id) {
1781         case RTL8366S_CHIP_ID_8366:
1782                 break;
1783         default:
1784                 dev_err(&smi->pdev->dev, "unknown chip id (%04x)\n", chip_id);
1785                 return -ENODEV;
1786         }
1787
1788         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1789                                    &chip_ver);
1790         if (ret) {
1791                 dev_err(&smi->pdev->dev, "unable to read chip version\n");
1792                 return ret;
1793         }
1794
1795         dev_info(&smi->pdev->dev, "RTL%04x ver. %u chip found\n",
1796                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1797
1798         rtl8366_debugfs_init(smi);
1799
1800         return 0;
1801 }
1802
1803 static int __init rtl8366_smi_probe(struct platform_device *pdev)
1804 {
1805         static int rtl8366_smi_version_printed;
1806         struct rtl8366_smi_platform_data *pdata;
1807         struct rtl8366_smi *smi;
1808         int err;
1809
1810         if (!rtl8366_smi_version_printed++)
1811                 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
1812                        " version " RTL8366_SMI_DRIVER_VER"\n");
1813
1814         pdata = pdev->dev.platform_data;
1815         if (!pdata) {
1816                 dev_err(&pdev->dev, "no platform data specified\n");
1817                 err = -EINVAL;
1818                 goto err_out;
1819         }
1820
1821         smi = kzalloc(sizeof(struct rtl8366_smi), GFP_KERNEL);
1822         if (!smi) {
1823                 dev_err(&pdev->dev, "no memory for private data\n");
1824                 err = -ENOMEM;
1825                 goto err_out;
1826         }
1827
1828         err = gpio_request(pdata->gpio_sda, dev_name(&pdev->dev));
1829         if (err) {
1830                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1831                         pdata->gpio_sda, err);
1832                 goto err_free_smi;
1833         }
1834
1835         err = gpio_request(pdata->gpio_sck, dev_name(&pdev->dev));
1836         if (err) {
1837                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1838                         pdata->gpio_sck, err);
1839                 goto err_free_sda;
1840         }
1841
1842         smi->pdev = pdev;
1843         smi->pdata = pdata;
1844         spin_lock_init(&smi->lock);
1845
1846         platform_set_drvdata(pdev, smi);
1847
1848         dev_info(&pdev->dev, "using GPIO pins %u (SDA) and %u (SCK)\n",
1849                  pdata->gpio_sda, pdata->gpio_sck);
1850
1851         err = rtl8366_smi_setup(smi);
1852         if (err)
1853                 goto err_clear_drvdata;
1854
1855         err = rtl8366_smi_mii_init(smi);
1856         if (err)
1857                 goto err_clear_drvdata;
1858
1859         err = rtl8366_smi_switch_init(smi);
1860         if (err)
1861                 goto err_mii_cleanup;
1862
1863         return 0;
1864
1865  err_mii_cleanup:
1866         rtl8366_smi_mii_cleanup(smi);
1867  err_clear_drvdata:
1868         platform_set_drvdata(pdev, NULL);
1869         gpio_free(pdata->gpio_sck);
1870  err_free_sda:
1871         gpio_free(pdata->gpio_sda);
1872  err_free_smi:
1873         kfree(smi);
1874  err_out:
1875         return err;
1876 }
1877
1878 static int rtl8366_phy_config_init(struct phy_device *phydev)
1879 {
1880         if (!rtl8366_smi_mii_bus_match(phydev->bus))
1881                 return -EINVAL;
1882
1883         return 0;
1884 }
1885
1886 static int rtl8366_phy_config_aneg(struct phy_device *phydev)
1887 {
1888         return 0;
1889 }
1890
1891 static struct phy_driver rtl8366_smi_phy_driver = {
1892         .phy_id         = 0x001cc960,
1893         .name           = "Realtek RTL8366",
1894         .phy_id_mask    = 0x1ffffff0,
1895         .features       = PHY_GBIT_FEATURES,
1896         .config_aneg    = rtl8366_phy_config_aneg,
1897         .config_init    = rtl8366_phy_config_init,
1898         .read_status    = genphy_read_status,
1899         .driver         = {
1900                 .owner = THIS_MODULE,
1901         },
1902 };
1903
1904 static int __devexit rtl8366_smi_remove(struct platform_device *pdev)
1905 {
1906         struct rtl8366_smi *smi = platform_get_drvdata(pdev);
1907
1908         if (smi) {
1909                 struct rtl8366_smi_platform_data *pdata;
1910
1911                 pdata = pdev->dev.platform_data;
1912
1913                 rtl8366_smi_switch_cleanup(smi);
1914                 rtl8366_debugfs_remove(smi);
1915                 rtl8366_smi_mii_cleanup(smi);
1916                 platform_set_drvdata(pdev, NULL);
1917                 gpio_free(pdata->gpio_sck);
1918                 gpio_free(pdata->gpio_sda);
1919                 kfree(smi);
1920         }
1921
1922         return 0;
1923 }
1924
1925 static struct platform_driver rtl8366_smi_driver = {
1926         .driver = {
1927                 .name           = RTL8366_SMI_DRIVER_NAME,
1928                 .owner          = THIS_MODULE,
1929         },
1930         .probe          = rtl8366_smi_probe,
1931         .remove         = __devexit_p(rtl8366_smi_remove),
1932 };
1933
1934 static int __init rtl8366_smi_init(void)
1935 {
1936         int ret;
1937         ret = platform_driver_register(&rtl8366_smi_driver);
1938         if (ret)
1939                 return ret;
1940
1941         ret = phy_driver_register(&rtl8366_smi_phy_driver);
1942         if (ret)
1943                 goto err_platform_unregister;
1944
1945         return 0;
1946
1947  err_platform_unregister:
1948         platform_driver_unregister(&rtl8366_smi_driver);
1949         return ret;
1950 }
1951 module_init(rtl8366_smi_init);
1952
1953 static void __exit rtl8366_smi_exit(void)
1954 {
1955         phy_driver_unregister(&rtl8366_smi_phy_driver);
1956         platform_driver_unregister(&rtl8366_smi_driver);
1957 }
1958 module_exit(rtl8366_smi_exit);
1959
1960 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC);
1961 MODULE_VERSION(RTL8366_SMI_DRIVER_VER);
1962 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1963 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1964 MODULE_LICENSE("GPL v2");
1965 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME);