target/linux/ar71xx/files/drivers/net/phy/rtl8366_smi.c

   1 /*
   2  * Platform driver for the Realtek RTL8366 ethernet switch
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/gpio.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/skbuff.h>
  20 #include <linux/switch.h>
  21 #include <linux/phy.h>
  22 #include <linux/rtl8366_smi.h>
  23
  24 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
  25 #include <linux/debugfs.h>
  26 #endif
  27
  28 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
  29 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
  30 #define RTL8366_SMI_DRIVER_VER  "0.1.1"
  31
  32 #define RTL8366S_PHY_NO_MAX                 4
  33 #define RTL8366S_PHY_PAGE_MAX               7
  34 #define RTL8366S_PHY_ADDR_MAX               31
  35
  36 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  37 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  38
  39 #define RTL8366_RESET_CTRL_REG              0x0100
  40 #define RTL8366_CHIP_CTRL_RESET_HW          1
  41 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  42
  43 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x0104
  44 #define RTL8366S_CHIP_VERSION_MASK          0xf
  45 #define RTL8366S_CHIP_ID_REG                0x0105
  46 #define RTL8366S_CHIP_ID_8366               0x8366
  47
  48 /* PHY registers control */
  49 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8028
  50 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8029
  51
  52 #define RTL8366S_PHY_CTRL_READ              1
  53 #define RTL8366S_PHY_CTRL_WRITE             0
  54
  55 #define RTL8366S_PHY_REG_MASK               0x1f
  56 #define RTL8366S_PHY_PAGE_OFFSET            5
  57 #define RTL8366S_PHY_PAGE_MASK              (0x7 << 5)
  58 #define RTL8366S_PHY_NO_OFFSET              9
  59 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  60
  61 #define RTL8366_SMI_ACK_RETRY_COUNT         5
  62 #define RTL8366_SMI_CLK_DELAY               10 /* nsec */
  63
  64 /* LED control registers */
  65 #define RTL8366_LED_BLINKRATE_REG           0x0420
  66 #define RTL8366_LED_BLINKRATE_BIT           0
  67 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  68
  69 #define RTL8366_LED_CTRL_REG                0x0421
  70 #define RTL8366_LED_0_1_CTRL_REG            0x0422
  71 #define RTL8366_LED_2_3_CTRL_REG            0x0423
  72
  73 #define RTL8366S_MIB_COUNT                  33
  74 #define RTL8366S_GLOBAL_MIB_COUNT           1
  75 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0040
  76 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  77 #define RTL8366S_MIB_CTRL_REG               0x11F0
  78 #define RTL8366S_MIB_CTRL_USER_MASK         0x01FF
  79 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  80 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0002
  81
  82 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  83 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  84 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  85
  86
  87 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0058
  88 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018B
  89 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  90
  91 #define RTL8366S_VLAN_TB_CTRL_REG           0x010F
  92
  93 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  94 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  95 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  96
  97 #define RTL8366S_VLAN_MEMCONF_BASE          0x0016
  98
  99
 100 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0060
 101 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 102 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 103 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 104 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 105 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 106 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 107
 108
 109 #define RTL8366_PORT_NUM_CPU                5
 110 #define RTL8366_NUM_PORTS                   6
 111 #define RTL8366_NUM_VLANS                   16
 112 #define RTL8366_NUM_LEDGROUPS               4
 113 #define RTL8366_NUM_VIDS                    4096
 114 #define RTL8366S_PRIORITYMAX                7
 115 #define RTL8366S_FIDMAX                     7
 116
 117
 118 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 119 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 120 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 121 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 122
 123 #define RTL8366_PORT_UNKNOWN                (1 << 4) /* No known connection */
 124 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 125
 126 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 127                                              RTL8366_PORT_2 |       \
 128                                              RTL8366_PORT_3 |       \
 129                                              RTL8366_PORT_4 |       \
 130                                              RTL8366_PORT_UNKNOWN | \
 131                                              RTL8366_PORT_CPU)
 132
 133 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 134                                              RTL8366_PORT_2 |       \
 135                                              RTL8366_PORT_3 |       \
 136                                              RTL8366_PORT_4 |       \
 137                                              RTL8366_PORT_UNKNOWN)
 138
 139 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 140                                              RTL8366_PORT_2 |       \
 141                                              RTL8366_PORT_3 |       \
 142                                              RTL8366_PORT_4)
 143
 144 #define RTL8366_PORT_ALL_INTERNAL           (RTL8366_PORT_UNKNOWN | \
 145                                              RTL8366_PORT_CPU)
 146
 147 struct rtl8366s_vlanconfig {
 148         u16     reserved2:1;
 149         u16     priority:3;
 150         u16     vid:12;
 151
 152         u16     reserved1:1;
 153         u16     fid:3;
 154         u16     untag:6;
 155         u16     member:6;
 156 };
 157
 158 struct rtl8366s_vlan4kentry {
 159         u16     reserved1:4;
 160         u16     vid:12;
 161
 162         u16     reserved2:1;
 163         u16     fid:3;
 164         u16     untag:6;
 165         u16     member:6;
 166 };
 167
 168 static const char *MIBCOUNTERS[] = {
 169         "IfInOctets                        ",
 170         "EtherStatsOctets                  ",
 171         "EtherStatsUnderSizePkts           ",
 172         "EtherFregament                    ",
 173         "EtherStatsPkts64Octets            ",
 174         "EtherStatsPkts65to127Octets       ",
 175         "EtherStatsPkts128to255Octets      ",
 176         "EtherStatsPkts256to511Octets      ",
 177         "EtherStatsPkts512to1023Octets     ",
 178         "EtherStatsPkts1024to1518Octets    ",
 179         "EtherOversizeStats                ",
 180         "EtherStatsJabbers                 ",
 181         "IfInUcastPkts                     ",
 182         "EtherStatsMulticastPkts           ",
 183         "EtherStatsBroadcastPkts           ",
 184         "EtherStatsDropEvents              ",
 185         "Dot3StatsFCSErrors                ",
 186         "Dot3StatsSymbolErrors             ",
 187         "Dot3InPauseFrames                 ",
 188         "Dot3ControlInUnknownOpcodes       ",
 189         "IfOutOctets                       ",
 190         "Dot3StatsSingleCollisionFrames    ",
 191         "Dot3StatMultipleCollisionFrames   ",
 192         "Dot3sDeferredTransmissions        ",
 193         "Dot3StatsLateCollisions           ",
 194         "EtherStatsCollisions              ",
 195         "Dot3StatsExcessiveCollisions      ",
 196         "Dot3OutPauseFrames                ",
 197         "Dot1dBasePortDelayExceededDiscards",
 198         "Dot1dTpPortInDiscards             ",
 199         "IfOutUcastPkts                    ",
 200         "IfOutMulticastPkts                ",
 201         "IfOutBroadcastPkts                ",
 202         NULL,
 203 };
 204
 205 struct rtl8366_smi {
 206         struct platform_device             *pdev;
 207         struct rtl8366_smi_platform_data   *pdata;
 208         spinlock_t                         lock;
 209         struct mii_bus                     *mii_bus;
 210         struct switch_dev                  dev;
 211         int                                mii_irq[PHY_MAX_ADDR];
 212         char                               buf[4096];
 213 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 214         struct dentry                      *debugfs_root;
 215 #endif
 216 };
 217
 218 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 219 u16 g_dbg_reg;
 220 #endif
 221
 222 static inline struct rtl8366_smi *sw_to_rtl8366(struct switch_dev *sw)
 223 {
 224         return container_of(sw, struct rtl8366_smi, dev);
 225 }
 226
 227 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
 228 {
 229         ndelay(RTL8366_SMI_CLK_DELAY);
 230 }
 231
 232 static void rtl8366_smi_start(struct rtl8366_smi *smi)
 233 {
 234         unsigned int sda = smi->pdata->gpio_sda;
 235         unsigned int sck = smi->pdata->gpio_sck;
 236
 237         /*
 238          * Set GPIO pins to output mode, with initial state:
 239          * SCK = 0, SDA = 1
 240          */
 241         gpio_direction_output(sck, 0);
 242         gpio_direction_output(sda, 1);
 243         rtl8366_smi_clk_delay(smi);
 244
 245         /* CLK 1: 0 -> 1, 1 -> 0 */
 246         gpio_set_value(sck, 1);
 247         rtl8366_smi_clk_delay(smi);
 248         gpio_set_value(sck, 0);
 249         rtl8366_smi_clk_delay(smi);
 250
 251         /* CLK 2: */
 252         gpio_set_value(sck, 1);
 253         rtl8366_smi_clk_delay(smi);
 254         gpio_set_value(sda, 0);
 255         rtl8366_smi_clk_delay(smi);
 256         gpio_set_value(sck, 0);
 257         rtl8366_smi_clk_delay(smi);
 258         gpio_set_value(sda, 1);
 259 }
 260
 261 static void rtl8366_smi_stop(struct rtl8366_smi *smi)
 262 {
 263         unsigned int sda = smi->pdata->gpio_sda;
 264         unsigned int sck = smi->pdata->gpio_sck;
 265
 266         rtl8366_smi_clk_delay(smi);
 267         gpio_set_value(sda, 0);
 268         gpio_set_value(sck, 1);
 269         rtl8366_smi_clk_delay(smi);
 270         gpio_set_value(sda, 1);
 271         rtl8366_smi_clk_delay(smi);
 272         gpio_set_value(sck, 1);
 273         rtl8366_smi_clk_delay(smi);
 274         gpio_set_value(sck, 0);
 275         rtl8366_smi_clk_delay(smi);
 276         gpio_set_value(sck, 1);
 277
 278         /* add a click */
 279         rtl8366_smi_clk_delay(smi);
 280         gpio_set_value(sck, 0);
 281         rtl8366_smi_clk_delay(smi);
 282         gpio_set_value(sck, 1);
 283
 284         /* set GPIO pins to input mode */
 285         gpio_direction_input(sda);
 286         gpio_direction_input(sck);
 287 }
 288
 289 static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
 290 {
 291         unsigned int sda = smi->pdata->gpio_sda;
 292         unsigned int sck = smi->pdata->gpio_sck;
 293
 294         for (; len > 0; len--) {
 295                 rtl8366_smi_clk_delay(smi);
 296
 297                 /* prepare data */
 298                 if ( data & ( 1 << (len - 1)) )
 299                         gpio_set_value(sda, 1);
 300                 else
 301                         gpio_set_value(sda, 0);
 302                 rtl8366_smi_clk_delay(smi);
 303
 304                 /* clocking */
 305                 gpio_set_value(sck, 1);
 306                 rtl8366_smi_clk_delay(smi);
 307                 gpio_set_value(sck, 0);
 308         }
 309 }
 310
 311 static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
 312 {
 313         unsigned int sda = smi->pdata->gpio_sda;
 314         unsigned int sck = smi->pdata->gpio_sck;
 315
 316         gpio_direction_input(sda);
 317
 318         for (*data = 0; len > 0; len--) {
 319                 u32 u;
 320
 321                 rtl8366_smi_clk_delay(smi);
 322
 323                 /* clocking */
 324                 gpio_set_value(sck, 1);
 325                 rtl8366_smi_clk_delay(smi);
 326                 u = gpio_get_value(sda);
 327                 gpio_set_value(sck, 0);
 328
 329                 *data |= (u << (len - 1));
 330         }
 331
 332         gpio_direction_output(sda, 0);
 333 }
 334
 335 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
 336 {
 337         int retry_cnt;
 338
 339         retry_cnt = 0;
 340         do {
 341                 u32 ack;
 342
 343                 rtl8366_smi_read_bits(smi, 1, &ack);
 344                 if (ack == 0)
 345                         break;
 346
 347                 if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
 348                         return -EIO;
 349         } while (1);
 350
 351         return 0;
 352 }
 353
 354 static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
 355 {
 356         rtl8366_smi_write_bits(smi, data, 8);
 357         return rtl8366_smi_wait_for_ack(smi);
 358 }
 359
 360 static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
 361 {
 362         u32 t;
 363
 364         /* read data */
 365         rtl8366_smi_read_bits(smi, 8, &t);
 366         *data = (t & 0xff);
 367
 368         /* send an ACK */
 369         rtl8366_smi_write_bits(smi, 0x00, 1);
 370
 371         return 0;
 372 }
 373
 374 static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
 375 {
 376         u32 t;
 377
 378         /* read data */
 379         rtl8366_smi_read_bits(smi, 8, &t);
 380         *data = (t & 0xff);
 381
 382         /* send an ACK */
 383         rtl8366_smi_write_bits(smi, 0x01, 1);
 384
 385         return 0;
 386 }
 387
 388 static int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
 389 {
 390         unsigned long flags;
 391         u8 lo = 0;
 392         u8 hi = 0;
 393         int ret;
 394
 395         spin_lock_irqsave(&smi->lock, flags);
 396
 397         rtl8366_smi_start(smi);
 398
 399         /* send READ command */
 400         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
 401         if (ret)
 402                 goto out;
 403
 404         /* set ADDR[7:0] */
 405         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 406         if (ret)
 407                 goto out;
 408
 409         /* set ADDR[15:8] */
 410         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 411         if (ret)
 412                 goto out;
 413
 414         /* read DATA[7:0] */
 415         rtl8366_smi_read_byte0(smi, &lo);
 416         /* read DATA[15:8] */
 417         rtl8366_smi_read_byte1(smi, &hi);
 418
 419         *data = ((u32) lo) | (((u32) hi) << 8);
 420
 421         ret = 0;
 422
 423  out:
 424         rtl8366_smi_stop(smi);
 425         spin_unlock_irqrestore(&smi->lock, flags);
 426
 427         return ret;
 428 }
 429
 430 static int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
 431 {
 432         unsigned long flags;
 433         int ret;
 434
 435         spin_lock_irqsave(&smi->lock, flags);
 436
 437         rtl8366_smi_start(smi);
 438
 439         /* send WRITE command */
 440         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
 441         if (ret)
 442                 goto out;
 443
 444         /* set ADDR[7:0] */
 445         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 446         if (ret)
 447                 goto out;
 448
 449         /* set ADDR[15:8] */
 450         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 451         if (ret)
 452                 goto out;
 453
 454         /* write DATA[7:0] */
 455         ret = rtl8366_smi_write_byte(smi, data & 0xff);
 456         if (ret)
 457                 goto out;
 458
 459         /* write DATA[15:8] */
 460         ret = rtl8366_smi_write_byte(smi, data >> 8);
 461         if (ret)
 462                 goto out;
 463
 464         ret = 0;
 465
 466  out:
 467         rtl8366_smi_stop(smi);
 468         spin_unlock_irqrestore(&smi->lock, flags);
 469
 470         return ret;
 471 }
 472
 473 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi *smi,
 474                                     u32 phy_no, u32 page, u32 addr, u32 *data)
 475 {
 476         u32 reg;
 477         int ret;
 478
 479         if (phy_no > RTL8366S_PHY_NO_MAX)
 480                 return -EINVAL;
 481
 482         if (page > RTL8366S_PHY_PAGE_MAX)
 483                 return -EINVAL;
 484
 485         if (addr > RTL8366S_PHY_ADDR_MAX)
 486                 return -EINVAL;
 487
 488         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 489                                     RTL8366S_PHY_CTRL_READ);
 490         if (ret)
 491                 return ret;
 492
 493         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 494               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 495               (addr & RTL8366S_PHY_REG_MASK);
 496
 497         ret = rtl8366_smi_write_reg(smi, reg, 0);
 498         if (ret)
 499                 return ret;
 500
 501         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 502         if (ret)
 503                 return ret;
 504
 505         return 0;
 506 }
 507
 508 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi *smi,
 509                                      u32 phy_no, u32 page, u32 addr, u32 data)
 510 {
 511         u32 reg;
 512         int ret;
 513
 514         if (phy_no > RTL8366S_PHY_NO_MAX)
 515                 return -EINVAL;
 516
 517         if (page > RTL8366S_PHY_PAGE_MAX)
 518                 return -EINVAL;
 519
 520         if (addr > RTL8366S_PHY_ADDR_MAX)
 521                 return -EINVAL;
 522
 523         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 524                                     RTL8366S_PHY_CTRL_WRITE);
 525         if (ret)
 526                 return ret;
 527
 528         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 529               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 530               (addr & RTL8366S_PHY_REG_MASK);
 531
 532         ret = rtl8366_smi_write_reg(smi, reg, data);
 533         if (ret)
 534                 return ret;
 535
 536         return 0;
 537 }
 538
 539 static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter,
 540                                    int port, unsigned long long *val)
 541 {
 542         int i;
 543         int err;
 544         u32 addr, data, regoffset;
 545         u64 mibvalue;
 546
 547         /* address offset to MIBs counter */
 548         const u16 mibLength[RTL8366S_MIB_COUNT] = {4, 4, 2, 2, 2, 2, 2, 2, 2,
 549                                                    2, 2, 2, 2, 2, 2, 2, 2, 2,
 550                                                    2, 2, 4, 2, 2, 2, 2, 2, 2,
 551                                                    2, 2, 2, 2, 2, 2};
 552
 553         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 554                 return -EINVAL;
 555
 556         i = 0;
 557         regoffset = RTL8366S_MIB_COUNTER_PORT_OFFSET * (port);
 558
 559         while (i < counter) {
 560                 regoffset += mibLength[i];
 561                 i++;
 562         }
 563
 564         addr = RTL8366S_MIB_COUNTER_BASE + regoffset;
 565
 566         /*
 567          * Writing access counter address first
 568          * then ASIC will prepare 64bits counter wait for being retrived
 569          */
 570         data = 0; /* writing data will be discard by ASIC */
 571         err = rtl8366_smi_write_reg(smi, addr, data);
 572         if (err)
 573                 return err;
 574
 575         /* read MIB control register */
 576         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 577         if (err)
 578                 return err;
 579
 580         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 581                 return -EBUSY;
 582
 583         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 584                 return -EIO;
 585
 586         mibvalue = 0;
 587         addr = addr + mibLength[counter] - 1;
 588         i = mibLength[counter];
 589
 590         while (i) {
 591                 err = rtl8366_smi_read_reg(smi, addr, &data);
 592                 if (err)
 593                         return err;
 594
 595                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 596
 597                 addr--;
 598                 i--;
 599         }
 600
 601         *val = mibvalue;
 602         return 0;
 603 }
 604
 605 static int rtl8366s_get_vlan_4k_entry(struct rtl8366_smi *smi, u32 vid,
 606                                       struct rtl8366s_vlan4kentry *vlan4k)
 607 {
 608         int err;
 609         u32 data;
 610         u16 *tableaddr;
 611
 612         memset(vlan4k, '\0', sizeof(struct rtl8366s_vlan4kentry));
 613         vlan4k->vid = vid;
 614
 615         if (vid >= RTL8366_NUM_VIDS)
 616                 return -EINVAL;
 617
 618         tableaddr = (u16 *)vlan4k;
 619
 620         /* write VID */
 621         data = *tableaddr;
 622         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 623         if (err)
 624                 return err;
 625
 626         /* write table access control word */
 627         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 628                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 629         if (err)
 630                 return err;
 631
 632         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 633         if (err)
 634                 return err;
 635
 636         *tableaddr = data;
 637         tableaddr++;
 638
 639         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 640                                    &data);
 641         if (err)
 642                 return err;
 643
 644         *tableaddr = data;
 645         vlan4k->vid = vid;
 646
 647         return 0;
 648 }
 649
 650 static int rtl8366s_set_vlan_4k_entry(struct rtl8366_smi *smi,
 651                                       const struct rtl8366s_vlan4kentry *vlan4k)
 652 {
 653         int err;
 654         u32 data;
 655         u16 *tableaddr;
 656
 657         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 658             vlan4k->member > RTL8366_PORT_ALL ||
 659             vlan4k->untag > RTL8366_PORT_ALL ||
 660             vlan4k->fid > RTL8366S_FIDMAX)
 661                 return -EINVAL;
 662
 663         tableaddr = (u16 *)vlan4k;
 664
 665         data = *tableaddr;
 666
 667         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 668         if (err)
 669                 return err;
 670
 671         tableaddr++;
 672
 673         data = *tableaddr;
 674
 675         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1,
 676                                     data);
 677         if (err)
 678                 return err;
 679
 680         /* write table access control word */
 681         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 682                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 683
 684         return err;
 685 }
 686
 687 static int rtl8366s_get_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 688                                            struct rtl8366s_vlanconfig *vlanmc)
 689 {
 690         int err;
 691         u32 addr;
 692         u32 data;
 693         u16 *tableaddr;
 694
 695         memset(vlanmc, '\0', sizeof(struct rtl8366s_vlanconfig));
 696
 697         if (index >= RTL8366_NUM_VLANS)
 698                 return -EINVAL;
 699
 700         tableaddr = (u16 *)vlanmc;
 701
 702         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 703         err = rtl8366_smi_read_reg(smi, addr, &data);
 704         if (err)
 705                 return err;
 706
 707         *tableaddr = data;
 708         tableaddr++;
 709
 710         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 711         err = rtl8366_smi_read_reg(smi, addr, &data);
 712         if (err)
 713                 return err;
 714
 715         *tableaddr = data;
 716
 717         return 0;
 718 }
 719
 720 static int rtl8366s_set_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 721                                            const struct rtl8366s_vlanconfig
 722                                            *vlanmc)
 723 {
 724         int err;
 725         u32 addr;
 726         u32 data;
 727         u16 *tableaddr;
 728
 729         if (index >= RTL8366_NUM_VLANS ||
 730             vlanmc->vid >= RTL8366_NUM_VIDS ||
 731             vlanmc->priority > RTL8366S_PRIORITYMAX ||
 732             vlanmc->member > RTL8366_PORT_ALL ||
 733             vlanmc->untag > RTL8366_PORT_ALL ||
 734             vlanmc->fid > RTL8366S_FIDMAX)
 735                 return -EINVAL;
 736
 737         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 738
 739         tableaddr = (u16 *)vlanmc;
 740         data = *tableaddr;
 741
 742         err = rtl8366_smi_write_reg(smi, addr, data);
 743         if (err)
 744                 return err;
 745
 746         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 747
 748         tableaddr++;
 749         data = *tableaddr;
 750
 751         err = rtl8366_smi_write_reg(smi, addr, data);
 752         if (err)
 753                 return err;
 754
 755         return 0;
 756 }
 757
 758 static int rtl8366_get_port_vlan_index(struct rtl8366_smi *smi, int port,
 759                                        int *val)
 760 {
 761         int err;
 762         u32 addr;
 763         u32 data;
 764
 765         /* bits mapping to port vlan control register of port n */
 766         const u16 bits[RTL8366_NUM_PORTS] = { 0x000F, 0x00F0, 0x0F00,
 767                                              0xF000, 0x000F, 0x00F0 };
 768         /* bits offset to port vlan control register of port n */
 769         const u16 bitoffset[RTL8366_NUM_PORTS] = { 0, 4, 8, 12, 0, 4 };
 770         /* address offset to port vlan control register of port n */
 771         const u16 addroffset[RTL8366_NUM_PORTS] = { 0, 0, 0, 0, 1, 1 };
 772
 773         if (port >= RTL8366_NUM_PORTS)
 774                 return -EINVAL;
 775
 776         addr = RTL8366S_PORT_VLAN_CTRL_BASE + addroffset[port];
 777         err = rtl8366_smi_read_reg(smi, addr, &data);
 778         if (err)
 779                 return err;
 780
 781         *val = (data & bits[port]) >> bitoffset[port];
 782
 783         return 0;
 784
 785 }
 786
 787 static int rtl8366_get_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 788                                       int *val)
 789 {
 790         struct rtl8366s_vlanconfig vlanmc;
 791         int err;
 792         int index;
 793
 794         err = rtl8366_get_port_vlan_index(smi, port, &index);
 795         if (err)
 796                 return err;
 797
 798         err = rtl8366s_get_vlan_member_config(smi, index, &vlanmc);
 799         if (err)
 800                 return err;
 801
 802         *val = vlanmc.vid;
 803         return 0;
 804 }
 805
 806 static int rtl8366_set_port_vlan_index(struct rtl8366_smi *smi, int port,
 807                                        int index)
 808 {
 809         int err;
 810         u32 addr;
 811         u32 data;
 812         u32 vlan_data;
 813         u32 bits;
 814
 815         /* bits mapping to port vlan control register of port n */
 816         const u16 bitmasks[6] = { 0x000F, 0x00F0, 0x0F00,
 817                                  0xF000, 0x000F, 0x00F0 };
 818         /* bits offset to port vlan control register of port n */
 819         const u16 bitOff[6] = { 0, 4, 8, 12, 0, 4 };
 820         /* address offset to port vlan control register of port n */
 821         const u16 addrOff[6] = { 0, 0, 0, 0, 1, 1 };
 822
 823         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 824                 return -EINVAL;
 825
 826         addr = RTL8366S_PORT_VLAN_CTRL_BASE + addrOff[port];
 827
 828         bits = bitmasks[port];
 829
 830         data = (index << bitOff[port]) & bits;
 831
 832         err = rtl8366_smi_read_reg(smi, addr, &vlan_data);
 833         if (err)
 834                 return err;
 835
 836         vlan_data &= ~(vlan_data & bits);
 837         vlan_data |= data;
 838
 839         err = rtl8366_smi_write_reg(smi, addr, vlan_data);
 840         if (err)
 841                 return err;
 842
 843         return 0;
 844 }
 845
 846 static int rtl8366_set_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 847                                       int val)
 848 {
 849         int i;
 850         struct rtl8366s_vlanconfig vlanmc;
 851         struct rtl8366s_vlan4kentry vlan4k;
 852
 853         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 854                 return -EINVAL;
 855
 856         /* Updating the 4K entry; lookup it and change the port member set */
 857         rtl8366s_get_vlan_4k_entry(smi, val, &vlan4k);
 858         vlan4k.member |= ((1 << port) | RTL8366_PORT_CPU);
 859         vlan4k.untag = RTL8366_PORT_ALL_BUT_CPU;
 860         rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
 861
 862         /*
 863          * For the 16 entries more work needs to be done. First see if such
 864          * VID is already there and change it
 865          */
 866         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 867                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
 868
 869                 /* Try to find an existing vid and update port member set */
 870                 if (val == vlanmc.vid) {
 871                         vlanmc.member |= ((1 << port) | RTL8366_PORT_CPU);
 872                         rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 873
 874                         /* Now update PVID register settings */
 875                         rtl8366_set_port_vlan_index(smi, port, i);
 876
 877                         return 0;
 878                 }
 879         }
 880
 881         /*
 882          * PVID could not be found from vlan table. Replace unused (one that
 883          * has no member ports) with new one
 884          */
 885         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 886                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
 887
 888                 /*
 889                  * See if this vlan member configuration is unused. It is
 890                  * unused if member set contains no ports or CPU port only
 891                  */
 892                 if (!vlanmc.member || vlanmc.member == RTL8366_PORT_CPU) {
 893                         vlanmc.vid = val;
 894                         vlanmc.priority = 0;
 895                         vlanmc.untag = RTL8366_PORT_ALL_BUT_CPU;
 896                         vlanmc.member = ((1 << port) | RTL8366_PORT_CPU);
 897                         vlanmc.fid = 0;
 898
 899                         rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 900
 901                         /* Now update PVID register settings */
 902                         rtl8366_set_port_vlan_index(smi, port, i);
 903
 904                         return 0;
 905                 }
 906         }
 907
 908         dev_err(&smi->pdev->dev,
 909                 "All 16 vlan member configurations are in use\n");
 910
 911         return -EINVAL;
 912 }
 913
 914
 915 static int rtl8366_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
 916 {
 917         u32 data = 0;
 918
 919         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 920
 921         data &= ~(data & RTL8366_CHIP_CTRL_VLAN);
 922         if (enable)
 923                 data |= RTL8366_CHIP_CTRL_VLAN;
 924
 925         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 926 }
 927
 928 static int rtl8366_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
 929 {
 930         u32 data = 0;
 931
 932         rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 933
 934         data &= ~(data & 1);
 935         if (enable)
 936                 data |= 1;
 937
 938         return rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, data);
 939 }
 940
 941 static int rtl8366s_reset_vlan(struct rtl8366_smi *smi)
 942 {
 943         struct rtl8366s_vlan4kentry vlan4k;
 944         struct rtl8366s_vlanconfig vlanmc;
 945         int err;
 946         int i;
 947
 948         /* clear 16 VLAN member configuration */
 949         vlanmc.vid = 0;
 950         vlanmc.priority = 0;
 951         vlanmc.member = 0;
 952         vlanmc.untag = 0;
 953         vlanmc.fid = 0;
 954         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 955                 err = rtl8366s_set_vlan_member_config(smi, i, &vlanmc);
 956                 if (err)
 957                         return err;
 958         }
 959
 960         /* Set a default VLAN with vid 1 to 4K table for all ports */
 961         vlan4k.vid = 1;
 962         vlan4k.member = RTL8366_PORT_ALL;
 963         vlan4k.untag = RTL8366_PORT_ALL;
 964         vlan4k.fid = 0;
 965         err = rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
 966         if (err)
 967                 return err;
 968
 969         /* Set all ports PVID to default VLAN */
 970         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 971                 err = rtl8366_set_vlan_port_pvid(smi, i, 0);
 972                 if (err)
 973                         return err;
 974         }
 975
 976         return 0;
 977 }
 978
 979 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
 980 static int rtl8366_debugfs_open(struct inode *inode, struct file *file)
 981 {
 982         file->private_data = inode->i_private;
 983         return 0;
 984 }
 985
 986 static ssize_t rtl8366_read_debugfs_mibs(struct file *file,
 987                                          char __user *user_buf,
 988                                          size_t count, loff_t *ppos)
 989 {
 990         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
 991         int i, j, len = 0;
 992         char *buf = smi->buf;
 993
 994         len += snprintf(buf + len, sizeof(smi->buf) - len, "MIB Counters:\n");
 995         len += snprintf(buf + len, sizeof(smi->buf) - len, "Counter"
 996                         "                            "
 997                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 998                         "Port 4\n");
 999
1000         for (i = 0; i < 33; ++i) {
1001                 len += snprintf(buf + len, sizeof(smi->buf) - len, "%d:%s ",
1002                                 i, MIBCOUNTERS[i]);
1003                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
1004                         unsigned long long counter = 0;
1005
1006                         if (!rtl8366_get_mib_counter(smi, i, j, &counter))
1007                                 len += snprintf(buf + len,
1008                                                 sizeof(smi->buf) - len,
1009                                                 "[%llu]", counter);
1010                         else
1011                                 len += snprintf(buf + len,
1012                                                 sizeof(smi->buf) - len,
1013                                                 "[error]");
1014
1015                         if (j != RTL8366_NUM_PORTS - 1) {
1016                                 if (counter < 100000)
1017                                         len += snprintf(buf + len,
1018                                                         sizeof(smi->buf) - len,
1019                                                         "\t");
1020
1021                                 len += snprintf(buf + len,
1022                                                 sizeof(smi->buf) - len,
1023                                                 "\t");
1024                         }
1025                 }
1026                 len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1027         }
1028
1029         len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1030
1031         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1032 }
1033
1034 static ssize_t rtl8366_read_debugfs_vlan(struct file *file,
1035                                          char __user *user_buf,
1036                                          size_t count, loff_t *ppos)
1037 {
1038         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1039         int i, j, len = 0;
1040         char *buf = smi->buf;
1041
1042         len += snprintf(buf + len, sizeof(smi->buf) - len,
1043                         "VLAN Member Config:\n");
1044         len += snprintf(buf + len, sizeof(smi->buf) - len,
1045                         "\t id \t vid \t prio \t member \t untag  \t fid "
1046                         "\tports\n");
1047
1048         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
1049                 struct rtl8366s_vlanconfig vlanmc;
1050
1051                 rtl8366s_get_vlan_member_config(smi, i, &vlanmc);
1052
1053                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1054                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
1055                                 "\t", i, vlanmc.vid, vlanmc.priority,
1056                                 vlanmc.member, vlanmc.untag, vlanmc.fid);
1057
1058                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
1059                         int index = 0;
1060                         if (!rtl8366_get_port_vlan_index(smi, j, &index)) {
1061                                 if (index == i)
1062                                         len += snprintf(buf + len,
1063                                                         sizeof(smi->buf) - len,
1064                                                         "%d", j);
1065                         }
1066                 }
1067                 len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1068         }
1069
1070         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1071 }
1072
1073 static ssize_t rtl8366_read_debugfs_reg(struct file *file,
1074                                         char __user *user_buf,
1075                                         size_t count, loff_t *ppos)
1076 {
1077         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1078         u32 t, reg = g_dbg_reg;
1079         int err, len = 0;
1080         char *buf = smi->buf;
1081
1082         memset(buf, '\0', sizeof(smi->buf));
1083
1084         err = rtl8366_smi_read_reg(smi, reg, &t);
1085         if (err) {
1086                 len += snprintf(buf, sizeof(smi->buf),
1087                                 "Read failed (reg: 0x%04x)\n", reg);
1088                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1089         }
1090
1091         len += snprintf(buf, sizeof(smi->buf), "reg = 0x%04x, val = 0x%04x\n",
1092                         reg, t);
1093
1094         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1095 }
1096
1097 static ssize_t rtl8366_write_debugfs_reg(struct file *file,
1098                                          const char __user *user_buf,
1099                                          size_t count, loff_t *ppos)
1100 {
1101         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1102         unsigned long data;
1103         u32 reg = g_dbg_reg;
1104         int err;
1105         size_t len;
1106         char *buf = smi->buf;
1107
1108         len = min(count, sizeof(smi->buf) - 1);
1109         if (copy_from_user(buf, user_buf, len)) {
1110                 dev_err(&smi->pdev->dev, "copy from user failed\n");
1111                 return -EFAULT;
1112         }
1113
1114         buf[len] = '\0';
1115         if (len > 0 && buf[len - 1] == '\n')
1116                 buf[len - 1] = '\0';
1117
1118
1119         if (strict_strtoul(buf, 16, &data)) {
1120                 dev_err(&smi->pdev->dev, "Invalid reg value %s\n", buf);
1121         } else {
1122                 err = rtl8366_smi_write_reg(smi, reg, data);
1123                 if (err) {
1124                         dev_err(&smi->pdev->dev,
1125                                 "writing reg 0x%04x val 0x%04lx failed\n",
1126                                 reg, data);
1127                 }
1128         }
1129
1130         return count;
1131 }
1132
1133 static const struct file_operations fops_rtl8366_regs = {
1134         .read = rtl8366_read_debugfs_reg,
1135         .write = rtl8366_write_debugfs_reg,
1136         .open = rtl8366_debugfs_open,
1137         .owner = THIS_MODULE
1138 };
1139
1140 static const struct file_operations fops_rtl8366_vlan = {
1141         .read = rtl8366_read_debugfs_vlan,
1142         .open = rtl8366_debugfs_open,
1143         .owner = THIS_MODULE
1144 };
1145
1146 static const struct file_operations fops_rtl8366_mibs = {
1147         .read = rtl8366_read_debugfs_mibs,
1148         .open = rtl8366_debugfs_open,
1149         .owner = THIS_MODULE
1150 };
1151
1152 static void rtl8366_debugfs_init(struct rtl8366_smi *smi)
1153 {
1154         struct dentry *node;
1155         struct dentry *root;
1156
1157         if (!smi->debugfs_root)
1158                 smi->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
1159
1160         if (!smi->debugfs_root) {
1161                 dev_err(&smi->pdev->dev, "Unable to create debugfs dir\n");
1162                 return;
1163         }
1164         root = smi->debugfs_root;
1165
1166         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
1167         if (!node) {
1168                 dev_err(&smi->pdev->dev, "Creating debugfs file reg failed\n");
1169                 return;
1170         }
1171
1172         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, smi,
1173                                    &fops_rtl8366_regs);
1174         if (!node) {
1175                 dev_err(&smi->pdev->dev, "Creating debugfs file val failed\n");
1176                 return;
1177         }
1178
1179         node = debugfs_create_file("vlan", S_IRUSR, root, smi,
1180                                    &fops_rtl8366_vlan);
1181         if (!node) {
1182                 dev_err(&smi->pdev->dev,
1183                         "Creating debugfs file vlan failed\n");
1184                 return;
1185         }
1186
1187         node = debugfs_create_file("mibs", S_IRUSR, root, smi,
1188                                    &fops_rtl8366_mibs);
1189         if (!node) {
1190                 dev_err(&smi->pdev->dev,
1191                         "Creating debugfs file mibs failed\n");
1192                 return;
1193         }
1194 }
1195
1196 static void rtl8366_debugfs_remove(struct rtl8366_smi *smi)
1197 {
1198         if (smi->debugfs_root) {
1199                 debugfs_remove_recursive(smi->debugfs_root);
1200                 smi->debugfs_root = NULL;
1201         }
1202 }
1203
1204 #else
1205 static inline void rtl8366_debugfs_init(struct rtl8366_smi *smi) {}
1206 static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {}
1207 #endif /* CONFIG_RTL8366_SMI_DEBUG_FS */
1208
1209 static int rtl8366_global_reset_mibs(struct switch_dev *dev,
1210                                      const struct switch_attr *attr,
1211                                      struct switch_val *val)
1212 {
1213         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1214         u32 data = 0;
1215
1216         if (val->value.i == 1) {
1217                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1218                 data |= (1 << 2);
1219                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1220         }
1221
1222         return 0;
1223 }
1224
1225 static int rtl8366_get_vlan(struct switch_dev *dev,
1226                             const struct switch_attr *attr,
1227                             struct switch_val *val)
1228 {
1229         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1230         u32 data;
1231
1232         if (attr->ofs == 1) {
1233                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1234
1235                 if (data & RTL8366_CHIP_CTRL_VLAN)
1236                         val->value.i = 1;
1237                 else
1238                         val->value.i = 0;
1239         } else if (attr->ofs == 2) {
1240                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
1241
1242                 if (data & 0x0001)
1243                         val->value.i = 1;
1244                 else
1245                         val->value.i = 0;
1246         }
1247
1248         return 0;
1249 }
1250
1251 static int rtl8366_global_get_blinkrate(struct switch_dev *dev,
1252                                         const struct switch_attr *attr,
1253                                         struct switch_val *val)
1254 {
1255         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1256         u32 data;
1257
1258         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1259
1260         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1261
1262         return 0;
1263 }
1264
1265 static int rtl8366_global_set_blinkrate(struct switch_dev *dev,
1266                                         const struct switch_attr *attr,
1267                                         struct switch_val *val)
1268 {
1269         u32 data;
1270         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1271
1272         if (val->value.i >= 6)
1273                 return -EINVAL;
1274
1275         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1276
1277         data &= ~(data & RTL8366_LED_BLINKRATE_MASK);
1278         data |= val->value.i;
1279
1280         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1281
1282         return 0;
1283 }
1284
1285 static int rtl8366_set_vlan(struct switch_dev *dev,
1286                             const struct switch_attr *attr,
1287                             struct switch_val *val)
1288 {
1289         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1290
1291         if (attr->ofs == 1)
1292                 return rtl8366_vlan_set_vlan(smi, val->value.i);
1293         else
1294                 return rtl8366_vlan_set_4ktable(smi, val->value.i);
1295 }
1296
1297 static int rtl8366_attr_get_port_link(struct switch_dev *dev,
1298                                       const struct switch_attr *attr,
1299                                       struct switch_val *val)
1300 {
1301         u32 len = 0, data = 0;
1302         int speed, duplex, link, txpause, rxpause, nway;
1303         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1304         char *buf = smi->buf;
1305
1306         if (val->port_vlan >= RTL8366_NUM_PORTS)
1307                 return -EINVAL;
1308
1309         memset(buf, '\0', sizeof(smi->buf));
1310         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1311                              (val->port_vlan >> 1),
1312                              &data);
1313
1314         if (val->port_vlan & 0x1)
1315                 data = data >> 8;
1316
1317         speed = (data & RTL8366S_PORT_STATUS_SPEED_MASK);
1318         duplex = (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) >> 2;
1319         link = (data & RTL8366S_PORT_STATUS_LINK_MASK) >> 4;
1320         txpause = (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) >> 5;
1321         rxpause = (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) >> 6;
1322         nway = (data & RTL8366S_PORT_STATUS_AN_MASK) >> 7;
1323
1324         len += snprintf(buf + len, sizeof(smi->buf) - len, "Port %d: ",
1325                         val->port_vlan);
1326
1327         if (link)
1328                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1329                                 "Link UP, Speed: ");
1330         else
1331                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1332                                 "Link DOWN, Speed: ");
1333
1334         if (speed == 0)
1335                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1336                                 "10Base-TX ");
1337         else if (speed == 1)
1338                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1339                                 "100Base-TX ");
1340         else if (speed == 2)
1341                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1342                                 "1000Base-TX ");
1343
1344         if (duplex)
1345                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1346                                 "Full-Duplex, ");
1347         else
1348                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1349                                 "Half-Duplex, ");
1350
1351         if (txpause)
1352                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1353                                 "TX-Pause ");
1354         if (rxpause)
1355                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1356                                 "RX-Pause ");
1357         if (nway)
1358                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1359                                 "nway ");
1360
1361         val->value.s = buf;
1362         val->len = len;
1363
1364         return 0;
1365 }
1366
1367 static int rtl8366_attr_get_vlan_info(struct switch_dev *dev,
1368                                       const struct switch_attr *attr,
1369                                       struct switch_val *val)
1370 {
1371         int i;
1372         u32 len = 0;
1373         struct rtl8366s_vlanconfig vlanmc;
1374         struct rtl8366s_vlan4kentry vlan4k;
1375         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1376         char *buf = smi->buf;
1377
1378         if (val->port_vlan >= RTL8366_NUM_VLANS)
1379                 return -EINVAL;
1380
1381         memset(buf, '\0', sizeof(smi->buf));
1382
1383         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1384         rtl8366s_get_vlan_4k_entry(smi, vlanmc.vid, &vlan4k);
1385
1386         len += snprintf(buf + len, sizeof(smi->buf) - len, "VLAN %d: Ports: ",
1387                         val->port_vlan);
1388
1389         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1390                 int index = 0;
1391                 if (!rtl8366_get_port_vlan_index(smi, i, &index) &&
1392                     index == val->port_vlan)
1393                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1394                                         "%d", i);
1395         }
1396         len += snprintf(buf + len, sizeof(smi->buf) - len, "\n");
1397
1398         len += snprintf(buf + len, sizeof(smi->buf) - len,
1399                         "\t\t vid \t prio \t member \t untag \t fid\n");
1400         len += snprintf(buf + len, sizeof(smi->buf) - len, "\tMC:\t");
1401         len += snprintf(buf + len, sizeof(smi->buf) - len,
1402                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1403                         vlanmc.vid, vlanmc.priority, vlanmc.member,
1404                         vlanmc.untag, vlanmc.fid);
1405         len += snprintf(buf + len, sizeof(smi->buf) - len, "\t4K:\t");
1406         len += snprintf(buf + len, sizeof(smi->buf) - len,
1407                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1408                         vlan4k.vid, vlan4k.member, vlan4k.untag, vlan4k.fid);
1409
1410         val->value.s = buf;
1411         val->len = len;
1412
1413         return 0;
1414 }
1415
1416 static int rtl8366_set_port_led(struct switch_dev *dev,
1417                                 const struct switch_attr *attr,
1418                                 struct switch_val *val)
1419 {
1420         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1421         u32 data = 0;
1422
1423         if (val->port_vlan >= RTL8366_NUM_PORTS ||
1424             (1 << val->port_vlan) == RTL8366_PORT_UNKNOWN)
1425                 return -EINVAL;
1426
1427         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1428                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1429                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1430                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1431         } else {
1432                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1433                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1434                         (val->value.i << (val->port_vlan * 4));
1435                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1436         }
1437
1438         return 0;
1439 }
1440
1441 static int rtl8366_get_port_led(struct switch_dev *dev,
1442                                 const struct switch_attr *attr,
1443                                 struct switch_val *val)
1444 {
1445         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1446         u32 data = 0;
1447
1448         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1449                 return -EINVAL;
1450
1451         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1452         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1453
1454         return 0;
1455 }
1456
1457 static int rtl8366_reset_port_mibs(struct switch_dev *dev,
1458                                    const struct switch_attr *attr,
1459                                    struct switch_val *val)
1460 {
1461         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1462         u32 data = 0;
1463
1464         if (val->port_vlan >= RTL8366_NUM_PORTS)
1465                 return -EINVAL;
1466
1467         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1468         data |= (1 << (val->port_vlan + 3));
1469         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1470
1471         return 0;
1472 }
1473
1474 static int rtl8366_get_port_mib(struct switch_dev *dev,
1475                                 const struct switch_attr *attr,
1476                                 struct switch_val *val)
1477 {
1478         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1479         int i, len = 0;
1480         unsigned long long counter = 0;
1481         char *buf = smi->buf;
1482
1483         if (val->port_vlan >= RTL8366_NUM_PORTS)
1484                 return -EINVAL;
1485
1486         len += snprintf(buf + len, sizeof(smi->buf) - len,
1487                         "Port %d MIB counters\n",
1488                         val->port_vlan);
1489
1490         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1491                 len += snprintf(buf + len, sizeof(smi->buf) - len,
1492                                 "%d:%s\t", i, MIBCOUNTERS[i]);
1493                 if (!rtl8366_get_mib_counter(smi, i, val->port_vlan, &counter))
1494                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1495                                         "[%llu]\n", counter);
1496                 else
1497                         len += snprintf(buf + len, sizeof(smi->buf) - len,
1498                                         "[error]\n");
1499         }
1500
1501         val->value.s = buf;
1502         val->len = len;
1503         return 0;
1504 }
1505
1506 static int rtl8366_get_ports(struct switch_dev *dev,
1507                              struct switch_val *val)
1508 {
1509         struct rtl8366s_vlanconfig vlanmc;
1510         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1511         struct switch_port *port;
1512         int i;
1513
1514         if (val->port_vlan >= RTL8366_NUM_VLANS)
1515                 return -EINVAL;
1516
1517         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1518
1519         port = &val->value.ports[0];
1520         val->len = 0;
1521         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
1522                 if (!(vlanmc.member & BIT(i)))
1523                         continue;
1524
1525                 port->id = i;
1526                 port->flags = (vlanmc.untag & BIT(i)) ?
1527                                         0 : BIT(SWITCH_PORT_FLAG_TAGGED);
1528                 val->len++;
1529                 port++;
1530         }
1531         return 0;
1532 }
1533
1534 static int rtl8366_set_ports(struct switch_dev *dev,
1535                              struct switch_val *val)
1536 {
1537         struct rtl8366s_vlanconfig vlanmc;
1538         struct rtl8366s_vlan4kentry vlan4k;
1539         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1540         struct switch_port *port;
1541         int i;
1542
1543         if (val->port_vlan >= RTL8366_NUM_VLANS)
1544                 return -EINVAL;
1545
1546         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanmc);
1547         rtl8366s_get_vlan_4k_entry(smi, vlanmc.vid, &vlan4k);
1548
1549         vlanmc.untag = 0;
1550         vlanmc.member = 0;
1551
1552         port = &val->value.ports[0];
1553         for (i = 0; i < val->len; i++, port++) {
1554                 vlanmc.member |= BIT(port->id);
1555
1556                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED)))
1557                         vlanmc.untag |= BIT(port->id);
1558         }
1559
1560         vlan4k.member = vlanmc.member;
1561         vlan4k.untag = vlanmc.untag;
1562
1563         rtl8366s_set_vlan_member_config(smi, val->port_vlan, &vlanmc);
1564         rtl8366s_set_vlan_4k_entry(smi, &vlan4k);
1565         return 0;
1566 }
1567
1568 static int rtl8366_get_port_pvid(struct switch_dev *dev, int port, int *val)
1569 {
1570         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1571         return rtl8366_get_vlan_port_pvid(smi, port, val);
1572 }
1573
1574 static int rtl8366_set_port_pvid(struct switch_dev *dev, int port, int val)
1575 {
1576         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1577         return rtl8366_set_vlan_port_pvid(smi, port, val);
1578 }
1579
1580 static int rtl8366_reset_switch(struct switch_dev *dev)
1581 {
1582         struct rtl8366_smi *smi = sw_to_rtl8366(dev);
1583         int timeout = 10;
1584         u32 data;
1585
1586         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
1587                               RTL8366_CHIP_CTRL_RESET_HW);
1588         do {
1589                 msleep(1);
1590                 if (rtl8366_smi_read_reg(smi, RTL8366_RESET_CTRL_REG, &data))
1591                         return -EIO;
1592
1593                 if (!(data & RTL8366_CHIP_CTRL_RESET_HW))
1594                         break;
1595         } while (--timeout);
1596
1597         if (!timeout) {
1598                 printk("Timeout waiting for the switch to reset\n");
1599                 return -EIO;
1600         }
1601
1602         return rtl8366s_reset_vlan(smi);
1603 }
1604
1605 static struct switch_attr rtl8366_globals[] = {
1606         {
1607                 .type = SWITCH_TYPE_INT,
1608                 .name = "enable_vlan",
1609                 .description = "Enable VLAN mode",
1610                 .set = rtl8366_set_vlan,
1611                 .get = rtl8366_get_vlan,
1612                 .max = 1,
1613                 .ofs = 1
1614         }, {
1615                 .type = SWITCH_TYPE_INT,
1616                 .name = "enable_vlan4k",
1617                 .description = "Enable VLAN 4K mode",
1618                 .set = rtl8366_set_vlan,
1619                 .get = rtl8366_get_vlan,
1620                 .max = 1,
1621                 .ofs = 2
1622         }, {
1623                 .type = SWITCH_TYPE_INT,
1624                 .name = "reset_mibs",
1625                 .description = "Reset all MIB counters",
1626                 .set = rtl8366_global_reset_mibs,
1627                 .get = NULL,
1628                 .max = 1
1629         }, {
1630                 .type = SWITCH_TYPE_INT,
1631                 .name = "blinkrate",
1632                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1633                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1634                 .set = rtl8366_global_set_blinkrate,
1635                 .get = rtl8366_global_get_blinkrate,
1636                 .max = 5
1637         },
1638 };
1639
1640 static struct switch_attr rtl8366_port[] = {
1641         {
1642                 .type = SWITCH_TYPE_STRING,
1643                 .name = "link",
1644                 .description = "Get port link information",
1645                 .max = 1,
1646                 .set = NULL,
1647                 .get = rtl8366_attr_get_port_link
1648         }, {
1649                 .type = SWITCH_TYPE_INT,
1650                 .name = "reset_mib",
1651                 .description = "Reset single port MIB counters",
1652                 .max = 1,
1653                 .set = rtl8366_reset_port_mibs,
1654                 .get = NULL
1655         }, {
1656                 .type = SWITCH_TYPE_STRING,
1657                 .name = "mib",
1658                 .description = "Get MIB counters for port",
1659                 .max = 33,
1660                 .set = NULL,
1661                 .get = rtl8366_get_port_mib
1662         }, {
1663                 .type = SWITCH_TYPE_INT,
1664                 .name = "led",
1665                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1666                 .max = 15,
1667                 .set = rtl8366_set_port_led,
1668                 .get = rtl8366_get_port_led
1669         },
1670 };
1671
1672 static struct switch_attr rtl8366_vlan[] = {
1673         {
1674                 .type = SWITCH_TYPE_STRING,
1675                 .name = "info",
1676                 .description = "Get vlan information",
1677                 .max = 1,
1678                 .set = NULL,
1679                 .get = rtl8366_attr_get_vlan_info
1680         },
1681 };
1682
1683
1684 /* template */
1685 static struct switch_dev rtldev = {
1686         .name = "RTL8366S",
1687         .cpu_port = RTL8366_PORT_NUM_CPU,
1688         .ports = RTL8366_NUM_PORTS,
1689         .vlans = RTL8366_NUM_VLANS,
1690         .attr_global = {
1691                 .attr = rtl8366_globals,
1692                 .n_attr = ARRAY_SIZE(rtl8366_globals),
1693         },
1694         .attr_port = {
1695                 .attr = rtl8366_port,
1696                 .n_attr = ARRAY_SIZE(rtl8366_port),
1697         },
1698         .attr_vlan = {
1699                 .attr = rtl8366_vlan,
1700                 .n_attr = ARRAY_SIZE(rtl8366_vlan),
1701         },
1702
1703         .get_vlan_ports = rtl8366_get_ports,
1704         .set_vlan_ports = rtl8366_set_ports,
1705         .get_port_pvid = rtl8366_get_port_pvid,
1706         .set_port_pvid = rtl8366_set_port_pvid,
1707         .reset_switch = rtl8366_reset_switch,
1708 };
1709
1710 static int rtl8366_smi_switch_init(struct rtl8366_smi *smi)
1711 {
1712         struct switch_dev *dev = &smi->dev;
1713         int err;
1714
1715         memcpy(dev, &rtldev, sizeof(struct switch_dev));
1716         dev->priv = smi;
1717         dev->devname = dev_name(&smi->pdev->dev);
1718
1719         err = register_switch(dev, NULL);
1720         if (err)
1721                 dev_err(&smi->pdev->dev, "switch registration failed\n");
1722
1723         return err;
1724 }
1725
1726 static void rtl8366_smi_switch_cleanup(struct rtl8366_smi *smi)
1727 {
1728         unregister_switch(&smi->dev);
1729 }
1730
1731 static int rtl8366_smi_mii_read(struct mii_bus *bus, int addr, int reg)
1732 {
1733         struct rtl8366_smi *smi = bus->priv;
1734         u32 val = 0;
1735         int err;
1736
1737         err = rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &val);
1738         if (err)
1739                 return 0xffff;
1740
1741         return val;
1742 }
1743
1744 static int rtl8366_smi_mii_write(struct mii_bus *bus, int addr, int reg,
1745                                      u16 val)
1746 {
1747         struct rtl8366_smi *smi = bus->priv;
1748         u32 t;
1749         int err;
1750
1751         err = rtl8366_smi_write_phy_reg(smi, addr, 0, reg, val);
1752         /* flush write */
1753         (void) rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &t);
1754
1755         return err;
1756 }
1757
1758 static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
1759 {
1760         int ret;
1761         int i;
1762
1763         smi->mii_bus = mdiobus_alloc();
1764         if (smi->mii_bus == NULL) {
1765                 ret = -ENOMEM;
1766                 goto err;
1767         }
1768
1769         spin_lock_init(&smi->lock);
1770         smi->mii_bus->priv = (void *) smi;
1771         smi->mii_bus->name = "rtl8366-smi";
1772         smi->mii_bus->read = rtl8366_smi_mii_read;
1773         smi->mii_bus->write = rtl8366_smi_mii_write;
1774         snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
1775                         dev_name(&smi->pdev->dev));
1776         smi->mii_bus->parent = &smi->pdev->dev;
1777         smi->mii_bus->phy_mask = ~(0x1f);
1778         smi->mii_bus->irq = smi->mii_irq;
1779         for (i = 0; i < PHY_MAX_ADDR; i++)
1780                 smi->mii_irq[i] = PHY_POLL;
1781
1782         ret = mdiobus_register(smi->mii_bus);
1783         if (ret)
1784                 goto err_free;
1785
1786         return 0;
1787
1788  err_free:
1789         mdiobus_free(smi->mii_bus);
1790  err:
1791         return ret;
1792 }
1793
1794 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
1795 {
1796         mdiobus_unregister(smi->mii_bus);
1797         mdiobus_free(smi->mii_bus);
1798 }
1799
1800 static int rtl8366_smi_mii_bus_match(struct mii_bus *bus)
1801 {
1802         return (bus->read == rtl8366_smi_mii_read &&
1803                 bus->write == rtl8366_smi_mii_write);
1804 }
1805
1806 static int rtl8366_smi_setup(struct rtl8366_smi *smi)
1807 {
1808         u32 chip_id = 0;
1809         u32 chip_ver = 0;
1810         int ret;
1811
1812         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1813         if (ret) {
1814                 dev_err(&smi->pdev->dev, "unable to read chip id\n");
1815                 return ret;
1816         }
1817
1818         switch (chip_id) {
1819         case RTL8366S_CHIP_ID_8366:
1820                 break;
1821         default:
1822                 dev_err(&smi->pdev->dev, "unknown chip id (%04x)\n", chip_id);
1823                 return -ENODEV;
1824         }
1825
1826         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1827                                    &chip_ver);
1828         if (ret) {
1829                 dev_err(&smi->pdev->dev, "unable to read chip version\n");
1830                 return ret;
1831         }
1832
1833         dev_info(&smi->pdev->dev, "RTL%04x ver. %u chip found\n",
1834                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1835
1836         rtl8366_debugfs_init(smi);
1837
1838         return 0;
1839 }
1840
1841 static int __init rtl8366_smi_probe(struct platform_device *pdev)
1842 {
1843         static int rtl8366_smi_version_printed;
1844         struct rtl8366_smi_platform_data *pdata;
1845         struct rtl8366_smi *smi;
1846         int err;
1847
1848         if (!rtl8366_smi_version_printed++)
1849                 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
1850                        " version " RTL8366_SMI_DRIVER_VER"\n");
1851
1852         pdata = pdev->dev.platform_data;
1853         if (!pdata) {
1854                 dev_err(&pdev->dev, "no platform data specified\n");
1855                 err = -EINVAL;
1856                 goto err_out;
1857         }
1858
1859         smi = kzalloc(sizeof(struct rtl8366_smi), GFP_KERNEL);
1860         if (!smi) {
1861                 dev_err(&pdev->dev, "no memory for private data\n");
1862                 err = -ENOMEM;
1863                 goto err_out;
1864         }
1865
1866         err = gpio_request(pdata->gpio_sda, dev_name(&pdev->dev));
1867         if (err) {
1868                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1869                         pdata->gpio_sda, err);
1870                 goto err_free_smi;
1871         }
1872
1873         err = gpio_request(pdata->gpio_sck, dev_name(&pdev->dev));
1874         if (err) {
1875                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1876                         pdata->gpio_sck, err);
1877                 goto err_free_sda;
1878         }
1879
1880         smi->pdev = pdev;
1881         smi->pdata = pdata;
1882         spin_lock_init(&smi->lock);
1883
1884         platform_set_drvdata(pdev, smi);
1885
1886         dev_info(&pdev->dev, "using GPIO pins %u (SDA) and %u (SCK)\n",
1887                  pdata->gpio_sda, pdata->gpio_sck);
1888
1889         err = rtl8366_smi_setup(smi);
1890         if (err)
1891                 goto err_clear_drvdata;
1892
1893         err = rtl8366_smi_mii_init(smi);
1894         if (err)
1895                 goto err_clear_drvdata;
1896
1897         err = rtl8366_smi_switch_init(smi);
1898         if (err)
1899                 goto err_mii_cleanup;
1900
1901         return 0;
1902
1903  err_mii_cleanup:
1904         rtl8366_smi_mii_cleanup(smi);
1905  err_clear_drvdata:
1906         platform_set_drvdata(pdev, NULL);
1907         gpio_free(pdata->gpio_sck);
1908  err_free_sda:
1909         gpio_free(pdata->gpio_sda);
1910  err_free_smi:
1911         kfree(smi);
1912  err_out:
1913         return err;
1914 }
1915
1916 int rtl8366_phy_config_init(struct phy_device *phydev)
1917 {
1918         if (!rtl8366_smi_mii_bus_match(phydev->bus))
1919                 return -EINVAL;
1920
1921         return 0;
1922 }
1923
1924 int rtl8366_phy_config_aneg(struct phy_device *phydev)
1925 {
1926         return 0;
1927 }
1928
1929 static struct phy_driver rtl8366_smi_phy_driver = {
1930         .phy_id         = 0x001cc960,
1931         .name           = "Realtek RTL8366",
1932         .phy_id_mask    = 0x1ffffff0,
1933         .features       = PHY_GBIT_FEATURES,
1934         .config_aneg    = rtl8366_phy_config_aneg,
1935         .config_init    = rtl8366_phy_config_init,
1936         .read_status    = genphy_read_status,
1937         .driver         = {
1938                 .owner = THIS_MODULE,
1939         },
1940 };
1941
1942 static int __devexit rtl8366_smi_remove(struct platform_device *pdev)
1943 {
1944         struct rtl8366_smi *smi = platform_get_drvdata(pdev);
1945
1946         if (smi) {
1947                 struct rtl8366_smi_platform_data *pdata;
1948
1949                 pdata = pdev->dev.platform_data;
1950
1951                 rtl8366_smi_switch_cleanup(smi);
1952                 rtl8366_debugfs_remove(smi);
1953                 rtl8366_smi_mii_cleanup(smi);
1954                 platform_set_drvdata(pdev, NULL);
1955                 gpio_free(pdata->gpio_sck);
1956                 gpio_free(pdata->gpio_sda);
1957                 kfree(smi);
1958         }
1959
1960         return 0;
1961 }
1962
1963 static struct platform_driver rtl8366_smi_driver = {
1964         .driver = {
1965                 .name           = RTL8366_SMI_DRIVER_NAME,
1966                 .owner          = THIS_MODULE,
1967         },
1968         .probe          = rtl8366_smi_probe,
1969         .remove         = __devexit_p(rtl8366_smi_remove),
1970 };
1971
1972 static int __init rtl8366_smi_init(void)
1973 {
1974         int ret;
1975         ret = platform_driver_register(&rtl8366_smi_driver);
1976         if (ret)
1977                 return ret;
1978
1979         ret = phy_driver_register(&rtl8366_smi_phy_driver);
1980         if (ret)
1981                 goto err_platform_unregister;
1982
1983         return 0;
1984
1985  err_platform_unregister:
1986         platform_driver_unregister(&rtl8366_smi_driver);
1987         return ret;
1988 }
1989 module_init(rtl8366_smi_init);
1990
1991 static void __exit rtl8366_smi_exit(void)
1992 {
1993         phy_driver_unregister(&rtl8366_smi_phy_driver);
1994         platform_driver_unregister(&rtl8366_smi_driver);
1995 }
1996 module_exit(rtl8366_smi_exit);
1997
1998 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC);
1999 MODULE_VERSION(RTL8366_SMI_DRIVER_VER);
2000 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
2001 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
2002 MODULE_LICENSE("GPL v2");
2003 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME);