2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
30 static void ag71xx_phy_link_update(struct ag71xx *ag)
32 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
39 netif_carrier_off(ag->dev);
40 if (netif_msg_link(ag))
41 printk(KERN_INFO "%s: link down\n", ag->dev->name);
45 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
46 cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
47 cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
49 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
50 ifctl &= ~(MAC_IFCTL_SPEED);
52 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
53 fifo5 &= ~FIFO_CFG5_BM;
57 mii_speed = MII_CTRL_SPEED_1000;
58 cfg2 |= MAC_CFG2_IF_1000;
59 fifo5 |= FIFO_CFG5_BM;
62 mii_speed = MII_CTRL_SPEED_100;
63 cfg2 |= MAC_CFG2_IF_10_100;
64 ifctl |= MAC_IFCTL_SPEED;
67 mii_speed = MII_CTRL_SPEED_10;
68 cfg2 |= MAC_CFG2_IF_10_100;
76 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
77 else if (pdata->is_ar724x)
78 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
80 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
83 pdata->set_pll(ag->speed);
85 ag71xx_mii_ctrl_set_speed(ag, mii_speed);
87 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
88 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
89 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
91 netif_carrier_on(ag->dev);
92 if (netif_msg_link(ag))
93 printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
96 (DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
98 DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
100 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
101 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
102 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
104 DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
106 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
107 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
108 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
110 DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
112 ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
113 ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
114 ag71xx_mii_ctrl_rr(ag));
117 static void ag71xx_phy_link_adjust(struct net_device *dev)
119 struct ag71xx *ag = netdev_priv(dev);
120 struct phy_device *phydev = ag->phy_dev;
122 int status_change = 0;
124 spin_lock_irqsave(&ag->lock, flags);
127 if (ag->duplex != phydev->duplex
128 || ag->speed != phydev->speed) {
133 if (phydev->link != ag->link)
136 ag->link = phydev->link;
137 ag->duplex = phydev->duplex;
138 ag->speed = phydev->speed;
141 ag71xx_phy_link_update(ag);
143 spin_unlock_irqrestore(&ag->lock, flags);
146 void ag71xx_phy_start(struct ag71xx *ag)
149 phy_start(ag->phy_dev);
151 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
153 ag->duplex = pdata->duplex;
154 ag->speed = pdata->speed;
156 ag71xx_phy_link_update(ag);
160 void ag71xx_phy_stop(struct ag71xx *ag)
163 phy_stop(ag->phy_dev);
168 ag71xx_phy_link_update(ag);
172 static int ag71xx_phy_connect_fixed(struct ag71xx *ag)
174 struct net_device *dev = ag->dev;
175 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
178 /* use fixed settings */
179 switch (pdata->speed) {
185 printk(KERN_ERR "%s: invalid speed specified\n",
194 static int ag71xx_phy_connect_multi(struct ag71xx *ag)
196 struct net_device *dev = ag->dev;
197 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
198 struct phy_device *phydev = NULL;
203 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
204 if (!(pdata->phy_mask & (1 << phy_addr)))
207 if (ag->mii_bus->phy_map[phy_addr] == NULL)
210 DBG("%s: PHY found at %s, uid=%08x\n",
212 dev_name(&ag->mii_bus->phy_map[phy_addr]->dev),
213 ag->mii_bus->phy_map[phy_addr]->phy_id);
216 phydev = ag->mii_bus->phy_map[phy_addr];
223 printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n",
224 dev->name, pdata->phy_mask);
228 ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev),
229 &ag71xx_phy_link_adjust, 0, pdata->phy_if_mode);
231 if (IS_ERR(ag->phy_dev)) {
232 printk(KERN_ERR "%s: could not connect to PHY at %s\n",
233 dev->name, dev_name(&phydev->dev));
234 return PTR_ERR(ag->phy_dev);
237 /* mask with MAC supported features */
239 phydev->supported &= PHY_GBIT_FEATURES;
241 phydev->supported &= PHY_BASIC_FEATURES;
243 phydev->advertising = phydev->supported;
245 printk(KERN_DEBUG "%s: connected to PHY at %s "
246 "[uid=%08x, driver=%s]\n",
247 dev->name, dev_name(&phydev->dev),
248 phydev->phy_id, phydev->drv->name);
256 printk(KERN_DEBUG "%s: connected to %d PHYs\n",
257 dev->name, phy_count);
258 ret = ag71xx_phy_connect_fixed(ag);
265 static int dev_is_class(struct device *dev, void *class)
267 if (dev->class != NULL && !strcmp(dev->class->name, class))
273 static struct device *dev_find_class(struct device *parent, char *class)
275 if (dev_is_class(parent, class)) {
280 return device_find_child(parent, class, dev_is_class);
283 static struct mii_bus *dev_to_mii_bus(struct device *dev)
287 d = dev_find_class(dev, "mdio_bus");
300 int ag71xx_phy_connect(struct ag71xx *ag)
302 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
304 ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev);
305 if (ag->mii_bus == NULL) {
306 printk(KERN_ERR "%s: unable to find MII bus on device '%s'\n",
307 ag->dev->name, dev_name(pdata->mii_bus_dev));
311 /* Reset the mdio bus explicitly */
312 mutex_lock(&ag->mii_bus->mdio_lock);
313 ag->mii_bus->reset(ag->mii_bus);
314 mutex_unlock(&ag->mii_bus->mdio_lock);
317 return ag71xx_phy_connect_multi(ag);
319 return ag71xx_phy_connect_fixed(ag);
322 void ag71xx_phy_disconnect(struct ag71xx *ag)
325 phy_disconnect(ag->phy_dev);