target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c

   1 /*
   2  *  MikroTik RouterBOARD 91X support
   3  *
   4  *  Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt) "rb91x: " fmt
  12
  13 #include <linux/phy.h>
  14 #include <linux/delay.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/ath9k_platform.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/spi/74x164.h>
  22 #include <linux/spi/flash.h>
  23 #include <linux/routerboot.h>
  24 #include <linux/gpio.h>
  25 #include <linux/platform_data/gpio-latch.h>
  26 #include <linux/platform_data/rb91x_nand.h>
  27
  28 #include <asm/prom.h>
  29 #include <asm/mach-ath79/ath79.h>
  30 #include <asm/mach-ath79/ath79_spi_platform.h>
  31 #include <asm/mach-ath79/ar71xx_regs.h>
  32
  33 #include "common.h"
  34 #include "dev-eth.h"
  35 #include "dev-leds-gpio.h"
  36 #include "dev-nfc.h"
  37 #include "dev-usb.h"
  38 #include "dev-spi.h"
  39 #include "dev-wmac.h"
  40 #include "machtypes.h"
  41 #include "pci.h"
  42 #include "routerboot.h"
  43
  44 #define RB_ROUTERBOOT_OFFSET    0x0000
  45 #define RB_ROUTERBOOT_MIN_SIZE  0xb000
  46 #define RB_HARD_CFG_SIZE        0x1000
  47 #define RB_BIOS_OFFSET          0xd000
  48 #define RB_BIOS_SIZE            0x1000
  49 #define RB_SOFT_CFG_OFFSET      0xf000
  50 #define RB_SOFT_CFG_SIZE        0x1000
  51
  52 #define RB91X_FLAG_USB          BIT(0)
  53 #define RB91X_FLAG_PCIE         BIT(1)
  54
  55 #define RB91X_LATCH_GPIO_BASE   AR934X_GPIO_COUNT
  56 #define RB91X_LATCH_GPIO(_x)    (RB91X_LATCH_GPIO_BASE + (_x))
  57
  58 #define RB91X_SSR_GPIO_BASE     (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
  59 #define RB91X_SSR_GPIO(_x)      (RB91X_SSR_GPIO_BASE + (_x))
  60
  61 #define RB91X_SSR_BIT_LED1              0
  62 #define RB91X_SSR_BIT_LED2              1
  63 #define RB91X_SSR_BIT_LED3              2
  64 #define RB91X_SSR_BIT_LED4              3
  65 #define RB91X_SSR_BIT_LED5              4
  66 #define RB91X_SSR_BIT_5                 5
  67 #define RB91X_SSR_BIT_USB_POWER         6
  68 #define RB91X_SSR_BIT_PCIE_POWER        7
  69
  70 #define RB91X_GPIO_SSR_STROBE   RB91X_LATCH_GPIO(0)
  71 #define RB91X_GPIO_NAND_READ    RB91X_LATCH_GPIO(3)
  72 #define RB91X_GPIO_NAND_RDY     RB91X_LATCH_GPIO(4)
  73 #define RB91X_GPIO_NLE          RB91X_LATCH_GPIO(11)
  74 #define RB91X_GPIO_NAND_NRW     RB91X_LATCH_GPIO(12)
  75 #define RB91X_GPIO_NAND_NCE     RB91X_LATCH_GPIO(13)
  76 #define RB91X_GPIO_NAND_CLE     RB91X_LATCH_GPIO(14)
  77 #define RB91X_GPIO_NAND_ALE     RB91X_LATCH_GPIO(15)
  78
  79 struct rb_board_info {
  80         const char *name;
  81         u32 flags;
  82 };
  83
  84 static struct mtd_partition rb711gr100_spi_partitions[] = {
  85         {
  86                 .name           = "routerboot",
  87                 .offset         = RB_ROUTERBOOT_OFFSET,
  88                 .mask_flags     = MTD_WRITEABLE,
  89         }, {
  90                 .name           = "hard_config",
  91                 .size           = RB_HARD_CFG_SIZE,
  92                 .mask_flags     = MTD_WRITEABLE,
  93         }, {
  94                 .name           = "bios",
  95                 .offset         = RB_BIOS_OFFSET,
  96                 .size           = RB_BIOS_SIZE,
  97                 .mask_flags     = MTD_WRITEABLE,
  98         }, {
  99                 .name           = "soft_config",
 100                 .size           = RB_SOFT_CFG_SIZE,
 101         }
 102 };
 103
 104 static struct flash_platform_data rb711gr100_spi_flash_data = {
 105         .parts          = rb711gr100_spi_partitions,
 106         .nr_parts       = ARRAY_SIZE(rb711gr100_spi_partitions),
 107 };
 108
 109 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
 110         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
 111         12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
 112 };
 113
 114 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
 115         .base = RB91X_LATCH_GPIO_BASE,
 116         .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
 117         .gpios = rb711gr100_gpio_latch_gpios,
 118         .le_gpio_index = 11,
 119         .le_active_low = true,
 120 };
 121
 122 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = {
 123         .gpio_nce = RB91X_GPIO_NAND_NCE,
 124         .gpio_ale = RB91X_GPIO_NAND_ALE,
 125         .gpio_cle = RB91X_GPIO_NAND_CLE,
 126         .gpio_rdy = RB91X_GPIO_NAND_RDY,
 127         .gpio_read = RB91X_GPIO_NAND_READ,
 128         .gpio_nrw = RB91X_GPIO_NAND_NRW,
 129         .gpio_nle = RB91X_GPIO_NLE,
 130 };
 131
 132 static u8 rb711gr100_ssr_initdata[] __initdata = {
 133         BIT(RB91X_SSR_BIT_PCIE_POWER) |
 134         BIT(RB91X_SSR_BIT_USB_POWER) |
 135         BIT(RB91X_SSR_BIT_5)
 136 };
 137
 138 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = {
 139         .base = RB91X_SSR_GPIO_BASE,
 140         .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata),
 141         .init_data = rb711gr100_ssr_initdata,
 142 };
 143
 144 static struct ath79_spi_controller_data rb711gr100_spi0_cdata = {
 145         .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
 146         .cs_line = 0,
 147         .is_flash = true,
 148 };
 149
 150 static struct ath79_spi_controller_data rb711gr100_spi1_cdata = {
 151         .cs_type = ATH79_SPI_CS_TYPE_GPIO,
 152         .cs_line = RB91X_GPIO_SSR_STROBE,
 153 };
 154
 155 static struct spi_board_info rb711gr100_spi_info[] = {
 156         {
 157                 .bus_num        = 0,
 158                 .chip_select    = 0,
 159                 .max_speed_hz   = 25000000,
 160                 .modalias       = "m25p80",
 161                 .platform_data  = &rb711gr100_spi_flash_data,
 162                 .controller_data = &rb711gr100_spi0_cdata
 163         }, {
 164                 .bus_num        = 0,
 165                 .chip_select    = 1,
 166                 .max_speed_hz   = 10000000,
 167                 .modalias       = "74x164",
 168                 .platform_data  = &rb711gr100_ssr_data,
 169                 .controller_data = &rb711gr100_spi1_cdata
 170         }
 171 };
 172
 173 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = {
 174         .bus_num = 0,
 175         .num_chipselect = 2,
 176 };
 177
 178 static void __init rb711gr100_init_partitions(const struct rb_info *info)
 179 {
 180         rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
 181         rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
 182
 183         rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
 184 }
 185
 186 void __init rb711gr100_wlan_init(void)
 187 {
 188         char *caldata;
 189         u8 wlan_mac[ETH_ALEN];
 190
 191         caldata = rb_get_wlan_data();
 192         if (caldata == NULL)
 193                 return;
 194
 195         ath79_init_mac(wlan_mac, ath79_mac_base, 1);
 196         ath79_register_wmac(caldata + 0x1000, wlan_mac);
 197
 198         kfree(caldata);
 199 }
 200
 201 #define RB_BOARD_INFO(_name, _flags)    \
 202         {                               \
 203                 .name = (_name),        \
 204                 .flags = (_flags),      \
 205         }
 206
 207 static const struct rb_board_info rb711gr100_boards[] __initconst = {
 208         RB_BOARD_INFO("911G-2HPnD", 0),
 209         RB_BOARD_INFO("911G-5HPnD", 0),
 210         RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 211         RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
 212 };
 213
 214 static u32 rb711gr100_get_flags(const struct rb_info *info)
 215 {
 216         int i;
 217
 218         for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
 219                 const struct rb_board_info *bi;
 220
 221                 bi = &rb711gr100_boards[i];
 222                 if (strcmp(info->board_name, bi->name) == 0)
 223                         return bi->flags;
 224         }
 225
 226         return 0;
 227 }
 228
 229 static void __init rb711gr100_setup(void)
 230 {
 231         const struct rb_info *info;
 232         char buf[64];
 233         u32 flags;
 234
 235         info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
 236         if (!info)
 237                 return;
 238
 239         scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
 240                   (info->board_name) ? info->board_name : "");
 241         mips_set_machine_name(buf);
 242
 243         rb711gr100_init_partitions(info);
 244         ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info,
 245                            ARRAY_SIZE(rb711gr100_spi_info));
 246
 247         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
 248                                    AR934X_ETH_CFG_SW_ONLY_MODE);
 249
 250         ath79_register_mdio(0, 0x0);
 251
 252         ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
 253         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 254         ath79_eth0_data.phy_mask = BIT(0);
 255         ath79_eth0_pll_data.pll_1000 = 0x02000000;
 256
 257         ath79_register_eth(0);
 258
 259         rb711gr100_wlan_init();
 260
 261         platform_device_register_data(NULL, "rb91x-nand", -1,
 262                                       &rb711gr100_nand_data,
 263                                       sizeof(rb711gr100_nand_data));
 264
 265         platform_device_register_data(NULL, "gpio-latch", -1,
 266                                       &rb711gr100_gpio_latch_data,
 267                                       sizeof(rb711gr100_gpio_latch_data));
 268
 269         flags = rb711gr100_get_flags(info);
 270
 271         if (flags & RB91X_FLAG_USB)
 272                 ath79_register_usb();
 273
 274         if (flags & RB91X_FLAG_PCIE)
 275                 ath79_register_pci();
 276
 277 }
 278
 279 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);