ar71xx: remove the built-in MTD maps of several boards
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dir-825-b1.c
1 /*
2  *  D-Link DIR-825 rev. B1 board support
3  *
4  *  Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
5  *
6  *  based on mach-wndr3700.c
7  *
8  *  This program is free software; you can redistribute it and/or modify it
9  *  under the terms of the GNU General Public License version 2 as published
10  *  by the Free Software Foundation.
11  */
12
13 #include <linux/platform_device.h>
14 #include <linux/delay.h>
15 #include <linux/rtl8366.h>
16
17 #include <asm/mach-ath79/ath79.h>
18
19 #include "dev-eth.h"
20 #include "dev-ap9x-pci.h"
21 #include "dev-gpio-buttons.h"
22 #include "dev-leds-gpio.h"
23 #include "dev-m25p80.h"
24 #include "dev-usb.h"
25 #include "machtypes.h"
26
27 #define DIR825B1_GPIO_LED_BLUE_USB              0
28 #define DIR825B1_GPIO_LED_ORANGE_POWER          1
29 #define DIR825B1_GPIO_LED_BLUE_POWER            2
30 #define DIR825B1_GPIO_LED_BLUE_WPS              4
31 #define DIR825B1_GPIO_LED_ORANGE_PLANET         6
32 #define DIR825B1_GPIO_LED_BLUE_PLANET           11
33
34 #define DIR825B1_GPIO_BTN_RESET                 3
35 #define DIR825B1_GPIO_BTN_WPS                   8
36
37 #define DIR825B1_GPIO_RTL8366_SDA               5
38 #define DIR825B1_GPIO_RTL8366_SCK               7
39
40 #define DIR825B1_KEYS_POLL_INTERVAL             20      /* msecs */
41 #define DIR825B1_KEYS_DEBOUNCE_INTERVAL         (3 * DIR825B1_KEYS_POLL_INTERVAL)
42
43 #define DIR825B1_CAL_LOCATION_0                 0x1f661000
44 #define DIR825B1_CAL_LOCATION_1                 0x1f665000
45
46 #define DIR825B1_MAC_LOCATION_0                 0x1f66ffa0
47 #define DIR825B1_MAC_LOCATION_1                 0x1f66ffb4
48
49 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
50         {
51                 .name           = "d-link:blue:usb",
52                 .gpio           = DIR825B1_GPIO_LED_BLUE_USB,
53                 .active_low     = 1,
54         }, {
55                 .name           = "d-link:orange:power",
56                 .gpio           = DIR825B1_GPIO_LED_ORANGE_POWER,
57                 .active_low     = 1,
58         }, {
59                 .name           = "d-link:blue:power",
60                 .gpio           = DIR825B1_GPIO_LED_BLUE_POWER,
61                 .active_low     = 1,
62         }, {
63                 .name           = "d-link:blue:wps",
64                 .gpio           = DIR825B1_GPIO_LED_BLUE_WPS,
65                 .active_low     = 1,
66         }, {
67                 .name           = "d-link:orange:planet",
68                 .gpio           = DIR825B1_GPIO_LED_ORANGE_PLANET,
69                 .active_low     = 1,
70         }, {
71                 .name           = "d-link:blue:planet",
72                 .gpio           = DIR825B1_GPIO_LED_BLUE_PLANET,
73                 .active_low     = 1,
74         }
75 };
76
77 static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
78         {
79                 .desc           = "reset",
80                 .type           = EV_KEY,
81                 .code           = KEY_RESTART,
82                 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
83                 .gpio           = DIR825B1_GPIO_BTN_RESET,
84                 .active_low     = 1,
85         }, {
86                 .desc           = "wps",
87                 .type           = EV_KEY,
88                 .code           = KEY_WPS_BUTTON,
89                 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
90                 .gpio           = DIR825B1_GPIO_BTN_WPS,
91                 .active_low     = 1,
92         }
93 };
94
95 static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
96         { .reg = 0x06, .val = 0x0108 },
97 };
98
99 static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
100         .gpio_sda       = DIR825B1_GPIO_RTL8366_SDA,
101         .gpio_sck       = DIR825B1_GPIO_RTL8366_SCK,
102         .num_initvals   = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
103         .initvals       = dir825b1_rtl8366s_initvals,
104 };
105
106 static struct platform_device dir825b1_rtl8366s_device = {
107         .name           = RTL8366S_DRIVER_NAME,
108         .id             = -1,
109         .dev = {
110                 .platform_data  = &dir825b1_rtl8366s_data,
111         }
112 };
113
114 static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr)
115 {
116         int ret;
117         u8 *src = (u8 *)KSEG1ADDR(src_addr);
118
119         ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
120                      &dest[0], &dest[1], &dest[2],
121                      &dest[3], &dest[4], &dest[5]);
122
123         if (ret != ETH_ALEN)
124                 memset(dest, 0, ETH_ALEN);
125 }
126
127 static void __init dir825b1_setup(void)
128 {
129         u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
130
131         dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0);
132         dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1);
133
134         ath79_register_mdio(0, 0x0);
135
136         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
137         ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
138         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
139         ath79_eth0_data.speed = SPEED_1000;
140         ath79_eth0_data.duplex = DUPLEX_FULL;
141         ath79_eth0_pll_data.pll_1000 = 0x11110000;
142
143         ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
144         ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
145         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
146         ath79_eth1_data.phy_mask = 0x10;
147         ath79_eth1_pll_data.pll_1000 = 0x11110000;
148
149         ath79_register_eth(0);
150         ath79_register_eth(1);
151
152         ath79_register_m25p80(NULL);
153
154         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
155                                  dir825b1_leds_gpio);
156
157         ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
158                                         ARRAY_SIZE(dir825b1_gpio_keys),
159                                         dir825b1_gpio_keys);
160
161         ath79_register_usb();
162
163         platform_device_register(&dir825b1_rtl8366s_device);
164
165         ap9x_pci_setup_wmac_led_pin(0, 5);
166         ap9x_pci_setup_wmac_led_pin(1, 5);
167
168         ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1,
169                       (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2);
170 }
171
172 MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
173              dir825b1_setup);