target/linux/ar71xx/files/arch/mips/ar71xx/platform.c

   1 /*
   2  *  Atheros AR71xx SoC platform devices
   3  *
   4  *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/serial_8250.h>
  20
  21 #include <asm/mach-ar71xx/ar71xx.h>
  22 #include <asm/mach-ar71xx/platform.h>
  23
  24 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
  25
  26 /*
  27  * OHCI (USB full speed host controller)
  28  */
  29 static struct resource ar71xx_ohci_resources[] = {
  30         [0] = {
  31                 .start  = AR71XX_OHCI_BASE,
  32                 .end    = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
  33                 .flags  = IORESOURCE_MEM,
  34         },
  35         [1] = {
  36                 .start  = AR71XX_MISC_IRQ_OHCI,
  37                 .end    = AR71XX_MISC_IRQ_OHCI,
  38                 .flags  = IORESOURCE_IRQ,
  39         },
  40 };
  41
  42 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
  43 static struct platform_device ar71xx_ohci_device = {
  44         .name           = "ar71xx-ohci",
  45         .id             = -1,
  46         .resource       = ar71xx_ohci_resources,
  47         .num_resources  = ARRAY_SIZE(ar71xx_ohci_resources),
  48         .dev = {
  49                 .dma_mask               = &ar71xx_ohci_dmamask,
  50                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  51         },
  52 };
  53
  54 /*
  55  * EHCI (USB full speed host controller)
  56  */
  57 static struct resource ar71xx_ehci_resources[] = {
  58         [0] = {
  59                 .start  = AR71XX_EHCI_BASE,
  60                 .end    = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
  61                 .flags  = IORESOURCE_MEM,
  62         },
  63         [1] = {
  64                 .start  = AR71XX_CPU_IRQ_USB,
  65                 .end    = AR71XX_CPU_IRQ_USB,
  66                 .flags  = IORESOURCE_IRQ,
  67         },
  68 };
  69
  70
  71 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
  72 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
  73
  74 static struct platform_device ar71xx_ehci_device = {
  75         .name           = "ar71xx-ehci",
  76         .id             = -1,
  77         .resource       = ar71xx_ehci_resources,
  78         .num_resources  = ARRAY_SIZE(ar71xx_ehci_resources),
  79         .dev = {
  80                 .dma_mask               = &ar71xx_ehci_dmamask,
  81                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  82                 .platform_data          = &ar71xx_ehci_data,
  83         },
  84 };
  85
  86 #define AR71XX_USB_RESET_MASK \
  87         (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
  88         | RESET_MODULE_USB_OHCI_DLL)
  89
  90 static void ar71xx_usb_setup(void)
  91 {
  92         ar71xx_device_stop(AR71XX_USB_RESET_MASK);
  93         mdelay(1000);
  94         ar71xx_device_start(AR71XX_USB_RESET_MASK);
  95
  96         /* Turning on the Buff and Desc swap bits */
  97         ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
  98
  99         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 100         ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
 101
 102         mdelay(900);
 103 }
 104
 105 static void ar91xx_usb_setup(void)
 106 {
 107         ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
 108         mdelay(10);
 109
 110         ar71xx_device_start(RESET_MODULE_USB_HOST);
 111         mdelay(10);
 112
 113         ar71xx_device_start(RESET_MODULE_USB_PHY);
 114         mdelay(10);
 115 }
 116
 117 void __init ar71xx_add_device_usb(void)
 118 {
 119         switch (ar71xx_soc) {
 120         case AR71XX_SOC_AR7130:
 121         case AR71XX_SOC_AR7141:
 122         case AR71XX_SOC_AR7161:
 123                 ar71xx_usb_setup();
 124                 platform_device_register(&ar71xx_ohci_device);
 125                 platform_device_register(&ar71xx_ehci_device);
 126                 break;
 127
 128         case AR71XX_SOC_AR9130:
 129         case AR71XX_SOC_AR9132:
 130                 ar91xx_usb_setup();
 131                 ar71xx_ehci_data.is_ar91xx = 1;
 132                 platform_device_register(&ar71xx_ehci_device);
 133                 break;
 134
 135         default:
 136                 BUG();
 137         }
 138 }
 139
 140 #ifndef CONFIG_AR71XX_EARLY_SERIAL
 141 static struct resource ar71xx_uart_resources[] = {
 142         {
 143                 .start  = AR71XX_UART_BASE,
 144                 .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
 145                 .flags  = IORESOURCE_MEM,
 146         },
 147 };
 148
 149 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
 150 static struct plat_serial8250_port ar71xx_uart_data[] = {
 151         {
 152                 .mapbase        = AR71XX_UART_BASE,
 153                 .irq            = AR71XX_MISC_IRQ_UART,
 154                 .flags          = AR71XX_UART_FLAGS,
 155                 .iotype         = UPIO_MEM32,
 156                 .regshift       = 2,
 157         }, {
 158                 /* terminating entry */
 159         }
 160 };
 161
 162 static struct platform_device ar71xx_uart_device = {
 163         .name           = "serial8250",
 164         .id             = PLAT8250_DEV_PLATFORM,
 165         .resource       = ar71xx_uart_resources,
 166         .num_resources  = ARRAY_SIZE(ar71xx_uart_resources),
 167         .dev = {
 168                 .platform_data  = ar71xx_uart_data
 169         },
 170 };
 171
 172 void __init ar71xx_add_device_uart(void)
 173 {
 174         ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
 175         platform_device_register(&ar71xx_uart_device);
 176 }
 177 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
 178
 179 static struct resource ar71xx_mdio_resources[] = {
 180         {
 181                 .name   = "mdio_base",
 182                 .flags  = IORESOURCE_MEM,
 183                 .start  = AR71XX_GE0_BASE + 0x20,
 184                 .end    = AR71XX_GE0_BASE + 0x38 - 1,
 185         }
 186 };
 187
 188 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
 189         .phy_mask       = 0xffffffff,
 190 };
 191
 192 static struct platform_device ar71xx_mdio_device = {
 193         .name           = "ag71xx-mdio",
 194         .id             = -1,
 195         .resource       = ar71xx_mdio_resources,
 196         .num_resources  = ARRAY_SIZE(ar71xx_mdio_resources),
 197         .dev = {
 198                 .platform_data = &ar71xx_mdio_data,
 199         },
 200 };
 201
 202 void __init ar71xx_add_device_mdio(u32 phy_mask)
 203 {
 204         ar71xx_mdio_data.phy_mask = phy_mask;
 205         platform_device_register(&ar71xx_mdio_device);
 206 }
 207
 208 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 209 {
 210         void __iomem *base;
 211         u32 t;
 212
 213         base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
 214
 215         t = __raw_readl(base + cfg_reg);
 216         t &= ~(3 << shift);
 217         t |=  (2 << shift);
 218         __raw_writel(t, base + cfg_reg);
 219         udelay(100);
 220
 221         __raw_writel(pll_val, base + pll_reg);
 222
 223         t |= (3 << shift);
 224         __raw_writel(t, base + cfg_reg);
 225         udelay(100);
 226
 227         t &= ~(3 << shift);
 228         __raw_writel(t, base + cfg_reg);
 229         udelay(100);
 230
 231         printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
 232                 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
 233
 234         iounmap(base);
 235 }
 236
 237 static void ar71xx_set_pll_ge0(u32 val)
 238 {
 239         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
 240                         val, AR71XX_ETH0_PLL_SHIFT);
 241 }
 242
 243 static void ar71xx_set_pll_ge1(u32 val)
 244 {
 245         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
 246                          val, AR71XX_ETH1_PLL_SHIFT);
 247 }
 248
 249 static void ar91xx_set_pll_ge0(u32 val)
 250 {
 251         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
 252                          val, AR91XX_ETH0_PLL_SHIFT);
 253 }
 254
 255 static void ar91xx_set_pll_ge1(u32 val)
 256 {
 257         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
 258                          val, AR91XX_ETH1_PLL_SHIFT);
 259 }
 260
 261 static void ar71xx_ddr_flush_ge0(void)
 262 {
 263         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
 264 }
 265
 266 static void ar71xx_ddr_flush_ge1(void)
 267 {
 268         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
 269 }
 270
 271 static void ar91xx_ddr_flush_ge0(void)
 272 {
 273         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
 274 }
 275
 276 static void ar91xx_ddr_flush_ge1(void)
 277 {
 278         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 279 }
 280
 281 static struct resource ar71xx_eth0_resources[] = {
 282         {
 283                 .name   = "mac_base",
 284                 .flags  = IORESOURCE_MEM,
 285                 .start  = AR71XX_GE0_BASE,
 286                 .end    = AR71XX_GE0_BASE + 0x20 - 1,
 287         }, {
 288                 .name   = "mac_base2",
 289                 .flags  = IORESOURCE_MEM,
 290                 .start  = AR71XX_GE0_BASE + 0x38,
 291                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 292         }, {
 293                 .name   = "mii_ctrl",
 294                 .flags  = IORESOURCE_MEM,
 295                 .start  = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
 296                 .end    = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
 297         }, {
 298                 .name   = "mac_irq",
 299                 .flags  = IORESOURCE_IRQ,
 300                 .start  = AR71XX_CPU_IRQ_GE0,
 301                 .end    = AR71XX_CPU_IRQ_GE0,
 302         },
 303 };
 304
 305 struct ag71xx_platform_data ar71xx_eth0_data = {
 306         .reset_bit      = RESET_MODULE_GE0_MAC,
 307 };
 308
 309 static struct platform_device ar71xx_eth0_device = {
 310         .name           = "ag71xx",
 311         .id             = 0,
 312         .resource       = ar71xx_eth0_resources,
 313         .num_resources  = ARRAY_SIZE(ar71xx_eth0_resources),
 314         .dev = {
 315                 .platform_data = &ar71xx_eth0_data,
 316         },
 317 };
 318
 319 static struct resource ar71xx_eth1_resources[] = {
 320         {
 321                 .name   = "mac_base",
 322                 .flags  = IORESOURCE_MEM,
 323                 .start  = AR71XX_GE1_BASE,
 324                 .end    = AR71XX_GE1_BASE + 0x20 - 1,
 325         }, {
 326                 .name   = "mac_base2",
 327                 .flags  = IORESOURCE_MEM,
 328                 .start  = AR71XX_GE1_BASE + 0x38,
 329                 .end    = AR71XX_GE1_BASE + 0x200 - 1,
 330         }, {
 331                 .name   = "mii_ctrl",
 332                 .flags  = IORESOURCE_MEM,
 333                 .start  = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
 334                 .end    = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
 335         }, {
 336                 .name   = "mac_irq",
 337                 .flags  = IORESOURCE_IRQ,
 338                 .start  = AR71XX_CPU_IRQ_GE1,
 339                 .end    = AR71XX_CPU_IRQ_GE1,
 340         },
 341 };
 342
 343 struct ag71xx_platform_data ar71xx_eth1_data = {
 344         .reset_bit      = RESET_MODULE_GE1_MAC,
 345 };
 346
 347 static struct platform_device ar71xx_eth1_device = {
 348         .name           = "ag71xx",
 349         .id             = 1,
 350         .resource       = ar71xx_eth1_resources,
 351         .num_resources  = ARRAY_SIZE(ar71xx_eth1_resources),
 352         .dev = {
 353                 .platform_data = &ar71xx_eth1_data,
 354         },
 355 };
 356
 357 static int ar71xx_eth_instance __initdata;
 358 void __init ar71xx_add_device_eth(unsigned int id)
 359 {
 360         struct platform_device *pdev;
 361         struct ag71xx_platform_data *pdata;
 362
 363         switch (id) {
 364         case 0:
 365                 switch (ar71xx_eth0_data.phy_if_mode) {
 366                 case PHY_INTERFACE_MODE_MII:
 367                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
 368                         break;
 369                 case PHY_INTERFACE_MODE_GMII:
 370                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
 371                         break;
 372                 case PHY_INTERFACE_MODE_RGMII:
 373                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
 374                         break;
 375                 case PHY_INTERFACE_MODE_RMII:
 376                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
 377                         break;
 378                 default:
 379                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 380                                         "for eth0\n");
 381                         return;
 382                 }
 383                 pdev = &ar71xx_eth0_device;
 384                 break;
 385         case 1:
 386                 switch (ar71xx_eth1_data.phy_if_mode) {
 387                 case PHY_INTERFACE_MODE_RMII:
 388                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
 389                         break;
 390                 case PHY_INTERFACE_MODE_RGMII:
 391                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
 392                         break;
 393                 default:
 394                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 395                                         "for eth1\n");
 396                         return;
 397                 }
 398                 pdev = &ar71xx_eth1_device;
 399                 break;
 400         default:
 401                 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
 402                 return;
 403         }
 404
 405         pdata = pdev->dev.platform_data;
 406
 407         switch (ar71xx_soc) {
 408         case AR71XX_SOC_AR7130:
 409                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 410                                       : ar71xx_ddr_flush_ge0;
 411                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 412                                      : ar71xx_set_pll_ge0;
 413                 break;
 414
 415         case AR71XX_SOC_AR7141:
 416         case AR71XX_SOC_AR7161:
 417                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 418                                       : ar71xx_ddr_flush_ge0;
 419                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 420                                      : ar71xx_set_pll_ge0;
 421                 pdata->has_gbit = 1;
 422                 break;
 423
 424         case AR71XX_SOC_AR9130:
 425                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 426                                       : ar91xx_ddr_flush_ge0;
 427                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 428                                      : ar91xx_set_pll_ge0;
 429                 pdata->is_ar91xx = 1;
 430                 break;
 431
 432         case AR71XX_SOC_AR9132:
 433                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 434                                       : ar91xx_ddr_flush_ge0;
 435                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 436                                       : ar91xx_set_pll_ge0;
 437                 pdata->is_ar91xx = 1;
 438                 pdata->has_gbit = 1;
 439                 break;
 440
 441         default:
 442                 BUG();
 443         }
 444
 445         switch (pdata->phy_if_mode) {
 446         case PHY_INTERFACE_MODE_GMII:
 447         case PHY_INTERFACE_MODE_RGMII:
 448                 if (!pdata->has_gbit) {
 449                         printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
 450                                         id);
 451                         return;
 452                 }
 453                 /* fallthrough */
 454         default:
 455                 break;
 456         }
 457
 458         memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
 459         pdata->mac_addr[5] += ar71xx_eth_instance;
 460
 461         platform_device_register(pdev);
 462         ar71xx_eth_instance++;
 463 }
 464
 465 static struct resource ar71xx_spi_resources[] = {
 466         [0] = {
 467                 .start  = AR71XX_SPI_BASE,
 468                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 469                 .flags  = IORESOURCE_MEM,
 470         },
 471 };
 472
 473 static struct platform_device ar71xx_spi_device = {
 474         .name           = "ar71xx-spi",
 475         .id             = -1,
 476         .resource       = ar71xx_spi_resources,
 477         .num_resources  = ARRAY_SIZE(ar71xx_spi_resources),
 478 };
 479
 480 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
 481                                 struct spi_board_info const *info,
 482                                 unsigned n)
 483 {
 484         ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
 485
 486         spi_register_board_info(info, n);
 487         ar71xx_spi_device.dev.platform_data = pdata;
 488         platform_device_register(&ar71xx_spi_device);
 489 }
 490
 491 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
 492                                 struct gpio_led *leds)
 493 {
 494         struct platform_device *pdev;
 495         struct gpio_led_platform_data pdata;
 496         struct gpio_led *p;
 497         int err;
 498
 499         p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
 500         if (!p)
 501                 return;
 502
 503         memcpy(p, leds, num_leds * sizeof(*p));
 504
 505         pdev = platform_device_alloc("leds-gpio", id);
 506         if (!pdev)
 507                 goto err_free_leds;
 508
 509         memset(&pdata, 0, sizeof(pdata));
 510         pdata.num_leds = num_leds;
 511         pdata.leds = leds;
 512
 513         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 514         if (err)
 515                 goto err_put_pdev;
 516
 517         err = platform_device_add(pdev);
 518         if (err)
 519                 goto err_put_pdev;
 520
 521         return;
 522
 523 err_put_pdev:
 524         platform_device_put(pdev);
 525
 526 err_free_leds:
 527         kfree(p);
 528 }
 529
 530 void __init ar71xx_add_device_gpio_buttons(int id,
 531                                            unsigned poll_interval,
 532                                            unsigned nbuttons,
 533                                            struct gpio_button *buttons)
 534 {
 535         struct platform_device *pdev;
 536         struct gpio_buttons_platform_data pdata;
 537         struct gpio_button *p;
 538         int err;
 539
 540         p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
 541         if (!p)
 542                 return;
 543
 544         memcpy(p, buttons, nbuttons * sizeof(*p));
 545
 546         pdev = platform_device_alloc("gpio-buttons", id);
 547         if (!pdev)
 548                 goto err_free_buttons;
 549
 550         memset(&pdata, 0, sizeof(pdata));
 551         pdata.poll_interval = poll_interval;
 552         pdata.nbuttons = nbuttons;
 553         pdata.buttons = p;
 554
 555         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 556         if (err)
 557                 goto err_put_pdev;
 558
 559
 560         err = platform_device_add(pdev);
 561         if (err)
 562                 goto err_put_pdev;
 563
 564         return;
 565
 566 err_put_pdev:
 567         platform_device_put(pdev);
 568
 569 err_free_buttons:
 570         kfree(p);
 571 }
 572
 573 void __init ar71xx_add_device_wdt(void)
 574 {
 575         platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
 576 }
 577
 578 void __init ar71xx_set_mac_base(unsigned char *mac)
 579 {
 580         memcpy(ar71xx_mac_base, mac, ETH_ALEN);
 581 }
 582
 583 void __init ar71xx_parse_mac_addr(char *mac_str)
 584 {
 585         u8 tmp[ETH_ALEN];
 586         int t;
 587
 588         t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 589                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 590
 591         if (t == ETH_ALEN)
 592                 ar71xx_set_mac_base(tmp);
 593         else
 594                 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
 595                                 "\"%s\"\n", mac_str);
 596 }