ar71xx: move PB42 specific PCI init code into a separate file
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-tl-wr841n.c
1 /*
2  *  TP-LINK TL-WR841N board support
3  *
4  *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify it
7  *  under the terms of the GNU General Public License version 2 as published
8  *  by the Free Software Foundation.
9  */
10
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/input.h>
15
16 #include <asm/mips_machine.h>
17 #include <asm/mach-ar71xx/ar71xx.h>
18
19 #include "devices.h"
20 #include "dev-m25p80.h"
21 #include "dev-pb42-pci.h"
22
23 #define TL_WR841ND_V1_GPIO_LED_SYSTEM           2
24 #define TL_WR841ND_V1_GPIO_LED_QSS_GREEN        4
25 #define TL_WR841ND_V1_GPIO_LED_QSS_RED          5
26
27 #define TL_WR841ND_V1_GPIO_BTN_RESET    3
28 #define TL_WR841ND_V1_GPIO_BTN_QSS      7
29
30 #define TL_WR841ND_V1_BUTTONS_POLL_INTERVAL     20
31
32 #ifdef CONFIG_MTD_PARTITIONS
33 static struct mtd_partition tl_wr841n_v1_partitions[] = {
34         {
35                 .name           = "redboot",
36                 .offset         = 0,
37                 .size           = 0x020000,
38                 .mask_flags     = MTD_WRITEABLE,
39         } , {
40                 .name           = "kernel",
41                 .offset         = 0x020000,
42                 .size           = 0x140000,
43         } , {
44                 .name           = "rootfs",
45                 .offset         = 0x160000,
46                 .size           = 0x280000,
47         } , {
48                 .name           = "config",
49                 .offset         = 0x3e0000,
50                 .size           = 0x020000,
51                 .mask_flags     = MTD_WRITEABLE,
52         } , {
53                 .name           = "firmware",
54                 .offset         = 0x020000,
55                 .size           = 0x3c0000,
56         }
57 };
58 #endif /* CONFIG_MTD_PARTITIONS */
59
60 static struct flash_platform_data tl_wr841n_v1_flash_data = {
61 #ifdef CONFIG_MTD_PARTITIONS
62         .parts          = tl_wr841n_v1_partitions,
63         .nr_parts       = ARRAY_SIZE(tl_wr841n_v1_partitions),
64 #endif
65 };
66
67 static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = {
68         {
69                 .name           = "tl-wr841n:green:system",
70                 .gpio           = TL_WR841ND_V1_GPIO_LED_SYSTEM,
71                 .active_low     = 1,
72         }, {
73                 .name           = "tl-wr841n:red:qss",
74                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_RED,
75         }, {
76                 .name           = "tl-wr841n:green:qss",
77                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_GREEN,
78         }
79 };
80
81 static struct gpio_button tl_wr841n_v1_gpio_buttons[] __initdata = {
82         {
83                 .desc           = "reset",
84                 .type           = EV_KEY,
85                 .code           = BTN_0,
86                 .threshold      = 5,
87                 .gpio           = TL_WR841ND_V1_GPIO_BTN_RESET,
88                 .active_low     = 1,
89         }, {
90                 .desc           = "qss",
91                 .type           = EV_KEY,
92                 .code           = BTN_1,
93                 .threshold      = 5,
94                 .gpio           = TL_WR841ND_V1_GPIO_BTN_QSS,
95                 .active_low     = 1,
96         }
97 };
98
99 static struct dsa_chip_data tl_wr841n_v1_dsa_chip = {
100         .port_names[0]  = "wan",
101         .port_names[1]  = "lan1",
102         .port_names[2]  = "lan2",
103         .port_names[3]  = "lan3",
104         .port_names[4]  = "lan4",
105         .port_names[5]  = "cpu",
106 };
107
108 static struct dsa_platform_data tl_wr841n_v1_dsa_data = {
109         .nr_chips       = 1,
110         .chip           = &tl_wr841n_v1_dsa_chip,
111 };
112
113 static void __init tl_wr841n_v1_setup(void)
114 {
115         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
116
117         ar71xx_set_mac_base(mac);
118
119         ar71xx_add_device_mdio(0x0);
120
121         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
122         ar71xx_eth0_data.phy_mask = 0x0;
123         ar71xx_eth0_data.speed = SPEED_100;
124         ar71xx_eth0_data.duplex = DUPLEX_FULL;
125
126         ar71xx_add_device_eth(0);
127
128         ar71xx_add_device_dsa(0, &tl_wr841n_v1_dsa_data);
129
130         ar71xx_add_device_m25p80(&tl_wr841n_v1_flash_data);
131
132         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio),
133                                         tl_wr841n_v1_leds_gpio);
134
135         ar71xx_add_device_gpio_buttons(-1, TL_WR841ND_V1_BUTTONS_POLL_INTERVAL,
136                                         ARRAY_SIZE(tl_wr841n_v1_gpio_buttons),
137                                         tl_wr841n_v1_gpio_buttons);
138
139         pb42_pci_init();
140 }
141
142 MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V1, "TP-LINK TL-WR841N v1",
143              tl_wr841n_v1_setup);