target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c

   1 /*
   2  *  Atheros PB42 board support
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <asm/mach-ar71xx/ar71xx.h>
  13
  14 #include "machtype.h"
  15 #include "devices.h"
  16 #include "dev-m25p80.h"
  17 #include "dev-gpio-buttons.h"
  18 #include "dev-pb42-pci.h"
  19 #include "dev-usb.h"
  20
  21 #define PB42_BUTTONS_POLL_INTERVAL      20
  22
  23 #define PB42_GPIO_BTN_SW4       8
  24 #define PB42_GPIO_BTN_SW5       3
  25
  26 static struct gpio_button pb42_gpio_buttons[] __initdata = {
  27         {
  28                 .desc           = "sw4",
  29                 .type           = EV_KEY,
  30                 .code           = BTN_0,
  31                 .threshold      = 3,
  32                 .gpio           = PB42_GPIO_BTN_SW4,
  33                 .active_low     = 1,
  34         } , {
  35                 .desc           = "sw5",
  36                 .type           = EV_KEY,
  37                 .code           = BTN_1,
  38                 .threshold      = 3,
  39                 .gpio           = PB42_GPIO_BTN_SW5,
  40                 .active_low     = 1,
  41         }
  42 };
  43
  44 #define PB42_WAN_PHYMASK        BIT(20)
  45 #define PB42_LAN_PHYMASK        (BIT(16) | BIT(17) | BIT(18) | BIT(19))
  46 #define PB42_MDIO_PHYMASK       (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK)
  47
  48 static void __init pb42_init(void)
  49 {
  50         ar71xx_add_device_m25p80(NULL);
  51
  52         ar71xx_add_device_mdio(~PB42_MDIO_PHYMASK);
  53
  54         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
  55         ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK;
  56
  57         ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
  58         ar71xx_eth1_data.speed = SPEED_100;
  59         ar71xx_eth1_data.duplex = DUPLEX_FULL;
  60
  61         ar71xx_add_device_eth(0);
  62         ar71xx_add_device_eth(1);
  63
  64         ar71xx_add_device_gpio_buttons(-1, PB42_BUTTONS_POLL_INTERVAL,
  65                                        ARRAY_SIZE(pb42_gpio_buttons),
  66                                        pb42_gpio_buttons);
  67
  68         pb42_pci_init();
  69 }
  70
  71 MIPS_MACHINE(AR71XX_MACH_PB42, "PB42", "Atheros PB42", pb42_init);