2 * D-Link DIR-825 rev. B1 board support
4 * Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
6 * based on mach-wndr3700.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/input.h>
20 #include <asm/mips_machine.h>
21 #include <asm/mach-ar71xx/ar71xx.h>
22 #include <asm/mach-ar71xx/pci.h>
24 #include <linux/pci.h>
25 #include <linux/ath9k_platform.h>
26 #include <linux/delay.h>
31 #define DIR825B1_GPIO_LED_BLUE_USB 0
32 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
33 #define DIR825B1_GPIO_LED_BLUE_POWER 2
34 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE 4
35 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
36 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
38 #define DIR825B1_GPIO_BTN_RESET 3
39 #define DIR825B1_GPIO_BTN_POWERSAVE 8
41 #define DIR825B1_BUTTONS_POLL_INTERVAL 20
44 #define DIR825B1_CAL_LOCATION_0 0xbf661000
45 #define DIR825B1_CAL_LOCATION_1 0xbf665000
47 #define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
48 #define DIR825B1_MAC_LOCATION_1 0x2ffa8370
51 static struct ath9k_platform_data dir825b1_wmac0_data;
52 static struct ath9k_platform_data dir825b1_wmac1_data;
53 static char dir825b1_wmac0_mac[6];
54 static char dir825b1_wmac1_mac[6];
57 #ifdef CONFIG_MTD_PARTITIONS
58 static struct mtd_partition dir825b1_partitions[] = {
63 .mask_flags = MTD_WRITEABLE,
68 .mask_flags = MTD_WRITEABLE,
77 .mask_flags = MTD_WRITEABLE,
80 #endif /* CONFIG_MTD_PARTITIONS */
83 static struct flash_platform_data dir825b1_flash_data = {
84 #ifdef CONFIG_MTD_PARTITIONS
85 .parts = dir825b1_partitions,
86 .nr_parts = ARRAY_SIZE(dir825b1_partitions),
91 static struct spi_board_info dir825b1_spi_info[] = {
95 .max_speed_hz = 25000000,
97 .platform_data = &dir825b1_flash_data,
102 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
104 .name = "dir825b1:blue:usb",
105 .gpio = DIR825B1_GPIO_LED_BLUE_USB,
108 .name = "dir825b1:orange:power",
109 .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
112 .name = "dir825b1:blue:power",
113 .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
116 .name = "dir825b1:blue:powersave",
117 .gpio = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
120 .name = "dir825b1:orange:planet",
121 .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
124 .name = "dir825b1:blue:planet",
125 .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
131 static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
137 .gpio = DIR825B1_GPIO_BTN_RESET,
144 .gpio = DIR825B1_GPIO_BTN_POWERSAVE,
151 static struct ar71xx_pci_irq dir825b1_pci_irqs[] __initdata = {
155 .irq = AR71XX_PCI_IRQ_DEV0,
159 .irq = AR71XX_PCI_IRQ_DEV1,
164 static int dir825b1_pci_plat_dev_init(struct pci_dev *dev)
166 switch(PCI_SLOT(dev->devfn))
169 dev->dev.platform_data = &dir825b1_wmac0_data;
173 dev->dev.platform_data = &dir825b1_wmac1_data;
181 static void dir825b1_pci_fixup(struct pci_dev *dev)
189 if (ar71xx_mach != AR71XX_MACH_DIR825B1) return;
191 dir825b1_pci_plat_dev_init(dev);
192 cal_data = dev->dev.platform_data;
194 if (*cal_data != 0xa55a)
196 printk(KERN_ERR "PCI: no calibration data found for %s\n",
201 mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
204 printk(KERN_ERR "PCI: ioremap error for device %s\n",
209 printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
211 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
213 /* Setup the PCI device to allow access to the internal registers */
214 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
215 pci_read_config_word(dev, PCI_COMMAND, &cmd);
216 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
217 pci_write_config_word(dev, PCI_COMMAND, cmd);
219 /* set pointer to first reg address */
221 while (*cal_data != 0xffff)
226 val |= (*cal_data++) << 16;
228 __raw_writel(val, mem + reg);
232 pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
233 dev->vendor = val & 0xffff;
234 dev->device = (val >> 16) & 0xffff;
236 pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
237 dev->revision = val & 0xff;
238 dev->class = val >> 8; /* upper 3 bytes */
240 pci_read_config_word(dev, PCI_COMMAND, &cmd);
241 cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
242 pci_write_config_word(dev, PCI_COMMAND, cmd);
244 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
248 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
252 static void __init dir825b1_pci_init(void)
254 memcpy(dir825b1_wmac0_data.eeprom_data,
255 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
256 sizeof(dir825b1_wmac0_data.eeprom_data));
258 memcpy(dir825b1_wmac1_data.eeprom_data,
259 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
260 sizeof(dir825b1_wmac1_data.eeprom_data));
262 memcpy(dir825b1_wmac0_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_0), 6);
263 dir825b1_wmac0_data.macaddr = dir825b1_wmac0_mac;
264 memcpy(dir825b1_wmac1_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
265 dir825b1_wmac1_data.macaddr = dir825b1_wmac1_mac;
267 ar71xx_pci_plat_dev_init = dir825b1_pci_plat_dev_init;
268 ar71xx_pci_init(ARRAY_SIZE(dir825b1_pci_irqs), dir825b1_pci_irqs);
271 static void __init dir825b1_pci_init(void) { }
272 #endif /* CONFIG_PCI */
275 static void __init dir825b1_setup(void)
279 memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
280 for(i = 5; i >= 3; i--)
281 if(++mac[i] != 0x00) break;
283 ar71xx_set_mac_base(mac);
285 ar71xx_add_device_mdio(0x0);
287 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
288 ar71xx_eth0_data.phy_mask = 0x1E;
289 ar71xx_eth0_data.speed = SPEED_1000;
290 ar71xx_eth0_data.duplex = DUPLEX_FULL;
291 ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
293 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
294 ar71xx_eth1_data.phy_mask = 0xC0;
295 ar71xx_eth1_data.speed = SPEED_1000;
296 ar71xx_eth1_data.duplex = DUPLEX_FULL;
297 ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
299 ar71xx_add_device_eth(0);
300 ar71xx_add_device_eth(1);
302 ar71xx_add_device_spi(NULL, dir825b1_spi_info,
303 ARRAY_SIZE(dir825b1_spi_info));
305 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
308 ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
309 ARRAY_SIZE(dir825b1_gpio_buttons),
310 dir825b1_gpio_buttons);
312 ar71xx_add_device_usb();
317 MIPS_MACHINE(AR71XX_MACH_DIR825B1, "D-Link DIR825B1", dir825b1_setup);