2 * Copyright (C) 2006, 2007 OpenWrt.org
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #include <linux/types.h>
20 #include <linux/pci.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <asm/ar7/vlynq.h>
26 #define VLYNQ_PCI_SLOTS 2
28 struct vlynq_reg_config {
33 struct vlynq_pci_config {
36 struct vlynq_mapping rx_mapping[4];
42 struct vlynq_reg_config regs[10];
45 struct vlynq_pci_private {
50 struct vlynq_pci_config *config;
53 static struct vlynq_pci_config known_devices[] = {
55 .chip_id = 0x00000009, .name = "TI TNETW1130",
57 { .size = 0x22000, .offset = 0xf0000000 },
58 { .size = 0x40000, .offset = 0xc0000000 },
59 { .size = 0x0, .offset = 0x0 },
60 { .size = 0x0, .offset = 0x0 },
62 .irq = 0, .chip = 0x9066104c,
63 .irq_type = IRQ_TYPE_EDGE_RISING,
64 .class = PCI_CLASS_NETWORK_OTHER,
69 .value = (0xd0000000 - PHYS_OFFSET)
73 .value = (0xd0000000 - PHYS_OFFSET)
75 { .offset = 0x740, .value = 0 },
76 { .offset = 0x744, .value = 0x00010000 },
77 { .offset = 0x764, .value = 0x00010000 },
81 .chip_id = 0x00000029, .name = "TI TNETW1350",
83 { .size = 0x100000, .offset = 0x00300000 },
84 { .size = 0x80000, .offset = 0x00000000 },
85 { .size = 0x0, .offset = 0x0 },
86 { .size = 0x0, .offset = 0x0 },
88 .irq = 0, .chip = 0x9066104c,
89 .irq_type = IRQ_TYPE_EDGE_RISING,
90 .class = PCI_CLASS_NETWORK_OTHER,
95 .value = (0x60000000 - PHYS_OFFSET)
99 .value = (0x60000000 - PHYS_OFFSET)
101 { .offset = 0x740, .value = 0 },
102 { .offset = 0x744, .value = 0x00010000 },
103 { .offset = 0x764, .value = 0x00010000 },
108 static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
110 static struct resource vlynq_io_resource = {
113 .name = "pci IO space",
114 .flags = IORESOURCE_IO
117 static struct resource vlynq_mem_resource = {
120 .name = "pci memory space",
121 .flags = IORESOURCE_MEM
124 static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
127 struct vlynq_pci_private *priv = dev->priv;
128 u32 ret = dev->mem_start;
129 if (!priv->config->rx_mapping[res].size) return 0;
130 for (i = 0; i < res; i++)
131 ret += priv->config->rx_mapping[i].size;
136 static inline u32 vlynq_read(u32 val, int size) {
146 static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
148 struct vlynq_device *dev;
149 struct vlynq_pci_private *priv;
150 int resno, slot = PCI_SLOT(devfn);
152 if ((size == 2) && (where & 1))
153 return PCIBIOS_BAD_REGISTER_NUMBER;
154 else if ((size == 4) && (where & 3))
155 return PCIBIOS_BAD_REGISTER_NUMBER;
157 if (slot >= VLYNQ_PCI_SLOTS)
158 return PCIBIOS_DEVICE_NOT_FOUND;
162 if (!dev || (PCI_FUNC(devfn) > 0))
163 return PCIBIOS_DEVICE_NOT_FOUND;
169 *val = vlynq_read(priv->config->chip, size);
172 *val = priv->config->chip & 0xffff;
174 *val = priv->command;
176 /* *val = PCI_STATUS_CAP_LIST;*/
179 case PCI_CLASS_REVISION:
180 *val = priv->config->class;
182 case PCI_LATENCY_TIMER:
183 *val = priv->latency;
185 case PCI_HEADER_TYPE:
186 *val = PCI_HEADER_TYPE_NORMAL;
188 case PCI_CACHE_LINE_SIZE:
189 *val = priv->cache_line;
191 case PCI_BASE_ADDRESS_0:
192 case PCI_BASE_ADDRESS_1:
193 case PCI_BASE_ADDRESS_2:
194 case PCI_BASE_ADDRESS_3:
195 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
196 if (priv->sz_mask & (1 << resno)) {
197 priv->sz_mask &= ~(1 << resno);
198 *val = priv->config->rx_mapping[resno].size;
200 *val = vlynq_get_mapped(dev, resno);
203 case PCI_BASE_ADDRESS_4:
204 case PCI_BASE_ADDRESS_5:
205 case PCI_SUBSYSTEM_VENDOR_ID:
206 case PCI_SUBSYSTEM_ID:
207 case PCI_ROM_ADDRESS:
208 case PCI_INTERRUPT_LINE:
209 case PCI_CARDBUS_CIS:
210 case PCI_CAPABILITY_LIST:
213 case PCI_INTERRUPT_PIN:
217 printk("%s: Read of unknown register 0x%x (size %d)\n",
218 dev->dev.bus_id, where, size);
219 return PCIBIOS_BAD_REGISTER_NUMBER;
221 return PCIBIOS_SUCCESSFUL;
224 static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
226 struct vlynq_device *dev;
227 struct vlynq_pci_private *priv;
228 int resno, slot = PCI_SLOT(devfn);
230 if ((size == 2) && (where & 1))
231 return PCIBIOS_BAD_REGISTER_NUMBER;
232 else if ((size == 4) && (where & 3))
233 return PCIBIOS_BAD_REGISTER_NUMBER;
235 if (slot >= VLYNQ_PCI_SLOTS)
236 return PCIBIOS_DEVICE_NOT_FOUND;
240 if (!dev || (PCI_FUNC(devfn) > 0))
241 return PCIBIOS_DEVICE_NOT_FOUND;
249 case PCI_CLASS_REVISION:
250 case PCI_HEADER_TYPE:
251 case PCI_CACHE_LINE_SIZE:
252 case PCI_SUBSYSTEM_VENDOR_ID:
253 case PCI_SUBSYSTEM_ID:
254 case PCI_INTERRUPT_LINE:
255 case PCI_INTERRUPT_PIN:
256 case PCI_CARDBUS_CIS:
257 case PCI_CAPABILITY_LIST:
258 return PCIBIOS_FUNC_NOT_SUPPORTED;
261 case PCI_LATENCY_TIMER:
264 case PCI_BASE_ADDRESS_0:
265 case PCI_BASE_ADDRESS_1:
266 case PCI_BASE_ADDRESS_2:
267 case PCI_BASE_ADDRESS_3:
268 if (val == 0xffffffff) {
269 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
270 priv->sz_mask |= (1 << resno);
273 case PCI_BASE_ADDRESS_4:
274 case PCI_BASE_ADDRESS_5:
275 case PCI_ROM_ADDRESS:
278 printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
279 dev->dev.bus_id, where, size, val);
280 return PCIBIOS_BAD_REGISTER_NUMBER;
282 return PCIBIOS_SUCCESSFUL;
285 static struct pci_ops vlynq_pci_ops = {
290 static struct pci_controller vlynq_controller = {
291 .pci_ops = &vlynq_pci_ops,
292 .io_resource = &vlynq_io_resource,
293 .mem_resource = &vlynq_mem_resource,
296 static int vlynq_pci_probe(struct vlynq_device *dev)
300 struct vlynq_pci_private *priv;
301 struct vlynq_mapping mapping[4] = { { 0, }, };
302 struct vlynq_pci_config *config = NULL;
304 result = vlynq_set_local_irq(dev, 31);
308 result = vlynq_set_remote_irq(dev, 30);
312 result = vlynq_device_enable(dev);
316 chip_id = vlynq_remote_id(dev);
317 for (i = 0; i < ARRAY_SIZE(known_devices); i++)
318 if (chip_id == known_devices[i].chip_id)
319 config = &known_devices[i];
322 printk("vlynq-pci: skipping unknown device "
323 "%04x:%04x at %s\n", chip_id >> 16,
324 chip_id & 0xffff, dev->dev.bus_id);
329 printk("vlynq-pci: attaching device %s at %s\n",
330 config->name, dev->dev.bus_id);
332 priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL);
334 printk(KERN_ERR "%s: failed to allocate private data\n",
340 memset(priv, 0, sizeof(struct vlynq_pci_private));
342 priv->cache_line = 32;
343 priv->config = config;
345 mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
346 mapping[0].size = 0x02000000;
347 vlynq_set_local_mapping(dev, dev->mem_start, mapping);
348 vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
350 set_irq_type(vlynq_virq_to_irq(dev, config->irq), config->irq_type);
352 addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
354 printk(KERN_ERR "%s: failed to remap io memory\n",
360 for (i = 0; i < config->num_regs; i++)
361 iowrite32(config->regs[i].value,
362 (u32 *)(addr + config->regs[i].offset));
365 for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
375 vlynq_device_disable(dev);
380 static int vlynq_pci_remove(struct vlynq_device *dev)
383 struct vlynq_pci_private *priv = dev->priv;
385 for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
389 vlynq_device_disable(dev);
395 static struct vlynq_driver vlynq_pci = {
396 .name = "PCI over VLYNQ emulation",
397 .probe = vlynq_pci_probe,
398 .remove = vlynq_pci_remove,
401 int vlynq_pci_init(void)
404 res = vlynq_register_driver(&vlynq_pci);
408 register_pci_controller(&vlynq_controller);
413 int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
415 struct vlynq_device *dev;
416 struct vlynq_pci_private *priv;
425 return vlynq_virq_to_irq(dev, priv->config->irq);
428 /* Do platform specific device initialization at pci_enable_device() time */
429 int pcibios_plat_dev_init(struct pci_dev *dev)