target/linux/adm5120/files/arch/mips/adm5120/platform.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Generic ADM5120 platform devices
   5  *
   6  *  Copyright (C) 2007 OpenWrt.org
   7  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  *
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/list.h>
  18 #include <linux/device.h>
  19 #include <linux/platform_device.h>
  20
  21 #include <asm/bootinfo.h>
  22 #include <asm/gpio.h>
  23
  24 #include <adm5120_defs.h>
  25 #include <adm5120_info.h>
  26 #include <adm5120_irq.h>
  27 #include <adm5120_switch.h>
  28 #include <adm5120_nand.h>
  29 #include <adm5120_platform.h>
  30
  31 #if 1
  32 /*
  33  * TODO:remove global adm5120_eth* variables when the switch driver will be
  34  *      converted into a real platform driver
  35  */
  36 unsigned int adm5120_eth_num_ports = 6;
  37 EXPORT_SYMBOL_GPL(adm5120_eth_num_ports);
  38
  39 unsigned char adm5120_eth_macs[6][6] = {
  40         {'\00', 'A', 'D', 'M', '\x51', '\x20' },
  41         {'\00', 'A', 'D', 'M', '\x51', '\x21' },
  42         {'\00', 'A', 'D', 'M', '\x51', '\x22' },
  43         {'\00', 'A', 'D', 'M', '\x51', '\x23' },
  44         {'\00', 'A', 'D', 'M', '\x51', '\x24' },
  45         {'\00', 'A', 'D', 'M', '\x51', '\x25' }
  46 };
  47 EXPORT_SYMBOL_GPL(adm5120_eth_macs);
  48
  49 unsigned char adm5120_eth_vlans[6] = {
  50         0x41, 0x42, 0x44, 0x48, 0x50, 0x60
  51 };
  52 EXPORT_SYMBOL_GPL(adm5120_eth_vlans);
  53 #endif
  54
  55 /* Built-in ethernet switch */
  56 struct resource adm5120_switch_resources[] = {
  57         [0] = {
  58                 .start  = ADM5120_SWITCH_BASE,
  59                 .end    = ADM5120_SWITCH_BASE+ADM5120_SWITCH_SIZE-1,
  60                 .flags  = IORESOURCE_MEM,
  61         },
  62         [1] = {
  63                 .start  = ADM5120_IRQ_SWITCH,
  64                 .end    = ADM5120_IRQ_SWITCH,
  65                 .flags  = IORESOURCE_IRQ,
  66         },
  67 };
  68
  69 struct adm5120_switch_platform_data adm5120_switch_data;
  70 struct platform_device adm5120_switch_device = {
  71         .name   = "adm5120-switch",
  72         .id     = -1,
  73         .num_resources  = ARRAY_SIZE(adm5120_switch_resources),
  74         .resource       = adm5120_switch_resources,
  75         .dev.platform_data = &adm5120_switch_data,
  76 };
  77
  78 /* USB Host Controller */
  79 struct resource adm5120_hcd_resources[] = {
  80         [0] = {
  81                 .start  = ADM5120_USBC_BASE,
  82                 .end    = ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
  83                 .flags  = IORESOURCE_MEM,
  84         },
  85         [1] = {
  86                 .start  = ADM5120_IRQ_USBC,
  87                 .end    = ADM5120_IRQ_USBC,
  88                 .flags  = IORESOURCE_IRQ,
  89         },
  90 };
  91
  92 static u64 adm5120_hcd_dma_mask = ~(u32)0;
  93
  94 struct platform_device adm5120_hcd_device = {
  95         .name           = "adm5120-hcd",
  96         .id             = 0,
  97         .num_resources  = ARRAY_SIZE(adm5120_hcd_resources),
  98         .resource       = adm5120_hcd_resources,
  99         .dev = {
 100                 .dma_mask       = &adm5120_hcd_dma_mask,
 101                 .coherent_dma_mask = 0xFFFFFFFF,
 102         }
 103 };
 104
 105 /* NOR flash 0 */
 106 struct adm5120_flash_platform_data adm5120_flash0_data;
 107 struct platform_device adm5120_flash0_device =  {
 108         .name   = "adm5120-flash",
 109         .id     = 0,
 110         .dev.platform_data = &adm5120_flash0_data,
 111 };
 112
 113 /* NOR flash 1 */
 114 struct adm5120_flash_platform_data adm5120_flash1_data;
 115 struct platform_device adm5120_flash1_device =  {
 116         .name   = "adm5120-flash",
 117         .id     = 1,
 118         .dev.platform_data = &adm5120_flash1_data,
 119 };
 120
 121 /* NAND flash */
 122 struct resource adm5120_nand_resource[] = {
 123         [0] = {
 124                 .start  = ADM5120_NAND_BASE,
 125                 .end    = ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1,
 126                 .flags  = IORESOURCE_MEM,
 127         },
 128 };
 129
 130 struct platform_nand_data adm5120_nand_data = {
 131         .ctrl.dev_ready = adm5120_nand_ready,
 132         .ctrl.cmd_ctrl  = adm5120_nand_cmd_ctrl,
 133 };
 134
 135 struct platform_device adm5120_nand_device = {
 136         .name           = "gen_nand",
 137         .id             = -1,
 138         .num_resources  = ARRAY_SIZE(adm5120_nand_resource),
 139         .resource       = adm5120_nand_resource,
 140         .dev.platform_data = &adm5120_nand_data,
 141 };
 142
 143 /* built-in UARTs */
 144 struct amba_pl010_data adm5120_uart0_data = {
 145         .set_mctrl = adm5120_uart_set_mctrl
 146 };
 147
 148 struct amba_device adm5120_uart0_device = {
 149         .dev            = {
 150                 .bus_id = "APB:UART0",
 151                 .platform_data = &adm5120_uart0_data,
 152         },
 153         .res            = {
 154                 .start  = ADM5120_UART0_BASE,
 155                 .end    = ADM5120_UART0_BASE + ADM5120_UART_SIZE - 1,
 156                 .flags  = IORESOURCE_MEM,
 157         },
 158         .irq            = { ADM5120_IRQ_UART0, -1 },
 159         .periphid       = 0x0041010,
 160 };
 161
 162 struct amba_pl010_data adm5120_uart1_data = {
 163         .set_mctrl = adm5120_uart_set_mctrl
 164 };
 165
 166 struct amba_device adm5120_uart1_device = {
 167         .dev            = {
 168                 .bus_id = "APB:UART1",
 169                 .platform_data = &adm5120_uart1_data,
 170         },
 171         .res            = {
 172                 .start  = ADM5120_UART1_BASE,
 173                 .end    = ADM5120_UART1_BASE + ADM5120_UART_SIZE - 1,
 174                 .flags  = IORESOURCE_MEM,
 175         },
 176         .irq            = { ADM5120_IRQ_UART1, -1 },
 177         .periphid       = 0x0041010,
 178 };
 179
 180 void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
 181                 unsigned int mctrl)
 182 {
 183 }
 184
 185 int adm5120_nand_ready(struct mtd_info *mtd)
 186 {
 187         return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0);
 188 }
 189
 190 void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 191 {
 192         if (ctrl & NAND_CTRL_CHANGE) {
 193                 adm5120_nand_set_cle(ctrl & NAND_CLE);
 194                 adm5120_nand_set_ale(ctrl & NAND_ALE);
 195                 adm5120_nand_set_cen(ctrl & NAND_NCE);
 196         }
 197
 198         if (cmd != NAND_CMD_NONE)
 199                 NAND_WRITE_REG(NAND_REG_DATA, cmd);
 200 }
 201