package/uboot-xburst/files/cpu/mips/jz_mmc.c.orig

   1 /*
   2  * (C) Copyright 2003
   3  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <config.h>
  25 #include <common.h>
  26 #include <part.h>
  27
  28 #if defined CONFIG_JZ4740
  29 #include <asm-mips/jz4740.h>
  30
  31 #include "jz_mmc.h"
  32
  33 #define CFG_MMC_BASE            0x80600000
  34 static int sd2_0 = 0;
  35
  36 /*
  37  * GPIO definition
  38  */
  39 #define __msc_init_io()                         \
  40 do {                                            \
  41         __gpio_as_output(GPIO_SD_VCC_EN_N);     \
  42         __gpio_as_input(GPIO_SD_CD_N);          \
  43 } while (0)
  44
  45 #define __msc_enable_power()                    \
  46 do {                                            \
  47         __gpio_clear_pin(GPIO_SD_VCC_EN_N);     \
  48 } while (0)
  49
  50 #define __msc_disable_power()                   \
  51 do {                                            \
  52         __gpio_set_pin(GPIO_SD_VCC_EN_N);       \
  53 } while (0)
  54
  55 #define __msc_card_detected()                   \
  56 ({                                              \
  57         int detected = 1;                       \
  58         __gpio_as_input(GPIO_SD_CD_N);          \
  59         if (!__gpio_get_pin(GPIO_SD_CD_N))      \
  60                 detected = 0;                   \
  61         detected;                               \
  62 })
  63
  64 /*
  65  * Local functions
  66  */
  67
  68 #ifdef CONFIG_MMC
  69 extern int
  70 fat_register_device(block_dev_desc_t *dev_desc, int part_no);
  71
  72 static block_dev_desc_t mmc_dev;
  73
  74 block_dev_desc_t * mmc_get_dev(int dev)
  75 {
  76         return ((block_dev_desc_t *)&mmc_dev);
  77 }
  78
  79 /*
  80  * FIXME needs to read cid and csd info to determine block size
  81  * and other parameters
  82  */
  83 static uchar mmc_buf[MMC_BLOCK_SIZE];
  84 static int mmc_ready = 0;
  85 static mmc_csd_t mmc_csd;
  86 static int use_4bit;                    /* Use 4-bit data bus */
  87 /*
  88  *  MMC Events
  89  */
  90 #define MMC_EVENT_NONE          0x00    /* No events */
  91 #define MMC_EVENT_RX_DATA_DONE  0x01    /* Rx data done */
  92 #define MMC_EVENT_TX_DATA_DONE  0x02    /* Tx data done */
  93 #define MMC_EVENT_PROG_DONE     0x04    /* Programming is done */
  94
  95
  96 #define MMC_IRQ_MASK()                          \
  97 do {                                            \
  98         REG_MSC_IMASK = 0xffff;                 \
  99         REG_MSC_IREG = 0xffff;                  \
 100 } while (0)
 101
 102 /* Stop the MMC clock and wait while it happens */
 103 static inline int jz_mmc_stop_clock(void)
 104 {
 105         int timeout = 1000;
 106
 107         REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_STOP;
 108
 109         while (timeout && (REG_MSC_STAT & MSC_STAT_CLK_EN)) {
 110                 timeout--;
 111                 if (timeout == 0) {
 112                         return MMC_ERROR_TIMEOUT;
 113                 }
 114                 udelay(1);
 115         }
 116         return MMC_NO_ERROR;
 117 }
 118
 119 /* Start the MMC clock and operation */
 120 static inline int jz_mmc_start_clock(void)
 121 {
 122         REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START | MSC_STRPCL_START_OP;
 123         return MMC_NO_ERROR;
 124 }
 125
 126 static inline u32 jz_mmc_calc_clkrt(int is_sd, u32 rate)
 127 {
 128         u32 clkrt;
 129         u32 clk_src = is_sd ? 24000000: 16000000;
 130
 131         clkrt = 0;
 132         while (rate < clk_src)
 133         {
 134                 clkrt ++;
 135                 clk_src >>= 1;
 136         }
 137         return clkrt;
 138 }
 139
 140 /* Set the MMC clock frequency */
 141 void jz_mmc_set_clock(int sd, u32 rate)
 142 {
 143         jz_mmc_stop_clock();
 144
 145         /* Select clock source of MSC */
 146         __cpm_select_msc_clk(sd);
 147
 148         /* Set clock dividor of MSC */
 149         REG_MSC_CLKRT = jz_mmc_calc_clkrt(sd, rate);
 150 }
 151
 152 static int jz_mmc_check_status(struct mmc_request *request)
 153 {
 154         u32 status = REG_MSC_STAT;
 155
 156         /* Checking for response or data timeout */
 157         if (status & (MSC_STAT_TIME_OUT_RES | MSC_STAT_TIME_OUT_READ)) {
 158                 printf("MMC/SD timeout, MMC_STAT 0x%x CMD %d\n", status, request->cmd);
 159                 return MMC_ERROR_TIMEOUT;
 160         }
 161
 162         /* Checking for CRC error */
 163         if (status & (MSC_STAT_CRC_READ_ERROR | MSC_STAT_CRC_WRITE_ERROR | MSC_STAT_CRC_RES_ERR)) {
 164                 printf("MMC/CD CRC error, MMC_STAT 0x%x\n", status);
 165                 return MMC_ERROR_CRC;
 166         }
 167
 168         return MMC_NO_ERROR;
 169 }
 170
 171 /* Obtain response to the command and store it to response buffer */
 172 static void jz_mmc_get_response(struct mmc_request *request)
 173 {
 174         int i;
 175         u8 *buf;
 176         u32 data;
 177
 178         DEBUG(3, "fetch response for request %d, cmd %d\n", request->rtype, request->cmd);
 179
 180         buf = request->response;
 181         request->result = MMC_NO_ERROR;
 182
 183         switch (request->rtype) {
 184         case RESPONSE_R1: case RESPONSE_R1B: case RESPONSE_R6:
 185         case RESPONSE_R3: case RESPONSE_R4: case RESPONSE_R5:
 186         {
 187                 data = REG_MSC_RES;
 188                 buf[0] = (data >> 8) & 0xff;
 189                 buf[1] = data & 0xff;
 190                 data = REG_MSC_RES;
 191                 buf[2] = (data >> 8) & 0xff;
 192                 buf[3] = data & 0xff;
 193                 data = REG_MSC_RES;
 194                 buf[4] = data & 0xff;
 195
 196                 DEBUG(3, "request %d, response [%02x %02x %02x %02x %02x]\n",
 197                       request->rtype, buf[0], buf[1], buf[2], buf[3], buf[4]);
 198                 break;
 199         }
 200         case RESPONSE_R2_CID: case RESPONSE_R2_CSD:
 201         {
 202                 for (i = 0; i < 16; i += 2) {
 203                         data = REG_MSC_RES;
 204                         buf[i] = (data >> 8) & 0xff;
 205                         buf[i+1] = data & 0xff;
 206                 }
 207                 DEBUG(3, "request %d, response [", request->rtype);
 208 #if CONFIG_MMC_DEBUG_VERBOSE > 2
 209                 if (g_mmc_debug >= 3) {
 210                         int n;
 211                         for (n = 0; n < 17; n++)
 212                                 printk("%02x ", buf[n]);
 213                         printk("]\n");
 214                 }
 215 #endif
 216                 break;
 217         }
 218         case RESPONSE_NONE:
 219                 DEBUG(3, "No response\n");
 220                 break;
 221
 222         default:
 223                 DEBUG(3, "unhandled response type for request %d\n", request->rtype);
 224                 break;
 225         }
 226 }
 227
 228 static int jz_mmc_receive_data(struct mmc_request *req)
 229 {
 230         u32  stat, timeout, data, cnt;
 231         u8 *buf = req->buffer;
 232         u32 wblocklen = (u32)(req->block_len + 3) >> 2; /* length in word */
 233
 234         timeout = 0x3ffffff;
 235
 236         while (timeout) {
 237                 timeout--;
 238                 stat = REG_MSC_STAT;
 239
 240                 if (stat & MSC_STAT_TIME_OUT_READ)
 241                         return MMC_ERROR_TIMEOUT;
 242                 else if (stat & MSC_STAT_CRC_READ_ERROR)
 243                         return MMC_ERROR_CRC;
 244                 else if (!(stat & MSC_STAT_DATA_FIFO_EMPTY)
 245                          || (stat & MSC_STAT_DATA_FIFO_AFULL)) {
 246                         /* Ready to read data */
 247                         break;
 248                 }
 249                 udelay(1);
 250         }
 251         if (!timeout)
 252                 return MMC_ERROR_TIMEOUT;
 253
 254         /* Read data from RXFIFO. It could be FULL or PARTIAL FULL */
 255         cnt = wblocklen;
 256         while (cnt) {
 257                 data = REG_MSC_RXFIFO;
 258                 {
 259                         *buf++ = (u8)(data >> 0);
 260                         *buf++ = (u8)(data >> 8);
 261                         *buf++ = (u8)(data >> 16);
 262                         *buf++ = (u8)(data >> 24);
 263                 }
 264                 cnt --;
 265                 while (cnt && (REG_MSC_STAT & MSC_STAT_DATA_FIFO_EMPTY))
 266                         ;
 267         }
 268         return MMC_NO_ERROR;
 269 }
 270
 271 static int jz_mmc_transmit_data(struct mmc_request *req)
 272 {
 273 #if 0
 274         u32 nob = req->nob;
 275         u32 wblocklen = (u32)(req->block_len + 3) >> 2; /* length in word */
 276         u8 *buf = req->buffer;
 277         u32 *wbuf = (u32 *)buf;
 278         u32 waligned = (((u32)buf & 0x3) == 0); /* word aligned ? */
 279         u32 stat, timeout, data, cnt;
 280
 281         for (nob; nob >= 1; nob--) {
 282                 timeout = 0x3FFFFFF;
 283
 284                 while (timeout) {
 285                         timeout--;
 286                         stat = REG_MSC_STAT;
 287
 288                         if (stat & (MSC_STAT_CRC_WRITE_ERROR | MSC_STAT_CRC_WRITE_ERROR_NOSTS))
 289                                 return MMC_ERROR_CRC;
 290                         else if (!(stat & MSC_STAT_DATA_FIFO_FULL)) {
 291                                 /* Ready to write data */
 292                                 break;
 293                         }
 294
 295                         udelay(1);
 296                 }
 297
 298                 if (!timeout)
 299                         return MMC_ERROR_TIMEOUT;
 300
 301                 /* Write data to TXFIFO */
 302                 cnt = wblocklen;
 303                 while (cnt) {
 304                         while (REG_MSC_STAT & MSC_STAT_DATA_FIFO_FULL)
 305                                 ;
 306
 307                         if (waligned) {
 308                                 REG_MSC_TXFIFO = *wbuf++;
 309                         }
 310                         else {
 311                                 data = *buf++ | (*buf++ << 8) | (*buf++ << 16) | (*buf++ << 24);
 312                                 REG_MSC_TXFIFO = data;
 313                         }
 314
 315                         cnt--;
 316                 }
 317         }
 318 #endif
 319         return MMC_NO_ERROR;
 320 }
 321
 322
 323 /*
 324  * Name:          int jz_mmc_exec_cmd()
 325  * Function:      send command to the card, and get a response
 326  * Input:         struct mmc_request *req       : MMC/SD request
 327  * Output:        0:  right             >0:  error code
 328  */
 329 int jz_mmc_exec_cmd(struct mmc_request *request)
 330 {
 331         u32 cmdat = 0, events = 0;
 332         int retval, timeout = 0x3fffff;
 333
 334         /* Indicate we have no result yet */
 335         request->result = MMC_NO_RESPONSE;
 336         if (request->cmd == MMC_CIM_RESET) {
 337                 /* On reset, 1-bit bus width */
 338                 use_4bit = 0;
 339
 340                 /* Reset MMC/SD controller */
 341                 __msc_reset();
 342
 343                 /* On reset, drop MMC clock down */
 344                 jz_mmc_set_clock(0, MMC_CLOCK_SLOW);
 345
 346                 /* On reset, stop MMC clock */
 347                 jz_mmc_stop_clock();
 348         }
 349         if (request->cmd == MMC_SEND_OP_COND) {
 350                 DEBUG(3, "Have an MMC card\n");
 351                 /* always use 1bit for MMC */
 352                 use_4bit = 0;
 353         }
 354         if (request->cmd == SET_BUS_WIDTH) {
 355                 if (request->arg == 0x2) {
 356                         DEBUG(2, "Use 4-bit bus width\n");
 357                         use_4bit = 1;
 358                 }
 359                 else {
 360                         DEBUG(2, "Use 1-bit bus width\n");
 361                         use_4bit = 0;
 362                 }
 363         }
 364
 365         /* stop clock */
 366         jz_mmc_stop_clock();
 367
 368         /* mask all interrupts */
 369         REG_MSC_IMASK = 0xffff;
 370
 371         /* clear status */
 372         REG_MSC_IREG = 0xffff;
 373
 374         /* use 4-bit bus width when possible */
 375         if (use_4bit)
 376                 cmdat |= MSC_CMDAT_BUS_WIDTH_4BIT;
 377
 378         /* Set command type and events */
 379         switch (request->cmd) {
 380         /* MMC core extra command */
 381         case MMC_CIM_RESET:
 382                 cmdat |= MSC_CMDAT_INIT; /* Initialization sequence sent prior to command */
 383                 break;
 384
 385         /* bc - broadcast - no response */
 386         case MMC_GO_IDLE_STATE:
 387         case MMC_SET_DSR:
 388                 break;
 389
 390         /* bcr - broadcast with response */
 391         case MMC_SEND_OP_COND:
 392         case MMC_ALL_SEND_CID:
 393         case MMC_GO_IRQ_STATE:
 394                 break;
 395
 396         /* adtc - addressed with data transfer */
 397         case MMC_READ_DAT_UNTIL_STOP:
 398         case MMC_READ_SINGLE_BLOCK:
 399         case MMC_READ_MULTIPLE_BLOCK:
 400         case SEND_SCR:
 401                 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_READ;
 402                 events = MMC_EVENT_RX_DATA_DONE;
 403                 break;
 404
 405         case MMC_WRITE_DAT_UNTIL_STOP:
 406         case MMC_WRITE_BLOCK:
 407         case MMC_WRITE_MULTIPLE_BLOCK:
 408         case MMC_PROGRAM_CID:
 409         case MMC_PROGRAM_CSD:
 410         case MMC_SEND_WRITE_PROT:
 411         case MMC_GEN_CMD:
 412         case MMC_LOCK_UNLOCK:
 413                 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_WRITE;
 414                 events = MMC_EVENT_TX_DATA_DONE | MMC_EVENT_PROG_DONE;
 415
 416                 break;
 417
 418         case MMC_STOP_TRANSMISSION:
 419                 events = MMC_EVENT_PROG_DONE;
 420                 break;
 421
 422         /* ac - no data transfer */
 423         default:
 424                 break;
 425         }
 426
 427         /* Set response type */
 428         switch (request->rtype) {
 429         case RESPONSE_NONE:
 430                 break;
 431
 432         case RESPONSE_R1B:
 433                 cmdat |= MSC_CMDAT_BUSY;
 434                 /*FALLTHRU*/
 435         case RESPONSE_R1:
 436                 cmdat |= MSC_CMDAT_RESPONSE_R1;
 437                 break;
 438         case RESPONSE_R2_CID:
 439         case RESPONSE_R2_CSD:
 440                 cmdat |= MSC_CMDAT_RESPONSE_R2;
 441                 break;
 442         case RESPONSE_R3:
 443                 cmdat |= MSC_CMDAT_RESPONSE_R3;
 444                 break;
 445         case RESPONSE_R4:
 446                 cmdat |= MSC_CMDAT_RESPONSE_R4;
 447                 break;
 448         case RESPONSE_R5:
 449                 cmdat |= MSC_CMDAT_RESPONSE_R5;
 450                 break;
 451         case RESPONSE_R6:
 452                 cmdat |= MSC_CMDAT_RESPONSE_R6;
 453                 break;
 454         default:
 455                 break;
 456         }
 457
 458         /* Set command index */
 459         if (request->cmd == MMC_CIM_RESET) {
 460                 REG_MSC_CMD = MMC_GO_IDLE_STATE;
 461         } else {
 462                 REG_MSC_CMD = request->cmd;
 463         }
 464
 465         /* Set argument */
 466         REG_MSC_ARG = request->arg;
 467
 468         /* Set block length and nob */
 469         if (request->cmd == SEND_SCR) { /* get SCR from DataFIFO */
 470                 REG_MSC_BLKLEN = 8;
 471                 REG_MSC_NOB = 1;
 472         } else {
 473                 REG_MSC_BLKLEN = request->block_len;
 474                 REG_MSC_NOB = request->nob;
 475         }
 476
 477         /* Set command */
 478         REG_MSC_CMDAT = cmdat;
 479
 480         DEBUG(1, "Send cmd %d cmdat: %x arg: %x resp %d\n", request->cmd,
 481               cmdat, request->arg, request->rtype);
 482
 483         /* Start MMC/SD clock and send command to card */
 484         jz_mmc_start_clock();
 485
 486         /* Wait for command completion */
 487         while (timeout-- && !(REG_MSC_STAT & MSC_STAT_END_CMD_RES))
 488                 ;
 489
 490         if (timeout == 0)
 491                 return MMC_ERROR_TIMEOUT;
 492
 493         REG_MSC_IREG = MSC_IREG_END_CMD_RES; /* clear flag */
 494
 495         /* Check for status */
 496         retval = jz_mmc_check_status(request);
 497         if (retval) {
 498                 return retval;
 499         }
 500
 501         /* Complete command with no response */
 502         if (request->rtype == RESPONSE_NONE) {
 503                 return MMC_NO_ERROR;
 504         }
 505
 506         /* Get response */
 507         jz_mmc_get_response(request);
 508
 509         /* Start data operation */
 510         if (events & (MMC_EVENT_RX_DATA_DONE | MMC_EVENT_TX_DATA_DONE)) {
 511                 if (events & MMC_EVENT_RX_DATA_DONE) {
 512                         if (request->cmd == SEND_SCR) {
 513                                 /* SD card returns SCR register as data.
 514                                    MMC core expect it in the response buffer,
 515                                    after normal response. */
 516                                 request->buffer = (u8 *)((u32)request->response + 5);
 517                         }
 518                         jz_mmc_receive_data(request);
 519                 }
 520
 521                 if (events & MMC_EVENT_TX_DATA_DONE) {
 522                         jz_mmc_transmit_data(request);
 523                 }
 524
 525                 /* Wait for Data Done */
 526                 while (!(REG_MSC_IREG & MSC_IREG_DATA_TRAN_DONE))
 527                         ;
 528                 REG_MSC_IREG = MSC_IREG_DATA_TRAN_DONE; /* clear status */
 529         }
 530
 531         /* Wait for Prog Done event */
 532         if (events & MMC_EVENT_PROG_DONE) {
 533                 while (!(REG_MSC_IREG & MSC_IREG_PRG_DONE))
 534                         ;
 535                 REG_MSC_IREG = MSC_IREG_PRG_DONE; /* clear status */
 536         }
 537
 538         /* Command completed */
 539
 540         return MMC_NO_ERROR;                     /* return successfully */
 541 }
 542
 543 int mmc_block_read(u8 *dst, ulong src, ulong len)
 544 {
 545
 546         struct mmc_request request;
 547         struct mmc_response_r1 r1;
 548         int retval;
 549
 550         if (len == 0) {
 551                 return 0;
 552         }
 553         mmc_simple_cmd(&request, MMC_SEND_STATUS, mmcinfo.rca, RESPONSE_R1);
 554         retval = mmc_unpack_r1(&request, &r1, 0);
 555         if (retval && (retval != MMC_ERROR_STATE_MISMATCH)) {
 556                 return retval;
 557         }
 558
 559         mmc_simple_cmd(&request, MMC_SET_BLOCKLEN, len, RESPONSE_R1);
 560         if ((retval = mmc_unpack_r1(&request, &r1, 0))) {
 561                 return retval;
 562         }
 563
 564         if (sd2_0)
 565                 src /= len;
 566
 567         mmc_send_cmd(&request, MMC_READ_SINGLE_BLOCK, src, 1,len, RESPONSE_R1, dst);
 568         if ((retval = mmc_unpack_r1(&request, &r1, 0))) {
 569                 return retval;
 570         }
 571         return retval;
 572 }
 573
 574 int mmc_block_write(ulong dst, uchar *src, int len)
 575 {
 576         return 0;
 577 }
 578
 579 int mmc_read(ulong src, uchar *dst, int size)
 580 {
 581         ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
 582         ulong mmc_block_size, mmc_block_address;
 583
 584         if (size == 0) {
 585                 return 0;
 586         }
 587
 588         if (!mmc_ready) {
 589                 printf("MMC card is not ready\n");
 590                 return -1;
 591         }
 592
 593         mmc_block_size = MMC_BLOCK_SIZE;
 594         mmc_block_address = ~(mmc_block_size - 1);
 595
 596         src -= CFG_MMC_BASE;
 597         end = src + size;
 598         part_start = ~mmc_block_address & src;
 599         part_end = ~mmc_block_address & end;
 600         aligned_start = mmc_block_address & src;
 601         aligned_end = mmc_block_address & end;
 602         /* all block aligned accesses */
 603         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 604         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 605         if (part_start) {
 606                 part_len = mmc_block_size - part_start;
 607                 debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 608                 src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 609                 if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) {
 610                         return -1;
 611                 }
 612                 memcpy(dst, mmc_buf+part_start, part_len);
 613                 dst += part_len;
 614                 src += part_len;
 615         }
 616         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 617         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 618         for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
 619                 debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 620                 src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 621
 622                 if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0) {
 623                         return -1;
 624                 }
 625         }
 626         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 627         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 628
 629         if (part_end && src < end) {
 630                 if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) {
 631                         return -1;
 632                 }
 633                 memcpy(dst, mmc_buf, part_end);
 634         }
 635         return 0;
 636
 637 }
 638
 639 int mmc_write(uchar *src, ulong dst, int size)
 640 {
 641         ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
 642         ulong mmc_block_size, mmc_block_address;
 643
 644         if (size == 0) {
 645                 return 0;
 646         }
 647
 648         if (!mmc_ready) {
 649                 printf("MMC card is not ready\n");
 650                 return -1;
 651         }
 652
 653         mmc_block_size = MMC_BLOCK_SIZE;
 654         mmc_block_address = ~(mmc_block_size - 1);
 655
 656         dst -= CFG_MMC_BASE;
 657         end = dst + size;
 658         part_start = ~mmc_block_address & dst;
 659         part_end = ~mmc_block_address & end;
 660         aligned_start = mmc_block_address & dst;
 661         aligned_end = mmc_block_address & end;
 662
 663         /* all block aligned accesses */
 664         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 665         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 666         if (part_start) {
 667                 part_len = mmc_block_size - part_start;
 668                 debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 669                 (ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
 670                 if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) {
 671                         return -1;
 672                 }
 673                 memcpy(mmc_buf+part_start, src, part_len);
 674                 if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0) {
 675                         return -1;
 676                 }
 677                 dst += part_len;
 678                 src += part_len;
 679         }
 680         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 681         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 682         for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
 683                 debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 684                 src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 685                 if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0) {
 686                         return -1;
 687                 }
 688         }
 689         debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 690         src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 691         if (part_end && dst < end) {
 692                 debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
 693                 src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
 694                 if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) {
 695                         return -1;
 696                 }
 697                 memcpy(mmc_buf, src, part_end);
 698                 if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0) {
 699                         return -1;
 700                 }
 701         }
 702         return 0;
 703 }
 704
 705 ulong mmc_bread(int dev_num, ulong blknr, ulong blkcnt, ulong *dst)
 706 {
 707         ulong src;
 708         int mmc_block_size = MMC_BLOCK_SIZE;
 709
 710         src = blknr * mmc_block_size + CFG_MMC_BASE;
 711         mmc_read(src, (uchar *)dst, blkcnt*mmc_block_size);
 712         return blkcnt;
 713 }
 714
 715 int mmc_select_card(void)
 716 {
 717         struct mmc_request request;
 718         struct mmc_response_r1 r1;
 719         int retval;
 720
 721         mmc_simple_cmd(&request, MMC_SELECT_CARD, mmcinfo.rca, RESPONSE_R1B);
 722         retval = mmc_unpack_r1(&request, &r1, 0);
 723         if (retval) {
 724                 return retval;
 725         }
 726
 727         if (mmcinfo.sd) {
 728                 mmc_simple_cmd(&request, MMC_APP_CMD,  mmcinfo.rca, RESPONSE_R1);
 729                 retval = mmc_unpack_r1(&request,&r1,0);
 730                 if (retval) {
 731                         return retval;
 732                 }
 733                 mmc_simple_cmd(&request, SET_BUS_WIDTH, 2, RESPONSE_R1);
 734                 retval = mmc_unpack_r1(&request,&r1,0);
 735                 if (retval) {
 736                         return retval;
 737                 }
 738         }
 739         return 0;
 740 }
 741
 742 /*
 743  * Configure card
 744  */
 745 static void mmc_configure_card(void)
 746 {
 747         u32 rate;
 748
 749         /* Get card info */
 750         if (sd2_0)
 751                 mmcinfo.block_num = (mmcinfo.csd.c_size + 1) << 10;
 752         else
 753                 mmcinfo.block_num = (mmcinfo.csd.c_size + 1) * (1 << (mmcinfo.csd.c_size_mult + 2));
 754
 755         mmcinfo.block_len = 1 << mmcinfo.csd.read_bl_len;
 756
 757         /* Fix the clock rate */
 758         rate = mmc_tran_speed(mmcinfo.csd.tran_speed);
 759         if (rate < MMC_CLOCK_SLOW)
 760                 rate = MMC_CLOCK_SLOW;
 761         if ((mmcinfo.sd == 0) && (rate > MMC_CLOCK_FAST))
 762                 rate = MMC_CLOCK_FAST;
 763         if ((mmcinfo.sd) && (rate > SD_CLOCK_FAST))
 764                 rate = SD_CLOCK_FAST;
 765
 766         DEBUG(2,"mmc_configure_card: block_len=%d block_num=%d rate=%d\n", mmcinfo.block_len, mmcinfo.block_num, rate);
 767
 768         jz_mmc_set_clock(mmcinfo.sd, rate);
 769 }
 770
 771 /*
 772  * State machine routines to initialize card(s)
 773  */
 774
 775 /*
 776   CIM_SINGLE_CARD_ACQ  (frequency at 400 kHz)
 777   --- Must enter from GO_IDLE_STATE ---
 778   1. SD_SEND_OP_COND (SD Card) [CMD55] + [CMD41]
 779   2. SEND_OP_COND (Full Range) [CMD1]   {optional}
 780   3. SEND_OP_COND (Set Range ) [CMD1]
 781      If busy, delay and repeat step 2
 782   4. ALL_SEND_CID              [CMD2]
 783      If timeout, set an error (no cards found)
 784   5. SET_RELATIVE_ADDR         [CMD3]
 785   6. SEND_CSD                  [CMD9]
 786   7. SET_DSR                   [CMD4]    Only call this if (csd.dsr_imp).
 787   8. Set clock frequency (check available in csd.tran_speed)
 788  */
 789
 790 #define MMC_INIT_DOING   0
 791 #define MMC_INIT_PASSED  1
 792 #define MMC_INIT_FAILED  2
 793
 794 static int mmc_init_card_state(struct mmc_request *request)
 795 {
 796         struct mmc_response_r1 r1;
 797         struct mmc_response_r3 r3;
 798         int retval;
 799         int ocr = 0x40300000;
 800         int limit_41 = 0;
 801
 802         DEBUG(2,"mmc_init_card_state\n");
 803
 804         switch (request->cmd) {
 805         case MMC_GO_IDLE_STATE: /* No response to parse */
 806                 if (mmcinfo.sd)
 807                         mmc_simple_cmd(request, 8, 0x1aa, RESPONSE_R1);
 808                 else
 809                         mmc_simple_cmd(request, MMC_SEND_OP_COND, MMC_OCR_ARG, RESPONSE_R3);
 810                 break;
 811
 812         case 8:
 813                 retval = mmc_unpack_r1(request,&r1,mmcinfo.state);
 814                 mmc_simple_cmd(request, MMC_APP_CMD,  0, RESPONSE_R1);
 815                 break;
 816
 817         case MMC_APP_CMD:
 818                 retval = mmc_unpack_r1(request,&r1,mmcinfo.state);
 819                 if (retval & (limit_41 < 100)) {
 820                         DEBUG(0, "mmc_init_card_state: unable to MMC_APP_CMD error=%d (%s)\n",
 821                               retval, mmc_result_to_string(retval));
 822                         limit_41++;
 823                         mmc_simple_cmd(request, SD_SEND_OP_COND, ocr, RESPONSE_R3);
 824                 } else if (limit_41 < 100) {
 825                         limit_41++;
 826                         mmc_simple_cmd(request, SD_SEND_OP_COND, ocr, RESPONSE_R3);
 827                 } else{
 828                         /* reset the card to idle*/
 829                         mmc_simple_cmd(request, MMC_GO_IDLE_STATE, 0, RESPONSE_NONE);
 830                         mmcinfo.sd = 0;
 831                 }
 832                 break;
 833
 834         case SD_SEND_OP_COND:
 835                 retval = mmc_unpack_r3(request, &r3);
 836                 if (retval) {
 837                   /* Try MMC card */
 838                     mmc_simple_cmd(request, MMC_SEND_OP_COND, MMC_OCR_ARG, RESPONSE_R3);
 839                     break;
 840                 }
 841
 842                 DEBUG(2,"mmc_init_card_state: read ocr value = 0x%08x\n", r3.ocr);
 843
 844                 if(!(r3.ocr & MMC_CARD_BUSY || ocr == 0)){
 845                         udelay(10000);
 846                         mmc_simple_cmd(request, MMC_APP_CMD, 0, RESPONSE_R1);
 847                 }
 848                 else {
 849                   /* Set the data bus width to 4 bits */
 850                   mmcinfo.sd = 1; /* SD Card ready */
 851                   mmcinfo.state = CARD_STATE_READY;
 852                   mmc_simple_cmd(request, MMC_ALL_SEND_CID, 0, RESPONSE_R2_CID);
 853                 }
 854                 break;
 855
 856         case MMC_SEND_OP_COND:
 857                 retval = mmc_unpack_r3(request, &r3);
 858                 if (retval) {
 859                         DEBUG(0,"mmc_init_card_state: failed SEND_OP_COND error=%d (%s)\n",
 860                               retval, mmc_result_to_string(retval));
 861                         return MMC_INIT_FAILED;
 862                 }
 863
 864                 DEBUG(2,"mmc_init_card_state: read ocr value = 0x%08x\n", r3.ocr);
 865                 if (!(r3.ocr & MMC_CARD_BUSY)) {
 866                         mmc_simple_cmd(request, MMC_SEND_OP_COND, MMC_OCR_ARG, RESPONSE_R3);
 867                 }
 868                 else {
 869                         mmcinfo.sd = 0; /* MMC Card ready */
 870                         mmcinfo.state = CARD_STATE_READY;
 871                         mmc_simple_cmd(request, MMC_ALL_SEND_CID, 0, RESPONSE_R2_CID);
 872                 }
 873                 break;
 874
 875         case MMC_ALL_SEND_CID:
 876                 retval = mmc_unpack_cid( request, &mmcinfo.cid );
 877                 mmc_dev.if_type = IF_TYPE_MMC;
 878                 mmc_dev.part_type = PART_TYPE_DOS;
 879                 mmc_dev.dev = 0;
 880                 mmc_dev.lun = 0;
 881                 mmc_dev.type = 0;
 882                 /* FIXME fill in the correct size (is set to 32MByte) */
 883                 mmc_dev.blksz = 512;
 884                 mmc_dev.lba = 0x10000;
 885                 mmc_dev.removable = 0;
 886
 887                 /*FIXME:ignore CRC error for CMD2/CMD9/CMD10 */
 888                 if ( retval && (retval != MMC_ERROR_CRC)) {
 889                         DEBUG(0,"mmc_init_card_state: unable to ALL_SEND_CID error=%d (%s)\n",
 890                               retval, mmc_result_to_string(retval));
 891                         return MMC_INIT_FAILED;
 892                 }
 893                 mmcinfo.state = CARD_STATE_IDENT;
 894                 if(mmcinfo.sd)
 895                         mmc_simple_cmd(request, MMC_SET_RELATIVE_ADDR, 0, RESPONSE_R6);
 896                 else
 897                         mmc_simple_cmd(request, MMC_SET_RELATIVE_ADDR, ID_TO_RCA(mmcinfo.id) << 16, RESPONSE_R1);
 898                 break;
 899
 900         case MMC_SET_RELATIVE_ADDR:
 901                 if (mmcinfo.sd) {
 902                         retval = mmc_unpack_r6(request, &r1, mmcinfo.state, &mmcinfo.rca);
 903                         mmcinfo.rca = mmcinfo.rca << 16;
 904                         DEBUG(2, "mmc_init_card_state: Get RCA from SD: 0x%04x Status: %x\n", mmcinfo.rca, r1.status);
 905                 } else {
 906                         retval = mmc_unpack_r1(request,&r1,mmcinfo.state);
 907                         mmcinfo.rca = ID_TO_RCA(mmcinfo.id) << 16;
 908                 }
 909                 if (retval) {
 910                         DEBUG(0, "mmc_init_card_state: unable to SET_RELATIVE_ADDR error=%d (%s)\n",
 911                               retval, mmc_result_to_string(retval));
 912                         return MMC_INIT_FAILED;
 913                 }
 914
 915                 mmcinfo.state = CARD_STATE_STBY;
 916                 mmc_simple_cmd(request, MMC_SEND_CSD, mmcinfo.rca, RESPONSE_R2_CSD);
 917
 918                 break;
 919
 920         case MMC_SEND_CSD:
 921                 retval = mmc_unpack_csd(request, &mmcinfo.csd);
 922                         mmc_csd_t *csd = (mmc_csd_t *)retval;
 923                         memcpy(&mmc_csd, csd, sizeof(csd));
 924                         mmc_ready = 1;
 925
 926                         printf("MMC card is ready\n");
 927                         /* FIXME add verbose printout for csd */
 928
 929                 /*FIXME:ignore CRC error for CMD2/CMD9/CMD10 */
 930                 if (retval && (retval != MMC_ERROR_CRC)) {
 931                         DEBUG(0, "mmc_init_card_state: unable to SEND_CSD error=%d (%s)\n",
 932                               retval, mmc_result_to_string(retval));
 933                         return MMC_INIT_FAILED;
 934                 }
 935                 if (mmcinfo.csd.dsr_imp) {
 936                         DEBUG(0, "mmc_init_card_state: driver doesn't support setting DSR\n");
 937                 }
 938                 mmc_configure_card();
 939                 return MMC_INIT_PASSED;
 940
 941         default:
 942                 DEBUG(0, "mmc_init_card_state: error!  Illegal last cmd %d\n", request->cmd);
 943                 return MMC_INIT_FAILED;
 944         }
 945
 946         return MMC_INIT_DOING;
 947 }
 948
 949 int mmc_init_card(void)
 950 {
 951         struct mmc_request request;
 952         int retval;
 953
 954         mmc_simple_cmd(&request, MMC_CIM_RESET, 0, RESPONSE_NONE); /* reset card */
 955         mmc_simple_cmd(&request, MMC_GO_IDLE_STATE, 0, RESPONSE_NONE);
 956         mmcinfo.sd = 1;  /* assuming a SD card */
 957
 958         while ((retval = mmc_init_card_state(&request)) == MMC_INIT_DOING)
 959                 ;
 960
 961         if (retval == MMC_INIT_PASSED)
 962                 return MMC_NO_ERROR;
 963         else
 964                 return MMC_NO_RESPONSE;
 965 }
 966
 967 int mmc_legacy_init(int verbose)
 968 {
 969         if (!__msc_card_detected())
 970                 return 1;
 971
 972         printf("MMC card found\n");
 973
 974         /* Step-1: init GPIO */
 975         __gpio_as_msc();
 976
 977         __msc_init_io();
 978
 979         /* Step-2: turn on power of card */
 980         __msc_enable_power();
 981
 982         /* Step-3: Reset MSC Controller. */
 983         __msc_reset();
 984
 985         /* Step-3: mask all IRQs. */
 986         MMC_IRQ_MASK();
 987
 988         /* Step-4: stop MMC/SD clock */
 989         jz_mmc_stop_clock();
 990         mmc_init_card();
 991         mmc_select_card();
 992
 993         mmc_dev.block_read = mmc_bread;
 994         fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */
 995
 996         return 0;
 997 }
 998
 999 int mmc_ident(block_dev_desc_t *dev)
1000 {
1001         return 0;
1002 }
1003
1004 int mmc2info(ulong addr)
1005 {
1006         /* FIXME hard codes to 32 MB device */
1007         if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000) {
1008         return 1;
1009         }
1010         return 0;
1011 }
1012 /*
1013  * Debugging functions
1014  */
1015
1016 static char * mmc_result_strings[] = {
1017         "NO_RESPONSE",
1018         "NO_ERROR",
1019         "ERROR_OUT_OF_RANGE",
1020         "ERROR_ADDRESS",
1021         "ERROR_BLOCK_LEN",
1022         "ERROR_ERASE_SEQ",
1023         "ERROR_ERASE_PARAM",
1024         "ERROR_WP_VIOLATION",
1025         "ERROR_CARD_IS_LOCKED",
1026         "ERROR_LOCK_UNLOCK_FAILED",
1027         "ERROR_COM_CRC",
1028         "ERROR_ILLEGAL_COMMAND",
1029         "ERROR_CARD_ECC_FAILED",
1030         "ERROR_CC",
1031         "ERROR_GENERAL",
1032         "ERROR_UNDERRUN",
1033         "ERROR_OVERRUN",
1034         "ERROR_CID_CSD_OVERWRITE",
1035         "ERROR_STATE_MISMATCH",
1036         "ERROR_HEADER_MISMATCH",
1037         "ERROR_TIMEOUT",
1038         "ERROR_CRC",
1039         "ERROR_DRIVER_FAILURE",
1040 };
1041
1042 char * mmc_result_to_string(int i)
1043 {
1044         return mmc_result_strings[i+1];
1045 }
1046
1047 static char * card_state_strings[] = {
1048         "empty",
1049         "idle",
1050         "ready",
1051         "ident",
1052         "stby",
1053         "tran",
1054         "data",
1055         "rcv",
1056         "prg",
1057         "dis",
1058 };
1059
1060 static inline char * card_state_to_string(int i)
1061 {
1062         return card_state_strings[i+1];
1063 }
1064
1065 /*
1066  * Utility functions
1067  */
1068
1069 #define PARSE_U32(_buf,_index) \
1070         (((u32)_buf[_index]) << 24) | (((u32)_buf[_index+1]) << 16) | \
1071         (((u32)_buf[_index+2]) << 8) | ((u32)_buf[_index+3]);
1072
1073 #define PARSE_U16(_buf,_index) \
1074         (((u16)_buf[_index]) << 8) | ((u16)_buf[_index+1]);
1075
1076 int mmc_unpack_csd(struct mmc_request *request, struct mmc_csd *csd)
1077 {
1078         u8 *buf = request->response;
1079         int num = 0;
1080
1081         if (request->result)
1082                 return request->result;
1083
1084         csd->csd_structure      = (buf[1] & 0xc0) >> 6;
1085         if (csd->csd_structure)
1086                 sd2_0 = 1;
1087         else
1088                 sd2_0 = 0;
1089
1090         switch (csd->csd_structure) {
1091         case 0 :
1092                 csd->taac               = buf[2];
1093                 csd->nsac               = buf[3];
1094                 csd->tran_speed         = buf[4];
1095                 csd->ccc                = (((u16)buf[5]) << 4) | ((buf[6] & 0xf0) >> 4);
1096                 csd->read_bl_len        = buf[6] & 0x0f;
1097                 /* for support 2GB card*/
1098                 if (csd->read_bl_len >= 10)
1099                 {
1100                         num = csd->read_bl_len - 9;
1101                         csd->read_bl_len = 9;
1102                 }
1103
1104                 csd->read_bl_partial    = (buf[7] & 0x80) ? 1 : 0;
1105                 csd->write_blk_misalign = (buf[7] & 0x40) ? 1 : 0;
1106                 csd->read_blk_misalign  = (buf[7] & 0x20) ? 1 : 0;
1107                 csd->dsr_imp            = (buf[7] & 0x10) ? 1 : 0;
1108                 csd->c_size             = ((((u16)buf[7]) & 0x03) << 10) | (((u16)buf[8]) << 2) | (((u16)buf[9]) & 0xc0) >> 6;
1109
1110                 if (num)
1111                         csd->c_size = csd->c_size << num;
1112
1113
1114                 csd->vdd_r_curr_min     = (buf[9] & 0x38) >> 3;
1115                 csd->vdd_r_curr_max     = buf[9] & 0x07;
1116                 csd->vdd_w_curr_min     = (buf[10] & 0xe0) >> 5;
1117                 csd->vdd_w_curr_max     = (buf[10] & 0x1c) >> 2;
1118                 csd->c_size_mult        = ((buf[10] & 0x03) << 1) | ((buf[11] & 0x80) >> 7);
1119                 switch (csd->csd_structure) {
1120                 case CSD_STRUCT_VER_1_0:
1121                 case CSD_STRUCT_VER_1_1:
1122                         csd->erase.v22.sector_size    = (buf[11] & 0x7c) >> 2;
1123                         csd->erase.v22.erase_grp_size = ((buf[11] & 0x03) << 3) | ((buf[12] & 0xe0) >> 5);
1124
1125                         break;
1126                 case CSD_STRUCT_VER_1_2:
1127                 default:
1128                         csd->erase.v31.erase_grp_size = (buf[11] & 0x7c) >> 2;
1129                         csd->erase.v31.erase_grp_mult = ((buf[11] & 0x03) << 3) | ((buf[12] & 0xe0) >> 5);
1130                         break;
1131                 }
1132                 csd->wp_grp_size        = buf[12] & 0x1f;
1133                 csd->wp_grp_enable      = (buf[13] & 0x80) ? 1 : 0;
1134                 csd->default_ecc        = (buf[13] & 0x60) >> 5;
1135                 csd->r2w_factor         = (buf[13] & 0x1c) >> 2;
1136                 csd->write_bl_len       = ((buf[13] & 0x03) << 2) | ((buf[14] & 0xc0) >> 6);
1137                 if (csd->write_bl_len >= 10)
1138                         csd->write_bl_len = 9;
1139
1140                 csd->write_bl_partial   = (buf[14] & 0x20) ? 1 : 0;
1141                 csd->file_format_grp    = (buf[15] & 0x80) ? 1 : 0;
1142                 csd->copy               = (buf[15] & 0x40) ? 1 : 0;
1143                 csd->perm_write_protect = (buf[15] & 0x20) ? 1 : 0;
1144                 csd->tmp_write_protect  = (buf[15] & 0x10) ? 1 : 0;
1145                 csd->file_format        = (buf[15] & 0x0c) >> 2;
1146                 csd->ecc                = buf[15] & 0x03;
1147
1148                 DEBUG(2,"  csd_structure=%d  spec_vers=%d  taac=%02x  nsac=%02x  tran_speed=%02x\n"
1149                       "  ccc=%04x  read_bl_len=%d  read_bl_partial=%d  write_blk_misalign=%d\n"
1150                       "  read_blk_misalign=%d  dsr_imp=%d  c_size=%d  vdd_r_curr_min=%d\n"
1151                       "  vdd_r_curr_max=%d  vdd_w_curr_min=%d  vdd_w_curr_max=%d  c_size_mult=%d\n"
1152                       "  wp_grp_size=%d  wp_grp_enable=%d  default_ecc=%d  r2w_factor=%d\n"
1153                       "  write_bl_len=%d  write_bl_partial=%d  file_format_grp=%d  copy=%d\n"
1154                       "  perm_write_protect=%d  tmp_write_protect=%d  file_format=%d  ecc=%d\n",
1155                       csd->csd_structure, csd->spec_vers,
1156                       csd->taac, csd->nsac, csd->tran_speed,
1157                       csd->ccc, csd->read_bl_len,
1158                       csd->read_bl_partial, csd->write_blk_misalign,
1159                       csd->read_blk_misalign, csd->dsr_imp,
1160                       csd->c_size, csd->vdd_r_curr_min,
1161                       csd->vdd_r_curr_max, csd->vdd_w_curr_min,
1162                       csd->vdd_w_curr_max, csd->c_size_mult,
1163                       csd->wp_grp_size, csd->wp_grp_enable,
1164                       csd->default_ecc, csd->r2w_factor,
1165                       csd->write_bl_len, csd->write_bl_partial,
1166                       csd->file_format_grp, csd->copy,
1167                       csd->perm_write_protect, csd->tmp_write_protect,
1168                       csd->file_format, csd->ecc);
1169                 switch (csd->csd_structure) {
1170                 case CSD_STRUCT_VER_1_0:
1171                 case CSD_STRUCT_VER_1_1:
1172                         DEBUG(2," V22 sector_size=%d erase_grp_size=%d\n",
1173                               csd->erase.v22.sector_size,
1174                               csd->erase.v22.erase_grp_size);
1175                         break;
1176                 case CSD_STRUCT_VER_1_2:
1177                 default:
1178                         DEBUG(2," V31 erase_grp_size=%d erase_grp_mult=%d\n",
1179                               csd->erase.v31.erase_grp_size,
1180                               csd->erase.v31.erase_grp_mult);
1181                         break;
1182
1183                 }
1184                 break;
1185
1186         case 1 :
1187                 csd->taac               = 0;
1188                 csd->nsac               = 0;
1189                 csd->tran_speed         = buf[4];
1190                 csd->ccc                = (((u16)buf[5]) << 4) | ((buf[6] & 0xf0) >> 4);
1191
1192                 csd->read_bl_len        = 9;
1193                 csd->read_bl_partial    = 0;
1194                 csd->write_blk_misalign = 0;
1195                 csd->read_blk_misalign  = 0;
1196                 csd->dsr_imp            = (buf[7] & 0x10) ? 1 : 0;
1197                 csd->c_size             = ((((u16)buf[8]) & 0x3f) << 16) | (((u16)buf[9]) << 8) | ((u16)buf[10]) ;
1198                 switch (csd->csd_structure) {
1199                 case CSD_STRUCT_VER_1_0:
1200                 case CSD_STRUCT_VER_1_1:
1201                         csd->erase.v22.sector_size    = 0x7f;
1202                         csd->erase.v22.erase_grp_size = 0;
1203                         break;
1204                 case CSD_STRUCT_VER_1_2:
1205                 default:
1206                         csd->erase.v31.erase_grp_size = 0x7f;
1207                         csd->erase.v31.erase_grp_mult = 0;
1208                         break;
1209                 }
1210                 csd->wp_grp_size        = 0;
1211                 csd->wp_grp_enable      = 0;
1212                 csd->default_ecc        = (buf[13] & 0x60) >> 5;
1213                 csd->r2w_factor         = 4;/* Unused */
1214                 csd->write_bl_len       = 9;
1215
1216                 csd->write_bl_partial   = 0;
1217                 csd->file_format_grp    = 0;
1218                 csd->copy               = (buf[15] & 0x40) ? 1 : 0;
1219                 csd->perm_write_protect = (buf[15] & 0x20) ? 1 : 0;
1220                 csd->tmp_write_protect  = (buf[15] & 0x10) ? 1 : 0;
1221                 csd->file_format        = 0;
1222                 csd->ecc                = buf[15] & 0x03;
1223
1224                 DEBUG(2,"  csd_structure=%d  spec_vers=%d  taac=%02x  nsac=%02x  tran_speed=%02x\n"
1225                       "  ccc=%04x  read_bl_len=%d  read_bl_partial=%d  write_blk_misalign=%d\n"
1226                       "  read_blk_misalign=%d  dsr_imp=%d  c_size=%d  vdd_r_curr_min=%d\n"
1227                       "  vdd_r_curr_max=%d  vdd_w_curr_min=%d  vdd_w_curr_max=%d  c_size_mult=%d\n"
1228                       "  wp_grp_size=%d  wp_grp_enable=%d  default_ecc=%d  r2w_factor=%d\n"
1229                       "  write_bl_len=%d  write_bl_partial=%d  file_format_grp=%d  copy=%d\n"
1230                       "  perm_write_protect=%d  tmp_write_protect=%d  file_format=%d  ecc=%d\n",
1231                       csd->csd_structure, csd->spec_vers,
1232                       csd->taac, csd->nsac, csd->tran_speed,
1233                       csd->ccc, csd->read_bl_len,
1234                       csd->read_bl_partial, csd->write_blk_misalign,
1235                       csd->read_blk_misalign, csd->dsr_imp,
1236                       csd->c_size, csd->vdd_r_curr_min,
1237                       csd->vdd_r_curr_max, csd->vdd_w_curr_min,
1238                       csd->vdd_w_curr_max, csd->c_size_mult,
1239                       csd->wp_grp_size, csd->wp_grp_enable,
1240                       csd->default_ecc, csd->r2w_factor,
1241                       csd->write_bl_len, csd->write_bl_partial,
1242                       csd->file_format_grp, csd->copy,
1243                       csd->perm_write_protect, csd->tmp_write_protect,
1244                       csd->file_format, csd->ecc);
1245                 switch (csd->csd_structure) {
1246                 case CSD_STRUCT_VER_1_0:
1247                 case CSD_STRUCT_VER_1_1:
1248                         DEBUG(2," V22 sector_size=%d erase_grp_size=%d\n",
1249                               csd->erase.v22.sector_size,
1250                               csd->erase.v22.erase_grp_size);
1251                         break;
1252                 case CSD_STRUCT_VER_1_2:
1253                 default:
1254                         DEBUG(2," V31 erase_grp_size=%d erase_grp_mult=%d\n",
1255                               csd->erase.v31.erase_grp_size,
1256                               csd->erase.v31.erase_grp_mult);
1257                         break;
1258                 }
1259         }
1260
1261         if (buf[0] != 0x3f)  return MMC_ERROR_HEADER_MISMATCH;
1262
1263         return 0;
1264 }
1265
1266 int mmc_unpack_r1(struct mmc_request *request, struct mmc_response_r1 *r1, enum card_state state)
1267 {
1268         u8 *buf = request->response;
1269
1270         if (request->result)        return request->result;
1271
1272         r1->cmd    = buf[0];
1273         r1->status = PARSE_U32(buf,1);
1274
1275         DEBUG(2, "mmc_unpack_r1: cmd=%d status=%08x\n", r1->cmd, r1->status);
1276
1277         if (R1_STATUS(r1->status)) {
1278                 if (r1->status & R1_OUT_OF_RANGE)       return MMC_ERROR_OUT_OF_RANGE;
1279                 if (r1->status & R1_ADDRESS_ERROR)      return MMC_ERROR_ADDRESS;
1280                 if (r1->status & R1_BLOCK_LEN_ERROR)    return MMC_ERROR_BLOCK_LEN;
1281                 if (r1->status & R1_ERASE_SEQ_ERROR)    return MMC_ERROR_ERASE_SEQ;
1282                 if (r1->status & R1_ERASE_PARAM)        return MMC_ERROR_ERASE_PARAM;
1283                 if (r1->status & R1_WP_VIOLATION)       return MMC_ERROR_WP_VIOLATION;
1284                 /*if (r1->status & R1_CARD_IS_LOCKED)     return MMC_ERROR_CARD_IS_LOCKED; */
1285                 if (r1->status & R1_LOCK_UNLOCK_FAILED) return MMC_ERROR_LOCK_UNLOCK_FAILED;
1286                 if (r1->status & R1_COM_CRC_ERROR)      return MMC_ERROR_COM_CRC;
1287                 if (r1->status & R1_ILLEGAL_COMMAND)    return MMC_ERROR_ILLEGAL_COMMAND;
1288                 if (r1->status & R1_CARD_ECC_FAILED)    return MMC_ERROR_CARD_ECC_FAILED;
1289                 if (r1->status & R1_CC_ERROR)           return MMC_ERROR_CC;
1290                 if (r1->status & R1_ERROR)              return MMC_ERROR_GENERAL;
1291                 if (r1->status & R1_UNDERRUN)           return MMC_ERROR_UNDERRUN;
1292                 if (r1->status & R1_OVERRUN)            return MMC_ERROR_OVERRUN;
1293                 if (r1->status & R1_CID_CSD_OVERWRITE)  return MMC_ERROR_CID_CSD_OVERWRITE;
1294         }
1295
1296         if (buf[0] != request->cmd) return MMC_ERROR_HEADER_MISMATCH;
1297
1298         /* This should be last - it's the least dangerous error */
1299
1300         return 0;
1301 }
1302
1303 int mmc_unpack_scr(struct mmc_request *request, struct mmc_response_r1 *r1, enum card_state state, u32 *scr)
1304 {
1305         u8 *buf = request->response;
1306         if (request->result)        return request->result;
1307
1308         *scr = PARSE_U32(buf, 5); /* Save SCR returned by the SD Card */
1309         return mmc_unpack_r1(request, r1, state);
1310
1311 }
1312
1313 int mmc_unpack_r6(struct mmc_request *request, struct mmc_response_r1 *r1, enum card_state state, int *rca)
1314 {
1315         u8 *buf = request->response;
1316
1317         if (request->result)        return request->result;
1318
1319         *rca = PARSE_U16(buf,1);  /* Save RCA returned by the SD Card */
1320
1321         *(buf+1) = 0;
1322         *(buf+2) = 0;
1323
1324         return mmc_unpack_r1(request, r1, state);
1325 }
1326
1327 int mmc_unpack_cid(struct mmc_request *request, struct mmc_cid *cid)
1328 {
1329         u8 *buf = request->response;
1330         int i;
1331
1332         if (request->result) return request->result;
1333
1334         cid->mid = buf[1];
1335         cid->oid = PARSE_U16(buf,2);
1336         for (i = 0 ; i < 6 ; i++)
1337                 cid->pnm[i] = buf[4+i];
1338         cid->pnm[6] = 0;
1339         cid->prv = buf[10];
1340         cid->psn = PARSE_U32(buf,11);
1341         cid->mdt = buf[15];
1342
1343         DEBUG(2,"mmc_unpack_cid: mid=%d oid=%d pnm=%s prv=%d.%d psn=%08x mdt=%d/%d\n",
1344               cid->mid, cid->oid, cid->pnm,
1345               (cid->prv>>4), (cid->prv&0xf),
1346               cid->psn, (cid->mdt>>4), (cid->mdt&0xf)+1997);
1347
1348         if (buf[0] != 0x3f)  return MMC_ERROR_HEADER_MISMATCH;
1349         return 0;
1350 }
1351
1352 int mmc_unpack_r3(struct mmc_request *request, struct mmc_response_r3 *r3)
1353 {
1354         u8 *buf = request->response;
1355
1356         if (request->result) return request->result;
1357
1358         r3->ocr = PARSE_U32(buf,1);
1359         DEBUG(2,"mmc_unpack_r3: ocr=%08x\n", r3->ocr);
1360
1361         if (buf[0] != 0x3f)  return MMC_ERROR_HEADER_MISMATCH;
1362         return 0;
1363 }
1364
1365 #define KBPS 1
1366 #define MBPS 1000
1367
1368 static u32 ts_exp[] = { 100*KBPS, 1*MBPS, 10*MBPS, 100*MBPS, 0, 0, 0, 0 };
1369 static u32 ts_mul[] = { 0,    1000, 1200, 1300, 1500, 2000, 2500, 3000,
1370                         3500, 4000, 4500, 5000, 5500, 6000, 7000, 8000 };
1371
1372 u32 mmc_tran_speed(u8 ts)
1373 {
1374         u32 rate = ts_exp[(ts & 0x7)] * ts_mul[(ts & 0x78) >> 3];
1375
1376         if (rate <= 0) {
1377                 DEBUG(0, "mmc_tran_speed: error - unrecognized speed 0x%02x\n", ts);
1378                 return 1;
1379         }
1380
1381         return rate;
1382 }
1383
1384 void mmc_send_cmd(struct mmc_request *request, int cmd, u32 arg,
1385                    u16 nob, u16 block_len, enum mmc_rsp_t rtype, u8 *buffer)
1386 {
1387         request->cmd       = cmd;
1388         request->arg       = arg;
1389         request->rtype     = rtype;
1390         request->nob       = nob;
1391         request->block_len = block_len;
1392         request->buffer    = buffer;
1393         request->cnt       = nob * block_len;
1394
1395         jz_mmc_exec_cmd(request);
1396 }
1397
1398 #endif  /* CONFIG_MMC */
1399 #endif  /* CONFIG_JZ4740 */