1 --- a/drivers/net/wireless/ath/ath.h
2 +++ b/drivers/net/wireless/ath/ath.h
3 @@ -102,14 +102,12 @@ enum ath_cipher {
5 * @write: Register write
6 * @enable_write_buffer: Enable multiple register writes
7 - * @disable_write_buffer: Disable multiple register writes
8 - * @write_flush: Flush buffered register writes
9 + * @write_flush: flush buffered register writes and disable buffering
12 unsigned int (*read)(void *, u32 reg_offset);
13 void (*write)(void *, u32 val, u32 reg_offset);
14 void (*enable_write_buffer)(void *);
15 - void (*disable_write_buffer)(void *);
16 void (*write_flush) (void *);
19 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
20 +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
21 @@ -380,15 +380,6 @@ static void ath9k_enable_regwrite_buffer
22 atomic_inc(&priv->wmi->mwrite_cnt);
25 -static void ath9k_disable_regwrite_buffer(void *hw_priv)
27 - struct ath_hw *ah = (struct ath_hw *) hw_priv;
28 - struct ath_common *common = ath9k_hw_common(ah);
29 - struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
31 - atomic_dec(&priv->wmi->mwrite_cnt);
34 static void ath9k_regwrite_flush(void *hw_priv)
36 struct ath_hw *ah = (struct ath_hw *) hw_priv;
37 @@ -397,6 +388,9 @@ static void ath9k_regwrite_flush(void *h
41 + if (!atomic_dec_and_test(&priv->wmi->mwrite_cnt))
44 mutex_lock(&priv->wmi->multi_write_mutex);
46 if (priv->wmi->multi_write_idx) {
47 @@ -420,7 +414,6 @@ static const struct ath_ops ath9k_common
48 .read = ath9k_regread,
49 .write = ath9k_regwrite,
50 .enable_write_buffer = ath9k_enable_regwrite_buffer,
51 - .disable_write_buffer = ath9k_disable_regwrite_buffer,
52 .write_flush = ath9k_regwrite_flush,
55 --- a/drivers/net/wireless/ath/ath9k/hw.h
56 +++ b/drivers/net/wireless/ath/ath9k/hw.h
59 #define ENABLE_REGWRITE_BUFFER(_ah) \
61 - if (AR_SREV_9271(_ah)) \
62 + if (ath9k_hw_common(_ah)->ops->enable_write_buffer) \
63 ath9k_hw_common(_ah)->ops->enable_write_buffer((_ah)); \
66 -#define DISABLE_REGWRITE_BUFFER(_ah) \
68 - if (AR_SREV_9271(_ah)) \
69 - ath9k_hw_common(_ah)->ops->disable_write_buffer((_ah)); \
72 #define REGWRITE_BUFFER_FLUSH(_ah) \
74 - if (AR_SREV_9271(_ah)) \
75 + if (ath9k_hw_common(_ah)->ops->write_flush) \
76 ath9k_hw_common(_ah)->ops->write_flush((_ah)); \
79 --- a/drivers/net/wireless/ath/ath9k/ani.c
80 +++ b/drivers/net/wireless/ath/ath9k/ani.c
81 @@ -180,7 +180,6 @@ static void ath9k_ani_restart_old(struct
82 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
84 REGWRITE_BUFFER_FLUSH(ah);
85 - DISABLE_REGWRITE_BUFFER(ah);
87 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
89 @@ -215,7 +214,6 @@ static void ath9k_ani_restart_new(struct
90 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
92 REGWRITE_BUFFER_FLUSH(ah);
93 - DISABLE_REGWRITE_BUFFER(ah);
95 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
97 @@ -643,7 +641,6 @@ static void ath9k_ani_reset_old(struct a
98 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
100 REGWRITE_BUFFER_FLUSH(ah);
101 - DISABLE_REGWRITE_BUFFER(ah);
105 @@ -737,7 +734,6 @@ static void ath9k_ani_reset_new(struct a
106 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
108 REGWRITE_BUFFER_FLUSH(ah);
109 - DISABLE_REGWRITE_BUFFER(ah);
112 static void ath9k_hw_ani_monitor_old(struct ath_hw *ah,
113 @@ -991,7 +987,6 @@ void ath9k_enable_mib_counters(struct at
114 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
116 REGWRITE_BUFFER_FLUSH(ah);
117 - DISABLE_REGWRITE_BUFFER(ah);
120 /* Freeze the MIB counters, get the stats and then clear them */
121 @@ -1261,7 +1256,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
122 REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase);
124 REGWRITE_BUFFER_FLUSH(ah);
125 - DISABLE_REGWRITE_BUFFER(ah);
127 ath9k_enable_mib_counters(ah);
129 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
130 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
131 @@ -615,14 +615,11 @@ static void ar5008_hw_init_chain_masks(s
132 rx_chainmask = ah->rxchainmask;
133 tx_chainmask = ah->txchainmask;
135 - ENABLE_REGWRITE_BUFFER(ah);
137 switch (rx_chainmask) {
139 - DISABLE_REGWRITE_BUFFER(ah);
140 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
141 AR_PHY_SWAP_ALT_CHAIN);
142 - ENABLE_REGWRITE_BUFFER(ah);
144 if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
145 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
146 @@ -632,17 +629,18 @@ static void ar5008_hw_init_chain_masks(s
150 + ENABLE_REGWRITE_BUFFER(ah);
151 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
152 REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
155 + ENABLE_REGWRITE_BUFFER(ah);
159 REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);
161 REGWRITE_BUFFER_FLUSH(ah);
162 - DISABLE_REGWRITE_BUFFER(ah);
164 if (tx_chainmask == 0x5) {
165 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
166 @@ -728,7 +726,6 @@ static void ar5008_hw_set_channel_regs(s
167 REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
169 REGWRITE_BUFFER_FLUSH(ah);
170 - DISABLE_REGWRITE_BUFFER(ah);
174 @@ -820,7 +817,6 @@ static int ar5008_hw_process_ini(struct
177 REGWRITE_BUFFER_FLUSH(ah);
178 - DISABLE_REGWRITE_BUFFER(ah);
180 if (AR_SREV_9280(ah) || AR_SREV_9287_11_OR_LATER(ah))
181 REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
182 @@ -851,7 +847,6 @@ static int ar5008_hw_process_ini(struct
185 REGWRITE_BUFFER_FLUSH(ah);
186 - DISABLE_REGWRITE_BUFFER(ah);
188 if (AR_SREV_9271(ah)) {
189 if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)
190 --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
191 +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
192 @@ -522,7 +522,6 @@ static void ar9271_hw_pa_cal(struct ath_
193 REG_WRITE(ah, regList[i][0], regList[i][1]);
195 REGWRITE_BUFFER_FLUSH(ah);
196 - DISABLE_REGWRITE_BUFFER(ah);
199 static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset)
200 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
201 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
202 @@ -371,7 +371,6 @@ static void ar9002_hw_configpcipowersave
203 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
205 REGWRITE_BUFFER_FLUSH(ah);
206 - DISABLE_REGWRITE_BUFFER(ah);
210 @@ -468,7 +467,6 @@ static int ar9002_hw_get_radiorev(struct
211 REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
213 REGWRITE_BUFFER_FLUSH(ah);
214 - DISABLE_REGWRITE_BUFFER(ah);
216 val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
217 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
218 @@ -627,6 +625,4 @@ void ar9002_hw_load_ani_reg(struct ath_h
221 REGWRITE_BUFFER_FLUSH(ah);
222 - DISABLE_REGWRITE_BUFFER(ah);
225 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
226 +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
227 @@ -415,7 +415,6 @@ static void ar9002_hw_spur_mitigate(stru
228 REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
230 REGWRITE_BUFFER_FLUSH(ah);
231 - DISABLE_REGWRITE_BUFFER(ah);
234 static void ar9002_olc_init(struct ath_hw *ah)
235 --- a/drivers/net/wireless/ath/ath9k/calib.c
236 +++ b/drivers/net/wireless/ath/ath9k/calib.c
237 @@ -300,7 +300,6 @@ void ath9k_hw_loadnf(struct ath_hw *ah,
240 REGWRITE_BUFFER_FLUSH(ah);
241 - DISABLE_REGWRITE_BUFFER(ah);
245 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
246 +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
247 @@ -500,7 +500,6 @@ static void ath9k_hw_set_4k_power_cal_ta
250 REGWRITE_BUFFER_FLUSH(ah);
251 - DISABLE_REGWRITE_BUFFER(ah);
255 @@ -832,7 +831,6 @@ static void ath9k_hw_4k_set_txpower(stru
258 REGWRITE_BUFFER_FLUSH(ah);
259 - DISABLE_REGWRITE_BUFFER(ah);
262 static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
263 --- a/drivers/net/wireless/ath/ath9k/hw.c
264 +++ b/drivers/net/wireless/ath/ath9k/hw.c
265 @@ -302,7 +302,6 @@ static void ath9k_hw_disablepcie(struct
266 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
268 REGWRITE_BUFFER_FLUSH(ah);
269 - DISABLE_REGWRITE_BUFFER(ah);
272 /* This should work for all families including legacy */
273 @@ -688,7 +687,6 @@ static void ath9k_hw_init_qos(struct ath
274 REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
276 REGWRITE_BUFFER_FLUSH(ah);
277 - DISABLE_REGWRITE_BUFFER(ah);
280 static void ath9k_hw_init_pll(struct ath_hw *ah,
281 @@ -753,7 +751,6 @@ static void ath9k_hw_init_interrupt_mask
284 REGWRITE_BUFFER_FLUSH(ah);
285 - DISABLE_REGWRITE_BUFFER(ah);
287 if (AR_SREV_9300_20_OR_LATER(ah)) {
288 REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0);
289 @@ -897,7 +894,6 @@ static inline void ath9k_hw_set_dma(stru
290 REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B);
292 REGWRITE_BUFFER_FLUSH(ah);
293 - DISABLE_REGWRITE_BUFFER(ah);
296 * Restore TX Trigger Level to its pre-reset value.
297 @@ -945,7 +941,6 @@ static inline void ath9k_hw_set_dma(stru
300 REGWRITE_BUFFER_FLUSH(ah);
301 - DISABLE_REGWRITE_BUFFER(ah);
303 if (AR_SREV_9300_20_OR_LATER(ah))
304 ath9k_hw_reset_txstatus_ring(ah);
305 @@ -1043,7 +1038,6 @@ static bool ath9k_hw_set_reset(struct at
306 REG_WRITE(ah, AR_RTC_RC, rst_flags);
308 REGWRITE_BUFFER_FLUSH(ah);
309 - DISABLE_REGWRITE_BUFFER(ah);
313 @@ -1082,7 +1076,6 @@ static bool ath9k_hw_set_reset_power_on(
316 REGWRITE_BUFFER_FLUSH(ah);
317 - DISABLE_REGWRITE_BUFFER(ah);
319 if (!AR_SREV_9300_20_OR_LATER(ah))
321 @@ -1386,7 +1379,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
322 REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
324 REGWRITE_BUFFER_FLUSH(ah);
325 - DISABLE_REGWRITE_BUFFER(ah);
327 r = ath9k_hw_rf_set_freq(ah, chan);
329 @@ -1398,7 +1390,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
330 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
332 REGWRITE_BUFFER_FLUSH(ah);
333 - DISABLE_REGWRITE_BUFFER(ah);
336 for (i = 0; i < ah->caps.total_queues; i++)
337 @@ -1446,7 +1437,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
338 REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ);
340 REGWRITE_BUFFER_FLUSH(ah);
341 - DISABLE_REGWRITE_BUFFER(ah);
344 * For big endian systems turn on swapping for descriptors
345 @@ -1696,7 +1686,6 @@ void ath9k_hw_beaconinit(struct ath_hw *
346 REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period));
348 REGWRITE_BUFFER_FLUSH(ah);
349 - DISABLE_REGWRITE_BUFFER(ah);
351 beacon_period &= ~ATH9K_BEACON_ENA;
352 if (beacon_period & ATH9K_BEACON_RESET_TSF) {
353 @@ -1724,7 +1713,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
354 TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD));
356 REGWRITE_BUFFER_FLUSH(ah);
357 - DISABLE_REGWRITE_BUFFER(ah);
359 REG_RMW_FIELD(ah, AR_RSSI_THR,
360 AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
361 @@ -1770,7 +1758,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
362 REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
364 REGWRITE_BUFFER_FLUSH(ah);
365 - DISABLE_REGWRITE_BUFFER(ah);
367 REG_SET_BIT(ah, AR_TIMER_MODE,
368 AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
369 @@ -2188,7 +2175,6 @@ void ath9k_hw_setrxfilter(struct ath_hw
370 REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);
372 REGWRITE_BUFFER_FLUSH(ah);
373 - DISABLE_REGWRITE_BUFFER(ah);
375 EXPORT_SYMBOL(ath9k_hw_setrxfilter);
377 --- a/drivers/net/wireless/ath/ath9k/mac.c
378 +++ b/drivers/net/wireless/ath/ath9k/mac.c
379 @@ -40,7 +40,6 @@ static void ath9k_hw_set_txq_interrupts(
380 REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg);
382 REGWRITE_BUFFER_FLUSH(ah);
383 - DISABLE_REGWRITE_BUFFER(ah);
386 u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q)
387 @@ -530,7 +529,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
390 REGWRITE_BUFFER_FLUSH(ah);
391 - DISABLE_REGWRITE_BUFFER(ah);
393 if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) {
394 REG_WRITE(ah, AR_DMISC(q),
395 @@ -553,7 +551,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
396 | AR_D_MISC_POST_FR_BKOFF_DIS);
398 REGWRITE_BUFFER_FLUSH(ah);
399 - DISABLE_REGWRITE_BUFFER(ah);
402 * cwmin and cwmax should be 0 for beacon queue
403 @@ -585,7 +582,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
404 AR_D_MISC_ARB_LOCKOUT_CNTRL_S));
406 REGWRITE_BUFFER_FLUSH(ah);
407 - DISABLE_REGWRITE_BUFFER(ah);
410 case ATH9K_TX_QUEUE_PSPOLL: