3 #include <linux/interrupt.h>
6 #include <linux/ssb/ssb.h>
7 #include <linux/ssb/ssb_driver_chipcommon.h>
8 #include <linux/ssb/ssb_driver_extif.h>
10 extern struct ssb_bus ssb;
12 #define gpio_op(op, param...) \
15 return ssb_chipco_gpio_##op(&ssb.chipco, param); \
16 else if (ssb.extif.dev) \
17 return ssb_extif_gpio_##op(&ssb.extif, param); \
23 static inline u32 gpio_in(void)
28 static inline u32 gpio_out(u32 mask, u32 value)
30 gpio_op(out, mask, value);
33 static inline u32 gpio_outen(u32 mask, u32 value)
35 gpio_op(outen, mask, value);
38 static inline u32 gpio_control(u32 mask, u32 value)
41 return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
46 static inline u32 gpio_intmask(u32 mask, u32 value)
48 gpio_op(intmask, mask, value);
51 static inline u32 gpio_intpolarity(u32 mask, u32 value)
53 gpio_op(polarity, mask, value);
56 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
61 irq = ssb_mips_irq(ssb.chipco.dev) + 2;
62 else if (ssb.extif.dev)
63 irq = ssb_mips_irq(ssb.extif.dev) + 2;
67 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
69 free_irq(irq, handler);
72 ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
83 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
89 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
90 #define sbh bcm947xx_sbh
91 #define sbh_lock bcm947xx_sbh_lock
95 extern spinlock_t sbh_lock;
97 #define gpio_in() sb_gpioin(sbh)
98 #define gpio_out(mask, value) sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
99 #define gpio_outen(mask, value) sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
100 #define gpio_control(mask, value) sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
101 #define gpio_intmask(mask, value) sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
102 #define gpio_intpolarity(mask, value) sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
104 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
106 unsigned int coreidx;
111 spin_lock_irqsave(sbh_lock, flags);
112 coreidx = sb_coreidx(sbh);
114 irq = sb_irq(sbh) + 2;
116 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
118 free_irq(irq, handler);
120 if ((cc = sb_setcore(sbh, SB_CC, 0))) {
123 intmask = readl(&cc->intmask);
128 writel(intmask, &cc->intmask);
130 sb_setcoreidx(sbh, coreidx);
131 spin_unlock_irqrestore(sbh_lock, flags);
134 #endif /* BCMDRIVER */
136 #define EXTIF_ADDR 0x1f000000
137 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
139 #define GPIO_TYPE_NORMAL (0x0 << 24)
140 #define GPIO_TYPE_EXTIF (0x1 << 24)
141 #define GPIO_TYPE_MASK (0xf << 24)
143 static inline void gpio_set_extif(int gpio, int value)
145 volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
152 #endif /* __DIAG_GPIO_H */