openwrt/target/linux/au1000-2.6/patches/003-zImage.patch

   1 diff -urN linux-2.6.16.7/arch/mips/Makefile linux-2.6.16.7.new/arch/mips/Makefile
   2 --- linux-2.6.16.7/arch/mips/Makefile   2006-04-17 23:53:25.000000000 +0200
   3 +++ linux-2.6.16.7.new/arch/mips/Makefile       2006-04-20 19:27:22.000000000 +0200
   4 @@ -840,6 +840,12 @@
   5  vmlinux.srec: $(vmlinux-32)
   6         +@$(call makeboot,$@)
   7
   8 +zImage: vmlinux
   9 +       +@$(call makeboot,$@)
  10 +
  11 +zImage.flash: vmlinux
  12 +       +@$(call makeboot,$@)
  13 +
  14  CLEAN_FILES += vmlinux.ecoff \
  15                vmlinux.srec \
  16                vmlinux.rm200.tmp \
  17 @@ -848,6 +854,7 @@
  18  archclean:
  19         @$(MAKE) $(clean)=arch/mips/boot
  20         @$(MAKE) $(clean)=arch/mips/lasat
  21 +       @$(MAKE) $(clean)=arch/mips/boot/compressed
  22
  23  CLEAN_FILES += vmlinux.32 \
  24                vmlinux.64 \
  25 diff -urN linux-2.6.16.7/arch/mips/Makefile.orig linux-2.6.16.7.new/arch/mips/Makefile.orig
  26 --- linux-2.6.16.7/arch/mips/Makefile.orig      1970-01-01 01:00:00.000000000 +0100
  27 +++ linux-2.6.16.7.new/arch/mips/Makefile.orig  2006-04-20 19:27:12.000000000 +0200
  28 @@ -0,0 +1,858 @@
  29 +#
  30 +# This file is subject to the terms and conditions of the GNU General Public
  31 +# License.  See the file "COPYING" in the main directory of this archive
  32 +# for more details.
  33 +#
  34 +# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
  35 +# DECStation modifications by Paul M. Antoine, 1996
  36 +# Copyright (C) 2002, 2003, 2004  Maciej W. Rozycki
  37 +#
  38 +# This file is included by the global makefile so that you can add your own
  39 +# architecture-specific flags and dependencies. Remember to do have actions
  40 +# for "archclean" cleaning up for this architecture.
  41 +#
  42 +
  43 +as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
  44 +            -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
  45 +            else echo "$(2)"; fi ;)
  46 +
  47 +cflags-y :=
  48 +
  49 +#
  50 +# Select the object file format to substitute into the linker script.
  51 +#
  52 +ifdef CONFIG_CPU_LITTLE_ENDIAN
  53 +32bit-tool-prefix      = mipsel-linux-
  54 +64bit-tool-prefix      = mips64el-linux-
  55 +32bit-bfd              = elf32-tradlittlemips
  56 +64bit-bfd              = elf64-tradlittlemips
  57 +32bit-emul             = elf32ltsmip
  58 +64bit-emul             = elf64ltsmip
  59 +else
  60 +32bit-tool-prefix      = mips-linux-
  61 +64bit-tool-prefix      = mips64-linux-
  62 +32bit-bfd              = elf32-tradbigmips
  63 +64bit-bfd              = elf64-tradbigmips
  64 +32bit-emul             = elf32btsmip
  65 +64bit-emul             = elf64btsmip
  66 +endif
  67 +
  68 +ifdef CONFIG_32BIT
  69 +gcc-abi                        = 32
  70 +tool-prefix            = $(32bit-tool-prefix)
  71 +UTS_MACHINE            := mips
  72 +endif
  73 +ifdef CONFIG_64BIT
  74 +gcc-abi                        = 64
  75 +tool-prefix            = $(64bit-tool-prefix)
  76 +UTS_MACHINE            := mips64
  77 +endif
  78 +
  79 +ifdef CONFIG_CROSSCOMPILE
  80 +CROSS_COMPILE          := $(tool-prefix)
  81 +endif
  82 +
  83 +CHECKFLAGS-y                           += -D__linux__ -D__mips__ \
  84 +                                          -D_MIPS_SZINT=32 \
  85 +                                          -D_ABIO32=1 \
  86 +                                          -D_ABIN32=2 \
  87 +                                          -D_ABI64=3
  88 +CHECKFLAGS-$(CONFIG_32BIT)             += -D_MIPS_SIM=_ABIO32 \
  89 +                                          -D_MIPS_SZLONG=32 \
  90 +                                          -D_MIPS_SZPTR=32 \
  91 +                                          -D__PTRDIFF_TYPE__=int
  92 +CHECKFLAGS-$(CONFIG_64BIT)             += -m64 -D_MIPS_SIM=_ABI64 \
  93 +                                          -D_MIPS_SZLONG=64 \
  94 +                                          -D_MIPS_SZPTR=64 \
  95 +                                          -D__PTRDIFF_TYPE__="long int"
  96 +CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN)    += -D__MIPSEB__
  97 +CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
  98 +
  99 +CHECKFLAGS                             = $(CHECKFLAGS-y)
 100 +
 101 +ifdef CONFIG_BUILD_ELF64
 102 +gas-abi                        = 64
 103 +ld-emul                        = $(64bit-emul)
 104 +vmlinux-32             = vmlinux.32
 105 +vmlinux-64             = vmlinux
 106 +else
 107 +gas-abi                        = 32
 108 +ld-emul                        = $(32bit-emul)
 109 +vmlinux-32             = vmlinux
 110 +vmlinux-64             = vmlinux.64
 111 +
 112 +cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
 113 +endif
 114 +
 115 +#
 116 +# GCC uses -G 0 -mabicalls -fpic as default.  We don't want PIC in the kernel
 117 +# code since it only slows down the whole thing.  At some point we might make
 118 +# use of global pointer optimizations but their use of $28 conflicts with
 119 +# the current pointer optimization.
 120 +#
 121 +# The DECStation requires an ECOFF kernel for remote booting, other MIPS
 122 +# machines may also.  Since BFD is incredibly buggy with respect to
 123 +# crossformat linking we rely on the elf2ecoff tool for format conversion.
 124 +#
 125 +cflags-y                       += -G 0 -mno-abicalls -fno-pic -pipe
 126 +cflags-y                       += -msoft-float
 127 +LDFLAGS_vmlinux                        += -G 0 -static -n -nostdlib
 128 +MODFLAGS                       += -mlong-calls
 129 +
 130 +#
 131 +# We explicitly add the endianness specifier if needed, this allows
 132 +# to compile kernels with a toolchain for the other endianness. We
 133 +# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
 134 +# when fed the toolchain default!
 135 +#
 136 +cflags-$(CONFIG_CPU_BIG_ENDIAN)                += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
 137 +cflags-$(CONFIG_CPU_LITTLE_ENDIAN)     += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
 138 +
 139 +cflags-$(CONFIG_SB1XXX_CORELIS)        += $(call cc-option,-mno-sched-prolog) \
 140 +                                  -fno-omit-frame-pointer
 141 +
 142 +#
 143 +# Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
 144 +#
 145 +# <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
 146 +#                  recent tools)
 147 +# <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
 148 +#                  with up to the oldest supported tools)
 149 +# <isa2>        -- an ISA designation used as an ABI selector for
 150 +#                  gcc versions that do not support "-mabi=32"
 151 +#                  (depending on the CPU type, either "mips1" or
 152 +#                  "mips2")
 153 +#
 154 +set_gccflags = $(shell \
 155 +while :; do \
 156 +       cpu=$(1); isa=-$(2); \
 157 +       for gcc_opt in -march= -mcpu=; do \
 158 +               $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
 159 +                       -xc /dev/null > /dev/null 2>&1 && \
 160 +                       break 2; \
 161 +       done; \
 162 +       cpu=$(3); isa=-$(4); \
 163 +       for gcc_opt in -march= -mcpu=; do \
 164 +               $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
 165 +                       -xc /dev/null > /dev/null 2>&1 && \
 166 +                       break 2; \
 167 +       done; \
 168 +       break; \
 169 +done; \
 170 +gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
 171 +if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
 172 +       gcc_isa=$$isa; \
 173 +else \
 174 +       gcc_abi=; gcc_isa=-$(5); \
 175 +fi; \
 176 +gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
 177 +while :; do \
 178 +       for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
 179 +               $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
 180 +                       -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
 181 +                       break 2; \
 182 +       done; \
 183 +       gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
 184 +       break; \
 185 +done; \
 186 +if test "$(gcc-abi)" != "$(gas-abi)"; then \
 187 +       gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
 188 +fi; \
 189 +if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
 190 +       $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
 191 +               -xc /dev/null > /dev/null 2>&1 && \
 192 +               gcc_isa=; \
 193 +fi; \
 194 +echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
 195 +
 196 +#
 197 +# CPU-dependent compiler/assembler options for optimization.
 198 +#
 199 +cflags-$(CONFIG_CPU_R3000)     += \
 200 +                       $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
 201 +CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
 202 +
 203 +cflags-$(CONFIG_CPU_TX39XX)    += \
 204 +                       $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
 205 +CHECKFLAGS-$(CONFIG_CPU_TX39XX)        += -D_MIPS_ISA=_MIPS_ISA_MIPS1
 206 +
 207 +cflags-$(CONFIG_CPU_R6000)     += \
 208 +                       $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
 209 +                       -Wa,--trap
 210 +CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
 211 +
 212 +cflags-$(CONFIG_CPU_R4300)     += \
 213 +                       $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
 214 +                       -Wa,--trap
 215 +CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
 216 +
 217 +cflags-$(CONFIG_CPU_VR41XX)    += \
 218 +                       $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
 219 +                       -Wa,--trap
 220 +CHECKFLAGS-$(CONFIG_CPU_VR41XX)        += -D_MIPS_ISA=_MIPS_ISA_MIPS3
 221 +
 222 +cflags-$(CONFIG_CPU_R4X00)     += \
 223 +                       $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
 224 +                       -Wa,--trap
 225 +CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
 226 +
 227 +cflags-$(CONFIG_CPU_TX49XX)    += \
 228 +                       $(call set_gccflags,r4600,mips3,r4600,mips3,mips2)  \
 229 +                       -Wa,--trap
 230 +CHECKFLAGS-$(CONFIG_CPU_TX49XX)        += -D_MIPS_ISA=_MIPS_ISA_MIPS3
 231 +
 232 +cflags-$(CONFIG_CPU_MIPS32_R1) += \
 233 +                       $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
 234 +                       -Wa,--trap
 235 +CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1)     += -D_MIPS_ISA=_MIPS_ISA_MIPS32
 236 +
 237 +cflags-$(CONFIG_CPU_MIPS32_R2) += \
 238 +                       $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
 239 +                       -Wa,--trap
 240 +CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2)     += -D_MIPS_ISA=_MIPS_ISA_MIPS32
 241 +
 242 +cflags-$(CONFIG_CPU_MIPS64_R1) += \
 243 +                       $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
 244 +                       -Wa,--trap
 245 +CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1)     += -D_MIPS_ISA=_MIPS_ISA_MIPS64
 246 +
 247 +cflags-$(CONFIG_CPU_MIPS64_R2) += \
 248 +                       $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
 249 +                       -Wa,--trap
 250 +CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2)     += -D_MIPS_ISA=_MIPS_ISA_MIPS64
 251 +
 252 +cflags-$(CONFIG_CPU_R5000)     += \
 253 +                       $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
 254 +                       -Wa,--trap
 255 +CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 256 +
 257 +cflags-$(CONFIG_CPU_R5432)     += \
 258 +                       $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
 259 +                       -Wa,--trap
 260 +CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 261 +
 262 +cflags-$(CONFIG_CPU_NEVADA)    += \
 263 +                       $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
 264 +                       -Wa,--trap
 265 +CHECKFLAGS-$(CONFIG_CPU_NEVADA)        += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 266 +
 267 +cflags-$(CONFIG_CPU_RM7000)    += \
 268 +                       $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
 269 +                       -Wa,--trap
 270 +CHECKFLAGS-$(CONFIG_CPU_RM7000)        += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 271 +
 272 +cflags-$(CONFIG_CPU_RM9000)    += \
 273 +                       $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
 274 +                       -Wa,--trap
 275 +CHECKFLAGS-$(CONFIG_CPU_RM9000)        += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 276 +
 277 +
 278 +cflags-$(CONFIG_CPU_SB1)       += \
 279 +                       $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
 280 +                       -Wa,--trap
 281 +CHECKFLAGS-$(CONFIG_CPU_SB1)   += -D_MIPS_ISA=_MIPS_ISA_MIPS64
 282 +
 283 +cflags-$(CONFIG_CPU_R8000)     += \
 284 +                       $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
 285 +                       -Wa,--trap
 286 +CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 287 +
 288 +cflags-$(CONFIG_CPU_R10000)    += \
 289 +                       $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
 290 +                       -Wa,--trap
 291 +CHECKFLAGS-$(CONFIG_CPU_R10000)        += -D_MIPS_ISA=_MIPS_ISA_MIPS4
 292 +
 293 +ifdef CONFIG_CPU_SB1
 294 +ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
 295 +MODFLAGS       += -msb1-pass1-workarounds
 296 +endif
 297 +endif
 298 +
 299 +#
 300 +# Firmware support
 301 +#
 302 +libs-$(CONFIG_ARC)             += arch/mips/arc/
 303 +libs-$(CONFIG_SIBYTE_CFE)      += arch/mips/sibyte/cfe/
 304 +
 305 +#
 306 +# Board-dependent options and extra files
 307 +#
 308 +
 309 +#
 310 +# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
 311 +#
 312 +core-$(CONFIG_MACH_JAZZ)       += arch/mips/jazz/
 313 +cflags-$(CONFIG_MACH_JAZZ)     += -Iinclude/asm-mips/mach-jazz
 314 +load-$(CONFIG_MACH_JAZZ)       += 0xffffffff80080000
 315 +
 316 +#
 317 +# Common Alchemy Au1x00 stuff
 318 +#
 319 +core-$(CONFIG_SOC_AU1X00)      += arch/mips/au1000/common/
 320 +cflags-$(CONFIG_SOC_AU1X00)    += -Iinclude/asm-mips/mach-au1x00
 321 +
 322 +#
 323 +# AMD Alchemy Pb1000 eval board
 324 +#
 325 +libs-$(CONFIG_MIPS_PB1000)     += arch/mips/au1000/pb1000/
 326 +cflags-$(CONFIG_MIPS_PB1000)   += -Iinclude/asm-mips/mach-pb1x00
 327 +load-$(CONFIG_MIPS_PB1000)     += 0xffffffff80100000
 328 +
 329 +#
 330 +# AMD Alchemy Pb1100 eval board
 331 +#
 332 +libs-$(CONFIG_MIPS_PB1100)     += arch/mips/au1000/pb1100/
 333 +cflags-$(CONFIG_MIPS_PB1100)   += -Iinclude/asm-mips/mach-pb1x00
 334 +load-$(CONFIG_MIPS_PB1100)     += 0xffffffff80100000
 335 +
 336 +#
 337 +# AMD Alchemy Pb1500 eval board
 338 +#
 339 +libs-$(CONFIG_MIPS_PB1500)     += arch/mips/au1000/pb1500/
 340 +cflags-$(CONFIG_MIPS_PB1500)   += -Iinclude/asm-mips/mach-pb1x00
 341 +load-$(CONFIG_MIPS_PB1500)     += 0xffffffff80100000
 342 +
 343 +#
 344 +# AMD Alchemy Pb1550 eval board
 345 +#
 346 +libs-$(CONFIG_MIPS_PB1550)     += arch/mips/au1000/pb1550/
 347 +cflags-$(CONFIG_MIPS_PB1550)   += -Iinclude/asm-mips/mach-pb1x00
 348 +load-$(CONFIG_MIPS_PB1550)     += 0xffffffff80100000
 349 +
 350 +#
 351 +# AMD Alchemy Pb1200 eval board
 352 +#
 353 +libs-$(CONFIG_MIPS_PB1200)     += arch/mips/au1000/pb1200/
 354 +cflags-$(CONFIG_MIPS_PB1200)   += -Iinclude/asm-mips/mach-pb1x00
 355 +load-$(CONFIG_MIPS_PB1200)     += 0xffffffff80100000
 356 +
 357 +#
 358 +# AMD Alchemy Db1000 eval board
 359 +#
 360 +libs-$(CONFIG_MIPS_DB1000)     += arch/mips/au1000/db1x00/
 361 +cflags-$(CONFIG_MIPS_DB1000)   += -Iinclude/asm-mips/mach-db1x00
 362 +load-$(CONFIG_MIPS_DB1000)     += 0xffffffff80100000
 363 +
 364 +#
 365 +# AMD Alchemy Db1100 eval board
 366 +#
 367 +libs-$(CONFIG_MIPS_DB1100)     += arch/mips/au1000/db1x00/
 368 +cflags-$(CONFIG_MIPS_DB1100)   += -Iinclude/asm-mips/mach-db1x00
 369 +load-$(CONFIG_MIPS_DB1100)     += 0xffffffff80100000
 370 +
 371 +#
 372 +# AMD Alchemy Db1500 eval board
 373 +#
 374 +libs-$(CONFIG_MIPS_DB1500)     += arch/mips/au1000/db1x00/
 375 +cflags-$(CONFIG_MIPS_DB1500)   += -Iinclude/asm-mips/mach-db1x00
 376 +load-$(CONFIG_MIPS_DB1500)     += 0xffffffff80100000
 377 +
 378 +#
 379 +# AMD Alchemy Db1550 eval board
 380 +#
 381 +libs-$(CONFIG_MIPS_DB1550)     += arch/mips/au1000/db1x00/
 382 +cflags-$(CONFIG_MIPS_DB1550)   += -Iinclude/asm-mips/mach-db1x00
 383 +load-$(CONFIG_MIPS_DB1550)     += 0xffffffff80100000
 384 +
 385 +#
 386 +# AMD Alchemy Db1200 eval board
 387 +#
 388 +libs-$(CONFIG_MIPS_DB1200)     += arch/mips/au1000/pb1200/
 389 +cflags-$(CONFIG_MIPS_DB1200)   += -Iinclude/asm-mips/mach-db1x00
 390 +load-$(CONFIG_MIPS_DB1200)     += 0xffffffff80100000
 391 +
 392 +#
 393 +# AMD Alchemy Bosporus eval board
 394 +#
 395 +libs-$(CONFIG_MIPS_BOSPORUS)   += arch/mips/au1000/db1x00/
 396 +cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
 397 +load-$(CONFIG_MIPS_BOSPORUS)   += 0xffffffff80100000
 398 +
 399 +#
 400 +# AMD Alchemy Mirage eval board
 401 +#
 402 +libs-$(CONFIG_MIPS_MIRAGE)     += arch/mips/au1000/db1x00/
 403 +cflags-$(CONFIG_MIPS_MIRAGE)   += -Iinclude/asm-mips/mach-db1x00
 404 +load-$(CONFIG_MIPS_MIRAGE)     += 0xffffffff80100000
 405 +
 406 +#
 407 +# 4G-Systems eval board
 408 +#
 409 +libs-$(CONFIG_MIPS_MTX1)       += arch/mips/au1000/mtx-1/
 410 +load-$(CONFIG_MIPS_MTX1)       += 0xffffffff80100000
 411 +
 412 +#
 413 +# MyCable eval board
 414 +#
 415 +libs-$(CONFIG_MIPS_XXS1500)    += arch/mips/au1000/xxs1500/
 416 +load-$(CONFIG_MIPS_XXS1500)    += 0xffffffff80100000
 417 +
 418 +#
 419 +# Cobalt Server
 420 +#
 421 +core-$(CONFIG_MIPS_COBALT)     += arch/mips/cobalt/
 422 +cflags-$(CONFIG_MIPS_COBALT)   += -Iinclude/asm-mips/mach-cobalt
 423 +load-$(CONFIG_MIPS_COBALT)     += 0xffffffff80080000
 424 +
 425 +#
 426 +# DECstation family
 427 +#
 428 +core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
 429 +cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
 430 +libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
 431 +load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
 432 +CLEAN_FILES                    += drivers/tc/lk201-map.c
 433 +
 434 +#
 435 +# Galileo EV64120 Board
 436 +#
 437 +core-$(CONFIG_MIPS_EV64120)    += arch/mips/gt64120/ev64120/
 438 +core-$(CONFIG_MIPS_EV64120)    += arch/mips/gt64120/common/
 439 +cflags-$(CONFIG_MIPS_EV64120)  += -Iinclude/asm-mips/mach-ev64120
 440 +load-$(CONFIG_MIPS_EV64120)    += 0xffffffff80100000
 441 +
 442 +#
 443 +# Galileo EV96100 Board
 444 +#
 445 +core-$(CONFIG_MIPS_EV96100)    += arch/mips/galileo-boards/ev96100/
 446 +cflags-$(CONFIG_MIPS_EV96100)  += -Iinclude/asm-mips/mach-ev96100
 447 +load-$(CONFIG_MIPS_EV96100)    += 0xffffffff80100000
 448 +
 449 +#
 450 +# Globespan IVR eval board with QED 5231 CPU
 451 +#
 452 +core-$(CONFIG_ITE_BOARD_GEN)   += arch/mips/ite-boards/generic/
 453 +core-$(CONFIG_MIPS_IVR)                += arch/mips/ite-boards/ivr/
 454 +load-$(CONFIG_MIPS_IVR)                += 0xffffffff80100000
 455 +
 456 +#
 457 +# ITE 8172 eval board with QED 5231 CPU
 458 +#
 459 +core-$(CONFIG_MIPS_ITE8172)    += arch/mips/ite-boards/qed-4n-s01b/
 460 +load-$(CONFIG_MIPS_ITE8172)    += 0xffffffff80100000
 461 +
 462 +#
 463 +# For all MIPS, Inc. eval boards
 464 +#
 465 +core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
 466 +
 467 +#
 468 +# MIPS Atlas board
 469 +#
 470 +core-$(CONFIG_MIPS_ATLAS)      += arch/mips/mips-boards/atlas/
 471 +cflags-$(CONFIG_MIPS_ATLAS)    += -Iinclude/asm-mips/mach-atlas
 472 +cflags-$(CONFIG_MIPS_ATLAS)    += -Iinclude/asm-mips/mach-mips
 473 +load-$(CONFIG_MIPS_ATLAS)      += 0xffffffff80100000
 474 +
 475 +#
 476 +# MIPS Malta board
 477 +#
 478 +core-$(CONFIG_MIPS_MALTA)      += arch/mips/mips-boards/malta/
 479 +cflags-$(CONFIG_MIPS_MALTA)    += -Iinclude/asm-mips/mach-mips
 480 +load-$(CONFIG_MIPS_MALTA)      += 0xffffffff80100000
 481 +
 482 +#
 483 +# MIPS SEAD board
 484 +#
 485 +core-$(CONFIG_MIPS_SEAD)       += arch/mips/mips-boards/sead/
 486 +load-$(CONFIG_MIPS_SEAD)       += 0xffffffff80100000
 487 +
 488 +#
 489 +# MIPS SIM
 490 +#
 491 +core-$(CONFIG_MIPS_SIM)                += arch/mips/mips-boards/sim/
 492 +cflags-$(CONFIG_MIPS_SIM)      += -Iinclude/asm-mips/mach-sim
 493 +load-$(CONFIG_MIPS_SIM)                += 0x80100000
 494 +
 495 +#
 496 +# Momentum Ocelot board
 497 +#
 498 +# The Ocelot setup.o must be linked early - it does the ioremap() for the
 499 +# mips_io_port_base.
 500 +#
 501 +core-$(CONFIG_MOMENCO_OCELOT)  += arch/mips/gt64120/common/ \
 502 +                                  arch/mips/gt64120/momenco_ocelot/
 503 +cflags-$(CONFIG_MOMENCO_OCELOT)        += -Iinclude/asm-mips/mach-ocelot
 504 +load-$(CONFIG_MOMENCO_OCELOT)  += 0xffffffff80100000
 505 +
 506 +#
 507 +# Momentum Ocelot-G board
 508 +#
 509 +# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
 510 +# mips_io_port_base.
 511 +#
 512 +core-$(CONFIG_MOMENCO_OCELOT_G)        += arch/mips/momentum/ocelot_g/
 513 +load-$(CONFIG_MOMENCO_OCELOT_G)        += 0xffffffff80100000
 514 +
 515 +#
 516 +# Momentum Ocelot-C and -CS boards
 517 +#
 518 +# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
 519 +# mips_io_port_base.
 520 +core-$(CONFIG_MOMENCO_OCELOT_C)        += arch/mips/momentum/ocelot_c/
 521 +load-$(CONFIG_MOMENCO_OCELOT_C)        += 0xffffffff80100000
 522 +
 523 +#
 524 +# PMC-Sierra Yosemite
 525 +#
 526 +core-$(CONFIG_PMC_YOSEMITE)    += arch/mips/pmc-sierra/yosemite/
 527 +cflags-$(CONFIG_PMC_YOSEMITE)  += -Iinclude/asm-mips/mach-yosemite
 528 +load-$(CONFIG_PMC_YOSEMITE)    += 0xffffffff80100000
 529 +
 530 +# Qemu simulating MIPS32 4Kc
 531 +#
 532 +core-$(CONFIG_QEMU)            += arch/mips/qemu/
 533 +cflags-$(CONFIG_QEMU)          += -Iinclude/asm-mips/mach-qemu
 534 +load-$(CONFIG_QEMU)            += 0xffffffff80010000
 535 +
 536 +#
 537 +# Momentum Ocelot-3
 538 +#
 539 +core-$(CONFIG_MOMENCO_OCELOT_3)        += arch/mips/momentum/ocelot_3/
 540 +cflags-$(CONFIG_MOMENCO_OCELOT_3)      += -Iinclude/asm-mips/mach-ocelot3
 541 +load-$(CONFIG_MOMENCO_OCELOT_3)        += 0xffffffff80100000
 542 +
 543 +#
 544 +# Momentum Jaguar ATX
 545 +#
 546 +core-$(CONFIG_MOMENCO_JAGUAR_ATX)      += arch/mips/momentum/jaguar_atx/
 547 +cflags-$(CONFIG_MOMENCO_JAGUAR_ATX)    += -Iinclude/asm-mips/mach-ja
 548 +#ifdef CONFIG_JAGUAR_DMALOW
 549 +#load-$(CONFIG_MOMENCO_JAGUAR_ATX)     += 0xffffffff88000000
 550 +#else
 551 +load-$(CONFIG_MOMENCO_JAGUAR_ATX)      += 0xffffffff80100000
 552 +#endif
 553 +
 554 +#
 555 +# NEC DDB
 556 +#
 557 +core-$(CONFIG_DDB5XXX_COMMON)  += arch/mips/ddb5xxx/common/
 558 +
 559 +#
 560 +# NEC DDB Vrc-5074
 561 +#
 562 +core-$(CONFIG_DDB5074)         += arch/mips/ddb5xxx/ddb5074/
 563 +load-$(CONFIG_DDB5074)         += 0xffffffff80080000
 564 +
 565 +#
 566 +# NEC DDB Vrc-5476
 567 +#
 568 +core-$(CONFIG_DDB5476)         += arch/mips/ddb5xxx/ddb5476/
 569 +load-$(CONFIG_DDB5476)         += 0xffffffff80080000
 570 +
 571 +#
 572 +# NEC DDB Vrc-5477
 573 +#
 574 +core-$(CONFIG_DDB5477)         += arch/mips/ddb5xxx/ddb5477/
 575 +load-$(CONFIG_DDB5477)         += 0xffffffff80100000
 576 +
 577 +core-$(CONFIG_LASAT)           += arch/mips/lasat/
 578 +cflags-$(CONFIG_LASAT)         += -Iinclude/asm-mips/mach-lasat
 579 +load-$(CONFIG_LASAT)           += 0xffffffff80000000
 580 +
 581 +#
 582 +# Common VR41xx
 583 +#
 584 +core-$(CONFIG_MACH_VR41XX)     += arch/mips/vr41xx/common/
 585 +cflags-$(CONFIG_MACH_VR41XX)   += -Iinclude/asm-mips/mach-vr41xx
 586 +
 587 +#
 588 +# NEC VR4133
 589 +#
 590 +core-$(CONFIG_NEC_CMBVR4133)   += arch/mips/vr41xx/nec-cmbvr4133/
 591 +load-$(CONFIG_NEC_CMBVR4133)   += 0xffffffff80100000
 592 +
 593 +#
 594 +# ZAO Networks Capcella (VR4131)
 595 +#
 596 +load-$(CONFIG_ZAO_CAPCELLA)    += 0xffffffff80000000
 597 +
 598 +#
 599 +# Victor MP-C303/304 (VR4122)
 600 +#
 601 +load-$(CONFIG_VICTOR_MPC30X)   += 0xffffffff80001000
 602 +
 603 +#
 604 +# IBM WorkPad z50 (VR4121)
 605 +#
 606 +core-$(CONFIG_IBM_WORKPAD)     += arch/mips/vr41xx/ibm-workpad/
 607 +load-$(CONFIG_IBM_WORKPAD)     += 0xffffffff80004000
 608 +
 609 +#
 610 +# CASIO CASSIPEIA E-55/65 (VR4111)
 611 +#
 612 +core-$(CONFIG_CASIO_E55)       += arch/mips/vr41xx/casio-e55/
 613 +load-$(CONFIG_CASIO_E55)       += 0xffffffff80004000
 614 +
 615 +#
 616 +# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
 617 +#
 618 +load-$(CONFIG_TANBAC_TB022X)   += 0xffffffff80000000
 619 +
 620 +#
 621 +# Common Philips PNX8550
 622 +#
 623 +core-$(CONFIG_SOC_PNX8550)     += arch/mips/philips/pnx8550/common/
 624 +cflags-$(CONFIG_SOC_PNX8550)   += -Iinclude/asm-mips/mach-pnx8550
 625 +
 626 +#
 627 +# Philips PNX8550 JBS board
 628 +#
 629 +libs-$(CONFIG_PNX8550_JBS)     += arch/mips/philips/pnx8550/jbs/
 630 +#cflags-$(CONFIG_PNX8550_JBS)  += -Iinclude/asm-mips/mach-pnx8550
 631 +load-$(CONFIG_PNX8550_JBS)     += 0xffffffff80060000
 632 +
 633 +#
 634 +# SGI IP22 (Indy/Indigo2)
 635 +#
 636 +# Set the load address to >= 0xffffffff88069000 if you want to leave space for
 637 +# symmon, 0xffffffff80002000 for production kernels.  Note that the value must
 638 +# be aligned to a multiple of the kernel stack size or the handling of the
 639 +# current variable will break so for 64-bit kernels we have to raise the start
 640 +# address by 8kb.
 641 +#
 642 +core-$(CONFIG_SGI_IP22)                += arch/mips/sgi-ip22/
 643 +cflags-$(CONFIG_SGI_IP22)      += -Iinclude/asm-mips/mach-ip22
 644 +ifdef CONFIG_32BIT
 645 +load-$(CONFIG_SGI_IP22)                += 0xffffffff88002000
 646 +endif
 647 +ifdef CONFIG_64BIT
 648 +load-$(CONFIG_SGI_IP22)                += 0xffffffff88004000
 649 +endif
 650 +
 651 +#
 652 +# SGI-IP27 (Origin200/2000)
 653 +#
 654 +# Set the load address to >= 0xc000000000300000 if you want to leave space for
 655 +# symmon, 0xc00000000001c000 for production kernels.  Note that the value must
 656 +# be 16kb aligned or the handling of the current variable will break.
 657 +#
 658 +ifdef CONFIG_SGI_IP27
 659 +core-$(CONFIG_SGI_IP27)                += arch/mips/sgi-ip27/
 660 +cflags-$(CONFIG_SGI_IP27)      += -Iinclude/asm-mips/mach-ip27
 661 +ifdef CONFIG_BUILD_ELF64
 662 +ifdef CONFIG_MAPPED_KERNEL
 663 +load-$(CONFIG_SGI_IP27)                += 0xc00000004001c000
 664 +OBJCOPYFLAGS                   := --change-addresses=0x3fffffff80000000
 665 +dataoffset-$(CONFIG_SGI_IP27)  += 0x01000000
 666 +else
 667 +load-$(CONFIG_SGI_IP27)                += 0xa80000000001c000
 668 +OBJCOPYFLAGS                   := --change-addresses=0x57ffffff80000000
 669 +endif
 670 +else
 671 +ifdef CONFIG_MAPPED_KERNEL
 672 +load-$(CONFIG_SGI_IP27)                += 0xffffffffc001c000
 673 +OBJCOPYFLAGS                   := --change-addresses=0xc000000080000000
 674 +dataoffset-$(CONFIG_SGI_IP27)  += 0x01000000
 675 +else
 676 +load-$(CONFIG_SGI_IP27)                += 0xffffffff8001c000
 677 +OBJCOPYFLAGS                   := --change-addresses=0xa800000080000000
 678 +endif
 679 +endif
 680 +endif
 681 +
 682 +#
 683 +# SGI-IP32 (O2)
 684 +#
 685 +# Set the load address to >= 80069000 if you want to leave space for symmon,
 686 +# 0xffffffff80004000 for production kernels.  Note that the value must be aligned to
 687 +# a multiple of the kernel stack size or the handling of the current variable
 688 +# will break.
 689 +#
 690 +core-$(CONFIG_SGI_IP32)                += arch/mips/sgi-ip32/
 691 +cflags-$(CONFIG_SGI_IP32)      += -Iinclude/asm-mips/mach-ip32
 692 +load-$(CONFIG_SGI_IP32)                += 0xffffffff80004000
 693 +
 694 +#
 695 +# Sibyte SB1250 SOC
 696 +#
 697 +# This is a LIB so that it links at the end, and initcalls are later
 698 +# the sequence; but it is built as an object so that modules don't get
 699 +# removed (as happens, even if they have __initcall/module_init)
 700 +#
 701 +core-$(CONFIG_SIBYTE_BCM112X)  += arch/mips/sibyte/sb1250/
 702 +cflags-$(CONFIG_SIBYTE_BCM112X)        += -Iinclude/asm-mips/mach-sibyte \
 703 +                       -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
 704 +
 705 +core-$(CONFIG_SIBYTE_SB1250)   += arch/mips/sibyte/sb1250/
 706 +cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
 707 +                       -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
 708 +
 709 +core-$(CONFIG_SIBYTE_BCM1x55)  += arch/mips/sibyte/bcm1480/
 710 +cflags-$(CONFIG_SIBYTE_BCM1x55)        += -Iinclude/asm-mips/mach-sibyte \
 711 +                       -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
 712 +
 713 +core-$(CONFIG_SIBYTE_BCM1x80)  += arch/mips/sibyte/bcm1480/
 714 +cflags-$(CONFIG_SIBYTE_BCM1x80)        += -Iinclude/asm-mips/mach-sibyte \
 715 +                       -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
 716 +
 717 +#
 718 +# Sibyte BCM91120x (Carmel) board
 719 +# Sibyte BCM91120C (CRhine) board
 720 +# Sibyte BCM91125C (CRhone) board
 721 +# Sibyte BCM91125E (Rhone) board
 722 +# Sibyte SWARM board
 723 +# Sibyte BCM91x80 (BigSur) board
 724 +#
 725 +libs-$(CONFIG_SIBYTE_CARMEL)   += arch/mips/sibyte/swarm/
 726 +load-$(CONFIG_SIBYTE_CARMEL)   := 0xffffffff80100000
 727 +libs-$(CONFIG_SIBYTE_CRHINE)   += arch/mips/sibyte/swarm/
 728 +load-$(CONFIG_SIBYTE_CRHINE)   := 0xffffffff80100000
 729 +libs-$(CONFIG_SIBYTE_CRHONE)   += arch/mips/sibyte/swarm/
 730 +load-$(CONFIG_SIBYTE_CRHONE)   := 0xffffffff80100000
 731 +libs-$(CONFIG_SIBYTE_RHONE)    += arch/mips/sibyte/swarm/
 732 +load-$(CONFIG_SIBYTE_RHONE)    := 0xffffffff80100000
 733 +libs-$(CONFIG_SIBYTE_SENTOSA)  += arch/mips/sibyte/swarm/
 734 +load-$(CONFIG_SIBYTE_SENTOSA)  := 0xffffffff80100000
 735 +libs-$(CONFIG_SIBYTE_SWARM)    += arch/mips/sibyte/swarm/
 736 +load-$(CONFIG_SIBYTE_SWARM)    := 0xffffffff80100000
 737 +libs-$(CONFIG_SIBYTE_BIGSUR)   += arch/mips/sibyte/swarm/
 738 +load-$(CONFIG_SIBYTE_BIGSUR)   := 0xffffffff80100000
 739 +
 740 +#
 741 +# SNI RM200 PCI
 742 +#
 743 +core-$(CONFIG_SNI_RM200_PCI)   += arch/mips/sni/
 744 +cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
 745 +load-$(CONFIG_SNI_RM200_PCI)   += 0xffffffff80600000
 746 +
 747 +#
 748 +# Toshiba JMR-TX3927 board
 749 +#
 750 +core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
 751 +                                  arch/mips/jmr3927/common/
 752 +cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
 753 +load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
 754 +
 755 +#
 756 +# Toshiba RBTX4927 board or
 757 +# Toshiba RBTX4937 board
 758 +#
 759 +core-$(CONFIG_TOSHIBA_RBTX4927)        += arch/mips/tx4927/toshiba_rbtx4927/
 760 +core-$(CONFIG_TOSHIBA_RBTX4927)        += arch/mips/tx4927/common/
 761 +load-$(CONFIG_TOSHIBA_RBTX4927)        += 0xffffffff80020000
 762 +
 763 +#
 764 +# Toshiba RBTX4938 board
 765 +#
 766 +core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
 767 +core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
 768 +load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
 769 +
 770 +cflags-y                       += -Iinclude/asm-mips/mach-generic
 771 +drivers-$(CONFIG_PCI)          += arch/mips/pci/
 772 +
 773 +ifdef CONFIG_32BIT
 774 +ifdef CONFIG_CPU_LITTLE_ENDIAN
 775 +JIFFIES                        = jiffies_64
 776 +else
 777 +JIFFIES                        = jiffies_64 + 4
 778 +endif
 779 +else
 780 +JIFFIES                        = jiffies_64
 781 +endif
 782 +
 783 +AFLAGS         += $(cflags-y)
 784 +CFLAGS         += $(cflags-y)
 785 +
 786 +LDFLAGS                        += -m $(ld-emul)
 787 +
 788 +OBJCOPYFLAGS           += --remove-section=.reginfo
 789 +
 790 +#
 791 +# Choosing incompatible machines durings configuration will result in
 792 +# error messages during linking.  Select a default linkscript if
 793 +# none has been choosen above.
 794 +#
 795 +
 796 +CPPFLAGS_vmlinux.lds := \
 797 +       $(CFLAGS) \
 798 +       -D"LOADADDR=$(load-y)" \
 799 +       -D"JIFFIES=$(JIFFIES)" \
 800 +       -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
 801 +
 802 +head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
 803 +
 804 +libs-y                 += arch/mips/lib/
 805 +libs-$(CONFIG_32BIT)   += arch/mips/lib-32/
 806 +libs-$(CONFIG_64BIT)   += arch/mips/lib-64/
 807 +
 808 +core-y                 += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
 809 +
 810 +drivers-$(CONFIG_OPROFILE)     += arch/mips/oprofile/
 811 +
 812 +ifdef CONFIG_LASAT
 813 +rom.bin rom.sw: vmlinux
 814 +       $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
 815 +endif
 816 +
 817 +#
 818 +# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
 819 +# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
 820 +# convert to ECOFF using elf2ecoff.
 821 +#
 822 +vmlinux.32: vmlinux
 823 +       $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
 824 +
 825 +#
 826 +# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
 827 +# ELF files from 32-bit files by conversion.
 828 +#
 829 +vmlinux.64: vmlinux
 830 +       $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
 831 +
 832 +makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
 833 +
 834 +ifdef CONFIG_BOOT_ELF32
 835 +all:   $(vmlinux-32)
 836 +endif
 837 +
 838 +ifdef CONFIG_BOOT_ELF64
 839 +all:   $(vmlinux-64)
 840 +endif
 841 +
 842 +ifdef CONFIG_MIPS_ATLAS
 843 +all:   vmlinux.srec
 844 +endif
 845 +
 846 +ifdef CONFIG_MIPS_MALTA
 847 +all:   vmlinux.srec
 848 +endif
 849 +
 850 +ifdef CONFIG_MIPS_SEAD
 851 +all:   vmlinux.srec
 852 +endif
 853 +
 854 +ifdef CONFIG_QEMU
 855 +all:   vmlinux.bin
 856 +endif
 857 +
 858 +ifdef CONFIG_SNI_RM200_PCI
 859 +all:   vmlinux.ecoff
 860 +endif
 861 +
 862 +vmlinux.bin: $(vmlinux-32)
 863 +       +@$(call makeboot,$@)
 864 +
 865 +vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
 866 +       +@$(call makeboot,$@)
 867 +
 868 +vmlinux.srec: $(vmlinux-32)
 869 +       +@$(call makeboot,$@)
 870 +
 871 +zImage: vmlinux
 872 +       +@$(call makeboot,$@)
 873 +
 874 +CLEAN_FILES += vmlinux.ecoff \
 875 +              vmlinux.srec \
 876 +              vmlinux.rm200.tmp \
 877 +              vmlinux.rm200
 878 +
 879 +archclean:
 880 +       @$(MAKE) $(clean)=arch/mips/boot
 881 +       @$(MAKE) $(clean)=arch/mips/lasat
 882 +       @$(MAKE) $(clean)=arch/mips/boot/compressed
 883 +
 884 +CLEAN_FILES += vmlinux.32 \
 885 +              vmlinux.64 \
 886 +              vmlinux.ecoff
 887 diff -urN linux-2.6.16.7/arch/mips/boot/Makefile linux-2.6.16.7.new/arch/mips/boot/Makefile
 888 --- linux-2.6.16.7/arch/mips/boot/Makefile      2006-04-17 23:53:25.000000000 +0200
 889 +++ linux-2.6.16.7.new/arch/mips/boot/Makefile  2006-04-20 19:27:22.000000000 +0200
 890 @@ -16,6 +16,7 @@
 891    E2EFLAGS =
 892  endif
 893
 894 +
 895  #
 896  # Drop some uninteresting sections in the kernel.
 897  # This is only relevant for ELF kernels but doesn't hurt a.out
 898 @@ -25,7 +26,10 @@
 899
 900  VMLINUX = vmlinux
 901
 902 -all: vmlinux.ecoff vmlinux.srec addinitrd
 903 +ZBOOT_TARGETS  = zImage zImage.flash
 904 +bootdir-y      := compressed
 905 +
 906 +all: vmlinux.ecoff vmlinux.srec addinitrd zImage
 907
 908  vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
 909         $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
 910 @@ -51,3 +55,11 @@
 911                vmlinux.bin \
 912                vmlinux.ecoff \
 913                vmlinux.srec
 914 +
 915 +.PHONY: $(ZBOOT_TARGETS) $(bootdir-y)
 916 +
 917 +$(ZBOOT_TARGETS): $(bootdir-y)
 918 +
 919 +$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
 920 +               $(addprefix $(obj)/,$(hostprogs-y))
 921 +       $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
 922 diff -urN linux-2.6.16.7/arch/mips/boot/Makefile.orig linux-2.6.16.7.new/arch/mips/boot/Makefile.orig
 923 --- linux-2.6.16.7/arch/mips/boot/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
 924 +++ linux-2.6.16.7.new/arch/mips/boot/Makefile.orig     2006-04-17 23:53:25.000000000 +0200
 925 @@ -0,0 +1,53 @@
 926 +#
 927 +# This file is subject to the terms and conditions of the GNU General Public
 928 +# License.  See the file "COPYING" in the main directory of this archive
 929 +# for more details.
 930 +#
 931 +# Copyright (C) 1995, 1998, 2001, 2002 by Ralf Baechle
 932 +# Copyright (C) 2004  Maciej W. Rozycki
 933 +#
 934 +
 935 +#
 936 +# Some DECstations need all possible sections of an ECOFF executable
 937 +#
 938 +ifdef CONFIG_MACH_DECSTATION
 939 +  E2EFLAGS = -a
 940 +else
 941 +  E2EFLAGS =
 942 +endif
 943 +
 944 +#
 945 +# Drop some uninteresting sections in the kernel.
 946 +# This is only relevant for ELF kernels but doesn't hurt a.out
 947 +#
 948 +drop-sections  = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
 949 +strip-flags    = $(addprefix --remove-section=,$(drop-sections))
 950 +
 951 +VMLINUX = vmlinux
 952 +
 953 +all: vmlinux.ecoff vmlinux.srec addinitrd
 954 +
 955 +vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
 956 +       $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
 957 +
 958 +$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
 959 +       $(HOSTCC) -o $@ $^
 960 +
 961 +vmlinux.bin: $(VMLINUX)
 962 +       $(OBJCOPY) -O binary $(strip-flags) $(VMLINUX) $(obj)/vmlinux.bin
 963 +
 964 +vmlinux.srec: $(VMLINUX)
 965 +       $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
 966 +
 967 +$(obj)/addinitrd: $(obj)/addinitrd.c
 968 +       $(HOSTCC) -o $@ $^
 969 +
 970 +archhelp:
 971 +       @echo   '* vmlinux.ecoff        - ECOFF boot image'
 972 +       @echo   '* vmlinux.srec         - SREC boot image'
 973 +
 974 +clean-files += addinitrd \
 975 +              elf2ecoff \
 976 +              vmlinux.bin \
 977 +              vmlinux.ecoff \
 978 +              vmlinux.srec
 979 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile
 980 --- linux-2.6.16.7/arch/mips/boot/compressed/Makefile   1970-01-01 01:00:00.000000000 +0100
 981 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile       2006-04-20 19:27:22.000000000 +0200
 982 @@ -0,0 +1,32 @@
 983 +
 984 +#
 985 +# arch/mips/boot/compressed/Makefile
 986 +#
 987 +# This file is subject to the terms and conditions of the GNU General Public
 988 +# License.  See the file "COPYING" in the main directory of this archive
 989 +# for more details.
 990 +#
 991 +# Copyright (C) 1994 by Linus Torvalds
 992 +# Adapted for PowerPC by Gary Thomas
 993 +# modified by Cort (cort@cs.nmt.edu)
 994 +#
 995 +# Ported to MIPS by Pete Popov, ppopov@embeddedalley.com
 996 +#
 997 +
 998 +boot           := arch/mips/boot
 999 +compressed     := arch/mips/boot/compressed
1000 +
1001 +CFLAGS         += -fno-builtin -D__BOOTER__ -I$(compressed)/include
1002 +
1003 +BOOT_TARGETS   = zImage zImage.flash
1004 +
1005 +bootdir-$(CONFIG_SOC_AU1X00)   := au1xxx
1006 +subdir-y                       := common lib images
1007 +
1008 +.PHONY: $(BOOT_TARGETS) $(bootdir-y)
1009 +
1010 +$(BOOT_TARGETS): $(bootdir-y)
1011 +
1012 +$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
1013 +               $(addprefix $(obj)/,$(hostprogs-y))
1014 +       $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
1015 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile
1016 --- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile    1970-01-01 01:00:00.000000000 +0100
1017 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile        2006-04-20 19:27:22.000000000 +0200
1018 @@ -0,0 +1,110 @@
1019 +# arch/mips/boot/compressed/au1xxx/Makefile
1020 +#
1021 +# Makefile for AMD Alchemy Semiconductor Au1x based boards.
1022 +# All of the boot loader code was derived from the ppc
1023 +# boot code.
1024 +#
1025 +# Copyright 2001,2002 MontaVista Software Inc.
1026 +#
1027 +# Author: Mark A. Greer
1028 +#        mgreer@mvista.com
1029 +#
1030 +# Copyright 2004 Embedded Alley Solutions, Inc
1031 +# Ported and modified for mips 2.6 support by
1032 +# Pete Popov <ppopov@embeddedalley.com>
1033 +#
1034 +# This program is free software; you can redistribute  it and/or modify it
1035 +# under  the terms of  the GNU General  Public License as published by the
1036 +# Free Software Foundation;  either version 2 of the  License, or (at your
1037 +# option) any later version.
1038 +
1039 +boot           := arch/mips/boot
1040 +compressed     := $(boot)/compressed
1041 +utils          := $(compressed)/utils
1042 +lib            := $(compressed)/lib
1043 +images         := $(compressed)/images
1044 +common         := $(compressed)/common
1045 +
1046 +#########################################################################
1047 +# START BOARD SPECIFIC VARIABLES
1048 +
1049 +# These two variables control where the zImage is stored
1050 +# in flash and loaded in memory.  It only controls how the srec
1051 +# file is generated, the code is the same.
1052 +RAM_RUN_ADDR = 0x81000000
1053 +
1054 +ifdef CONFIG_MIPS_XXS1500
1055 +FLASH_LOAD_ADDR = 0xBF000000
1056 +else
1057 +FLASH_LOAD_ADDR = 0xBFD00000
1058 +endif
1059 +
1060 +# These two variables specify the free ram region
1061 +# that can be used for temporary malloc area
1062 +AVAIL_RAM_START=0x80500000
1063 +AVAIL_RAM_END=0x80900000
1064 +
1065 +# This one must match the LOADADDR in arch/mips/Makefile!
1066 +LOADADDR=0x80100000
1067 +
1068 +# WARNING WARNING WARNING
1069 +# Note that with a LOADADDR of 0x80100000 and AVAIL_RAM_START of
1070 +# 0x80500000, the max decompressed kernel size can be 4MB. Else we
1071 +# start overwriting ourselve. You can change these vars as needed;
1072 +# it would be much better if we just figured everything out on the fly.
1073 +
1074 +# END BOARD SPECIFIC VARIABLES
1075 +#########################################################################
1076 +
1077 +OBJECTS        := $(obj)/head.o $(common)/misc-common.o $(common)/misc-simple.o \
1078 +       $(common)/au1k_uart.o
1079 +LIBS := $(lib)/lib.a
1080 +
1081 +ENTRY := $(utils)/entry
1082 +OFFSET := $(utils)/offset
1083 +SIZE := $(utils)/size
1084 +
1085 +LD_ARGS := -T $(compressed)/ld.script -Ttext $(RAM_RUN_ADDR) -Bstatic
1086 +
1087 +ifdef CONFIG_CPU_LITTLE_ENDIAN
1088 +OBJCOPY_ARGS = -O elf32-tradlittlemips
1089 +else
1090 +OBJCOPY_ARGS = -O elf32-tradbigmips
1091 +endif
1092 +
1093 +$(obj)/head.o: $(obj)/head.S $(TOPDIR)/vmlinux
1094 +       $(CC) -I $(TOPDIR)/include $(AFLAGS) \
1095 +       -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \
1096 +       -c -o $*.o $<
1097 +
1098 +$(common)/misc-simple.o:
1099 +       $(CC) -I $(TOPDIR)/include $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
1100 +               -DAVAIL_RAM_START=$(AVAIL_RAM_START) \
1101 +               -DAVAIL_RAM_END=$(AVAIL_RAM_END) \
1102 +               -DLOADADDR=$(LOADADDR) \
1103 +               -DZIMAGE_SIZE=0 -c -o $@ $*.c
1104 +
1105 +$(obj)/zvmlinux: $(OBJECTS) $(LIBS) $(srctree)/$(compressed)/ld.script $(images)/vmlinux.gz $(common)/dummy.o
1106 +       $(OBJCOPY) \
1107 +               --add-section=.image=$(images)/vmlinux.gz \
1108 +               --set-section-flags=.image=contents,alloc,load,readonly,data \
1109 +               $(common)/dummy.o $(common)/image.o
1110 +       $(LD) $(LD_ARGS) -o $@ $(OBJECTS) $(common)/image.o $(LIBS)
1111 +       $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R __kcrctab -R __ksymtab_strings \
1112 +       -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap
1113 +
1114 +# Here we manipulate the image in order to get it the necessary
1115 +# srecord file we need.
1116 +zImage: $(obj)/zvmlinux
1117 +       mv $(obj)/zvmlinux $(images)/zImage
1118 +       $(OBJCOPY) -O srec $(images)/zImage $(images)/zImage.srec
1119 +       $(OBJCOPY) -O binary $(images)/zImage $(images)/zImage.bin
1120 +
1121 +zImage.flash: zImage
1122 +       ( \
1123 +       flash=${FLASH_LOAD_ADDR} ; \
1124 +       ram=${RAM_RUN_ADDR} ; \
1125 +       adjust=$$[ $$flash - $$ram ] ; \
1126 +       $(OBJCOPY) -O srec --adjust-vma `printf '0x%08x' $$adjust` \
1127 +               $(images)/zImage $(images)/zImage.flash.srec ; \
1128 +       )
1129 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S
1130 --- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S      1970-01-01 01:00:00.000000000 +0100
1131 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S  2006-04-20 19:27:12.000000000 +0200
1132 @@ -0,0 +1,119 @@
1133 +/*
1134 + * arch/mips/kernel/head.S
1135 + *
1136 + * This file is subject to the terms and conditions of the GNU General Public
1137 + * License.  See the file "COPYING" in the main directory of this archive
1138 + * for more details.
1139 + *
1140 + * Copyright (C) 1994, 1995 Waldorf Electronics
1141 + * Written by Ralf Baechle and Andreas Busse
1142 + * Copyright (C) 1995 - 1999 Ralf Baechle
1143 + * Copyright (C) 1996 Paul M. Antoine
1144 + * Modified for DECStation and hence R3000 support by Paul M. Antoine
1145 + * Further modifications by David S. Miller and Harald Koerfgen
1146 + * Copyright (C) 1999 Silicon Graphics, Inc.
1147 + *
1148 + * Head.S contains the MIPS exception handler and startup code.
1149 + *
1150 + **************************************************************************
1151 + *  9 Nov, 2000.
1152 + *  Added Cache Error exception handler and SBDDP EJTAG debug exception.
1153 + *
1154 + *  Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
1155 + *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
1156 + **************************************************************************
1157 + */
1158 +#include <linux/config.h>
1159 +#include <linux/threads.h>
1160 +
1161 +#include <asm/asm.h>
1162 +#include <asm/cacheops.h>
1163 +#include <asm/mipsregs.h>
1164 +#include <asm/cachectl.h>
1165 +#include <asm/regdef.h>
1166 +
1167 +#define IndexInvalidate_I       0x00
1168 +#define IndexWriteBack_D        0x01
1169 +
1170 +       .set noreorder
1171 +       .cprestore
1172 +       LEAF(start)
1173 +start:
1174 +       bal     locate
1175 +       nop
1176 +locate:
1177 +       subu    s8, ra, 8       /* Where we were loaded */
1178 +       la      sp, (.stack + 8192)
1179 +
1180 +       move    s0, a0          /* Save boot rom start args */
1181 +       move    s1, a1
1182 +       move    s2, a2
1183 +       move    s3, a3
1184 +
1185 +       la      a0, start       /* Where we were linked to run */
1186 +
1187 +       move    a1, s8
1188 +       la      a2, _edata
1189 +       subu    t1, a2, a0
1190 +       srl     t1, t1, 2
1191 +
1192 +       /* copy text section */
1193 +       li      t0, 0
1194 +1:     lw      v0, 0(a1)
1195 +       nop
1196 +       sw      v0, 0(a0)
1197 +       xor     t0, t0, v0
1198 +       addu    a0, 4
1199 +       bne     a2, a0, 1b
1200 +       addu    a1, 4
1201 +
1202 +       /* Clear BSS */
1203 +       la      a0, _edata
1204 +       la      a2, _end
1205 +2:     sw      zero, 0(a0)
1206 +       bne     a2, a0, 2b
1207 +       addu    a0, 4
1208 +
1209 +       /* push the D-Cache and invalidate I-Cache */
1210 +       li      k0, 0x80000000  # start address
1211 +       li      k1, 0x80004000  # end address (16KB I-Cache)
1212 +       subu    k1, 128
1213 +
1214 +1:
1215 +       .set mips3
1216 +       cache   IndexWriteBack_D, 0(k0)
1217 +       cache   IndexWriteBack_D, 32(k0)
1218 +       cache   IndexWriteBack_D, 64(k0)
1219 +       cache   IndexWriteBack_D, 96(k0)
1220 +       cache   IndexInvalidate_I, 0(k0)
1221 +       cache   IndexInvalidate_I, 32(k0)
1222 +       cache   IndexInvalidate_I, 64(k0)
1223 +       cache   IndexInvalidate_I, 96(k0)
1224 +       .set mips0
1225 +
1226 +       bne     k0, k1, 1b
1227 +       addu    k0, k0, 128
1228 +       /* done */
1229 +
1230 +       move    a0, s8               /* load address */
1231 +       move    a1, t1               /* length in words */
1232 +       move    a2, t0               /* checksum */
1233 +       move    a3, sp
1234 +
1235 +       la      ra, 1f
1236 +       la      k0, decompress_kernel
1237 +       jr      k0
1238 +       nop
1239 +1:
1240 +
1241 +       move    a0, s0
1242 +       move    a1, s1
1243 +       move    a2, s2
1244 +       move    a3, s3
1245 +       li      k0, KERNEL_ENTRY
1246 +       jr      k0
1247 +       nop
1248 +3:
1249 +       b 3b
1250 +       END(start)
1251 +       .comm .stack,4096*2,4
1252 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile
1253 --- linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile    1970-01-01 01:00:00.000000000 +0100
1254 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile        2006-04-20 19:27:12.000000000 +0200
1255 @@ -0,0 +1,14 @@
1256 +#
1257 +# arch/mips/boot/compressed/common/Makefile
1258 +#
1259 +# This file is subject to the terms and conditions of the GNU General Public
1260 +# License.  See the file "COPYING" in the main directory of this archive
1261 +# for more details.
1262 +#
1263 +# Tom Rini     January 2001
1264 +#
1265 +# Pete Popov, 2004
1266 +#
1267 +
1268 +lib-y          := misc-common.o no_initrd.o dummy.o
1269 +lib-$(CONFIG_SOC_AU1X00)       += au1k_uart.o
1270 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c
1271 --- linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c 1970-01-01 01:00:00.000000000 +0100
1272 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c     2006-04-20 19:27:12.000000000 +0200
1273 @@ -0,0 +1,103 @@
1274 +/*
1275 + * BRIEF MODULE DESCRIPTION
1276 + *     Simple Au1000 uart routines.
1277 + *
1278 + * Copyright 2001 MontaVista Software Inc.
1279 + * Author: MontaVista Software, Inc.
1280 + *             ppopov@mvista.com or source@mvista.com
1281 + *
1282 + *  This program is free software; you can redistribute         it and/or modify it
1283 + *  under  the terms of         the GNU General  Public License as published by the
1284 + *  Free Software Foundation;  either version 2 of the License, or (at your
1285 + *  option) any later version.
1286 + *
1287 + *  THIS  SOFTWARE  IS PROVIDED          ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
1288 + *  WARRANTIES,          INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
1289 + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
1290 + *  NO EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
1291 + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1292 + *  NOT LIMITED          TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
1293 + *  USE, DATA, OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1294 + *  ANY THEORY OF LIABILITY, WHETHER IN         CONTRACT, STRICT LIABILITY, OR TORT
1295 + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1296 + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1297 + *
1298 + *  You should have received a copy of the  GNU General Public License along
1299 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
1300 + *  675 Mass Ave, Cambridge, MA 02139, USA.
1301 + */
1302 +#include <linux/config.h>
1303 +#include <asm/io.h>
1304 +#include <asm/mach-au1x00/au1000.h>
1305 +#include "ns16550.h"
1306 +
1307 +typedef         unsigned char uint8;
1308 +typedef         unsigned int  uint32;
1309 +
1310 +#define         UART16550_BAUD_2400             2400
1311 +#define         UART16550_BAUD_4800             4800
1312 +#define         UART16550_BAUD_9600             9600
1313 +#define         UART16550_BAUD_19200            19200
1314 +#define         UART16550_BAUD_38400            38400
1315 +#define         UART16550_BAUD_57600            57600
1316 +#define         UART16550_BAUD_115200           115200
1317 +
1318 +#define         UART16550_PARITY_NONE           0
1319 +#define         UART16550_PARITY_ODD            0x08
1320 +#define         UART16550_PARITY_EVEN           0x18
1321 +#define         UART16550_PARITY_MARK           0x28
1322 +#define         UART16550_PARITY_SPACE          0x38
1323 +
1324 +#define         UART16550_DATA_5BIT             0x0
1325 +#define         UART16550_DATA_6BIT             0x1
1326 +#define         UART16550_DATA_7BIT             0x2
1327 +#define         UART16550_DATA_8BIT             0x3
1328 +
1329 +#define         UART16550_STOP_1BIT             0x0
1330 +#define         UART16550_STOP_2BIT             0x4
1331 +
1332 +/* It would be nice if we had a better way to do this.
1333 + * It could be a variable defined in one of the board specific files.
1334 + */
1335 +#undef UART_BASE
1336 +#ifdef CONFIG_COGENT_CSB250
1337 +#define UART_BASE UART3_ADDR
1338 +#else
1339 +#define UART_BASE UART0_ADDR
1340 +#endif
1341 +
1342 +/* memory-mapped read/write of the port */
1343 +#define UART16550_READ(y)    (au_readl(UART_BASE + y) & 0xff)
1344 +#define UART16550_WRITE(y,z) (au_writel(z&0xff, UART_BASE + y))
1345 +
1346 +/*
1347 + * We use uart 0, which is already initialized by
1348 + * yamon.
1349 + */
1350 +volatile struct NS16550 *
1351 +serial_init(int chan)
1352 +{
1353 +       volatile struct NS16550 *com_port;
1354 +       com_port = (struct NS16550 *) UART_BASE;
1355 +       return (com_port);
1356 +}
1357 +
1358 +void
1359 +serial_putc(volatile struct NS16550 *com_port, unsigned char c)
1360 +{
1361 +       while ((UART16550_READ(UART_LSR)&0x40) == 0);
1362 +       UART16550_WRITE(UART_TX, c);
1363 +}
1364 +
1365 +unsigned char
1366 +serial_getc(volatile struct NS16550 *com_port)
1367 +{
1368 +       while((UART16550_READ(UART_LSR) & 0x1) == 0);
1369 +       return UART16550_READ(UART_RX);
1370 +}
1371 +
1372 +int
1373 +serial_tstc(volatile struct NS16550 *com_port)
1374 +{
1375 +       return((UART16550_READ(UART_LSR) & LSR_DR) != 0);
1376 +}
1377 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c
1378 --- linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c     1970-01-01 01:00:00.000000000 +0100
1379 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c 2006-04-20 19:27:12.000000000 +0200
1380 @@ -0,0 +1,4 @@
1381 +int main(void)
1382 +{
1383 +       return 0;
1384 +}
1385 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c
1386 --- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c       1970-01-01 01:00:00.000000000 +0100
1387 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c   2006-04-20 19:27:12.000000000 +0200
1388 @@ -0,0 +1,434 @@
1389 +/*
1390 + * arch/mips/boot/compressed/common/misc-common.c
1391 + *
1392 + * Misc. bootloader code (almost) all platforms can use
1393 + *
1394 + * Author: Johnnie Peters <jpeters@mvista.com>
1395 + * Editor: Tom Rini <trini@mvista.com>
1396 + *
1397 + * Derived from arch/ppc/boot/prep/misc.c
1398 + *
1399 + * Ported by Pete Popov <ppopov@mvista.com> to
1400 + * support mips board(s).  I also got rid of the vga console
1401 + * code.
1402 + *
1403 + * Copyright 2000-2001 MontaVista Software Inc.
1404 + *
1405 + * Ported to MIPS 2.6 by Pete Popov, <ppopov@embeddedalley.com>
1406 + *
1407 + * This program is free software; you can redistribute  it and/or modify it
1408 + * under  the terms of  the GNU General  Public License as published by the
1409 + * Free Software Foundation;  either version 2 of the  License, or (at your
1410 + * option) any later version.
1411 + *
1412 + * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
1413 + * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
1414 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
1415 + * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
1416 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1417 + * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
1418 + * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1419 + * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
1420 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1421 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1422 + *
1423 + * You should have received a copy of the  GNU General Public License along
1424 + * with this program; if not, write  to the Free Software Foundation, Inc.,
1425 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1426 + */
1427 +
1428 +#include <stdarg.h>    /* for va_ bits */
1429 +#include <linux/config.h>
1430 +#include <linux/string.h>
1431 +#include <linux/zlib.h>
1432 +
1433 +extern char *avail_ram;
1434 +extern char *end_avail;
1435 +extern char _end[];
1436 +
1437 +void puts(const char *);
1438 +void putc(const char c);
1439 +void puthex(unsigned long val);
1440 +void _bcopy(char *src, char *dst, int len);
1441 +void gunzip(void *, int, unsigned char *, int *);
1442 +static int _cvt(unsigned long val, char *buf, long radix, char *digits);
1443 +
1444 +void _vprintk(void(*)(const char), const char *, va_list ap);
1445 +
1446 +struct NS16550 *com_port;
1447 +
1448 +int serial_tstc(volatile struct NS16550 *);
1449 +unsigned char serial_getc(volatile struct NS16550 *);
1450 +void serial_putc(volatile struct NS16550 *, unsigned char);
1451 +
1452 +void pause(void)
1453 +{
1454 +       puts("pause\n");
1455 +}
1456 +
1457 +void exit(void)
1458 +{
1459 +       puts("exit\n");
1460 +       while(1);
1461 +}
1462 +
1463 +int tstc(void)
1464 +{
1465 +       return (serial_tstc(com_port));
1466 +}
1467 +
1468 +int getc(void)
1469 +{
1470 +       while (1) {
1471 +               if (serial_tstc(com_port))
1472 +                       return (serial_getc(com_port));
1473 +       }
1474 +}
1475 +
1476 +void
1477 +putc(const char c)
1478 +{
1479 +       serial_putc(com_port, c);
1480 +       if ( c == '\n' )
1481 +               serial_putc(com_port, '\r');
1482 +}
1483 +
1484 +void puts(const char *s)
1485 +{
1486 +       char c;
1487 +       while ( ( c = *s++ ) != '\0' ) {
1488 +               serial_putc(com_port, c);
1489 +               if ( c == '\n' ) serial_putc(com_port, '\r');
1490 +       }
1491 +}
1492 +
1493 +void error(char *x)
1494 +{
1495 +       puts("\n\n");
1496 +       puts(x);
1497 +       puts("\n\n -- System halted");
1498 +
1499 +       while(1);       /* Halt */
1500 +}
1501 +
1502 +static void *zalloc(unsigned size)
1503 +{
1504 +       void *p = avail_ram;
1505 +
1506 +       size = (size + 7) & -8;
1507 +       avail_ram += size;
1508 +       if (avail_ram > end_avail) {
1509 +               puts("oops... out of memory\n");
1510 +               pause();
1511 +       }
1512 +       return p;
1513 +}
1514 +
1515 +
1516 +#define HEAD_CRC       2
1517 +#define EXTRA_FIELD    4
1518 +#define ORIG_NAME      8
1519 +#define COMMENT                0x10
1520 +#define RESERVED       0xe0
1521 +
1522 +#define DEFLATED       8
1523 +
1524 +void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
1525 +{
1526 +       z_stream s;
1527 +       int r, i, flags;
1528 +
1529 +       /* skip header */
1530 +       i = 10;
1531 +       flags = src[3];
1532 +       if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
1533 +               puts("bad gzipped data\n");
1534 +               exit();
1535 +       }
1536 +       if ((flags & EXTRA_FIELD) != 0)
1537 +               i = 12 + src[10] + (src[11] << 8);
1538 +       if ((flags & ORIG_NAME) != 0)
1539 +               while (src[i++] != 0)
1540 +                       ;
1541 +       if ((flags & COMMENT) != 0)
1542 +               while (src[i++] != 0)
1543 +                       ;
1544 +       if ((flags & HEAD_CRC) != 0)
1545 +               i += 2;
1546 +       if (i >= *lenp) {
1547 +               puts("gunzip: ran out of data in header\n");
1548 +               exit();
1549 +       }
1550 +
1551 +       /* Initialize ourself. */
1552 +       s.workspace = zalloc(zlib_inflate_workspacesize());
1553 +       r = zlib_inflateInit2(&s, -MAX_WBITS);
1554 +       if (r != Z_OK) {
1555 +               puts("zlib_inflateInit2 returned "); puthex(r); puts("\n");
1556 +               exit();
1557 +       }
1558 +       s.next_in = src + i;
1559 +       s.avail_in = *lenp - i;
1560 +       s.next_out = dst;
1561 +       s.avail_out = dstlen;
1562 +       r = zlib_inflate(&s, Z_FINISH);
1563 +       if (r != Z_OK && r != Z_STREAM_END) {
1564 +               puts("inflate returned "); puthex(r); puts("\n");
1565 +               exit();
1566 +       }
1567 +       *lenp = s.next_out - (unsigned char *) dst;
1568 +       zlib_inflateEnd(&s);
1569 +}
1570 +
1571 +void
1572 +puthex(unsigned long val)
1573 +{
1574 +
1575 +       unsigned char buf[10];
1576 +       int i;
1577 +       for (i = 7;  i >= 0;  i--)
1578 +       {
1579 +               buf[i] = "0123456789ABCDEF"[val & 0x0F];
1580 +               val >>= 4;
1581 +       }
1582 +       buf[8] = '\0';
1583 +       puts(buf);
1584 +}
1585 +
1586 +#define FALSE 0
1587 +#define TRUE  1
1588 +
1589 +void
1590 +_printk(char const *fmt, ...)
1591 +{
1592 +       va_list ap;
1593 +
1594 +       va_start(ap, fmt);
1595 +       _vprintk(putc, fmt, ap);
1596 +       va_end(ap);
1597 +       return;
1598 +}
1599 +
1600 +#define is_digit(c) ((c >= '0') && (c <= '9'))
1601 +
1602 +void
1603 +_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
1604 +{
1605 +       char c, sign, *cp = 0;
1606 +       int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
1607 +       char buf[32];
1608 +       long val;
1609 +       while ((c = *fmt0++))
1610 +       {
1611 +               if (c == '%')
1612 +               {
1613 +                       c = *fmt0++;
1614 +                       left_prec = right_prec = pad_on_right = 0;
1615 +                       if (c == '-')
1616 +                       {
1617 +                               c = *fmt0++;
1618 +                               pad_on_right++;
1619 +                       }
1620 +                       if (c == '0')
1621 +                       {
1622 +                               zero_fill = TRUE;
1623 +                               c = *fmt0++;
1624 +                       } else
1625 +                       {
1626 +                               zero_fill = FALSE;
1627 +                       }
1628 +                       while (is_digit(c))
1629 +                       {
1630 +                               left_prec = (left_prec * 10) + (c - '0');
1631 +                               c = *fmt0++;
1632 +                       }
1633 +                       if (c == '.')
1634 +                       {
1635 +                               c = *fmt0++;
1636 +                               zero_fill++;
1637 +                               while (is_digit(c))
1638 +                               {
1639 +                                       right_prec = (right_prec * 10) + (c - '0');
1640 +                                       c = *fmt0++;
1641 +                               }
1642 +                       } else
1643 +                       {
1644 +                               right_prec = left_prec;
1645 +                       }
1646 +                       sign = '\0';
1647 +                       switch (c)
1648 +                       {
1649 +                       case 'd':
1650 +                       case 'x':
1651 +                       case 'X':
1652 +                               val = va_arg(ap, long);
1653 +                               switch (c)
1654 +                               {
1655 +                               case 'd':
1656 +                                       if (val < 0)
1657 +                                       {
1658 +                                               sign = '-';
1659 +                                               val = -val;
1660 +                                       }
1661 +                                       length = _cvt(val, buf, 10, "0123456789");
1662 +                                       break;
1663 +                               case 'x':
1664 +                                       length = _cvt(val, buf, 16, "0123456789abcdef");
1665 +                                       break;
1666 +                               case 'X':
1667 +                                       length = _cvt(val, buf, 16, "0123456789ABCDEF");
1668 +                                       break;
1669 +                               }
1670 +                               cp = buf;
1671 +                               break;
1672 +                       case 's':
1673 +                               cp = va_arg(ap, char *);
1674 +                               length = strlen(cp);
1675 +                               break;
1676 +                       case 'c':
1677 +                               c = va_arg(ap, long /*char*/);
1678 +                               (*putc)(c);
1679 +                               continue;
1680 +                       default:
1681 +                               (*putc)('?');
1682 +                       }
1683 +                       pad = left_prec - length;
1684 +                       if (sign != '\0')
1685 +                       {
1686 +                               pad--;
1687 +                       }
1688 +                       if (zero_fill)
1689 +                       {
1690 +                               c = '0';
1691 +                               if (sign != '\0')
1692 +                               {
1693 +                                       (*putc)(sign);
1694 +                                       sign = '\0';
1695 +                               }
1696 +                       } else
1697 +                       {
1698 +                               c = ' ';
1699 +                       }
1700 +                       if (!pad_on_right)
1701 +                       {
1702 +                               while (pad-- > 0)
1703 +                               {
1704 +                                       (*putc)(c);
1705 +                               }
1706 +                       }
1707 +                       if (sign != '\0')
1708 +                       {
1709 +                               (*putc)(sign);
1710 +                       }
1711 +                       while (length-- > 0)
1712 +                       {
1713 +                               (*putc)(c = *cp++);
1714 +                               if (c == '\n')
1715 +                               {
1716 +                                       (*putc)('\r');
1717 +                               }
1718 +                       }
1719 +                       if (pad_on_right)
1720 +                       {
1721 +                               while (pad-- > 0)
1722 +                               {
1723 +                                       (*putc)(c);
1724 +                               }
1725 +                       }
1726 +               } else
1727 +               {
1728 +                       (*putc)(c);
1729 +                       if (c == '\n')
1730 +                       {
1731 +                               (*putc)('\r');
1732 +                       }
1733 +               }
1734 +       }
1735 +}
1736 +
1737 +int
1738 +_cvt(unsigned long val, char *buf, long radix, char *digits)
1739 +{
1740 +       char temp[80];
1741 +       char *cp = temp;
1742 +       int length = 0;
1743 +       if (val == 0)
1744 +       { /* Special case */
1745 +               *cp++ = '0';
1746 +       } else
1747 +               while (val)
1748 +               {
1749 +                       *cp++ = digits[val % radix];
1750 +                       val /= radix;
1751 +               }
1752 +       while (cp != temp)
1753 +       {
1754 +               *buf++ = *--cp;
1755 +               length++;
1756 +       }
1757 +       *buf = '\0';
1758 +       return (length);
1759 +}
1760 +
1761 +void
1762 +_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
1763 +{
1764 +       int i, c;
1765 +       if ((unsigned int)s > (unsigned int)p)
1766 +       {
1767 +               s = (unsigned int)s - (unsigned int)p;
1768 +       }
1769 +       while (s > 0)
1770 +       {
1771 +               if (base)
1772 +               {
1773 +                       _printk("%06X: ", (int)p - (int)base);
1774 +               } else
1775 +               {
1776 +                       _printk("%06X: ", p);
1777 +               }
1778 +               for (i = 0;  i < 16;  i++)
1779 +               {
1780 +                       if (i < s)
1781 +                       {
1782 +                               _printk("%02X", p[i] & 0xFF);
1783 +                       } else
1784 +                       {
1785 +                               _printk("  ");
1786 +                       }
1787 +                       if ((i % 2) == 1) _printk(" ");
1788 +                       if ((i % 8) == 7) _printk(" ");
1789 +               }
1790 +               _printk(" |");
1791 +               for (i = 0;  i < 16;  i++)
1792 +               {
1793 +                       if (i < s)
1794 +                       {
1795 +                               c = p[i] & 0xFF;
1796 +                               if ((c < 0x20) || (c >= 0x7F)) c = '.';
1797 +                       } else
1798 +                       {
1799 +                               c = ' ';
1800 +                       }
1801 +                       _printk("%c", c);
1802 +               }
1803 +               _printk("|\n");
1804 +               s -= 16;
1805 +               p += 16;
1806 +       }
1807 +}
1808 +
1809 +void
1810 +_dump_buf(unsigned char *p, int s)
1811 +{
1812 +       _printk("\n");
1813 +       _dump_buf_with_offset(p, s, 0);
1814 +}
1815 +
1816 +/*
1817 + * Local variables:
1818 + *  c-indent-level: 8
1819 + *  c-basic-offset: 8
1820 + *  tab-width: 8
1821 + * End:
1822 + */
1823 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c
1824 --- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c       1970-01-01 01:00:00.000000000 +0100
1825 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c   2006-04-20 19:27:22.000000000 +0200
1826 @@ -0,0 +1,122 @@
1827 +/*
1828 + * arch/mips/zboot/common/misc-simple.c
1829 + *
1830 + * Misc. bootloader code for many machines.  This assumes you have are using
1831 + * a 6xx/7xx/74xx CPU in your machine.  This assumes the chunk of memory
1832 + * below 8MB is free.  Finally, it assumes you have a NS16550-style uart for
1833 + * your serial console.  If a machine meets these requirements, it can quite
1834 + * likely use this code during boot.
1835 + *
1836 + * Author: Matt Porter <mporter@mvista.com>
1837 + * Derived from arch/ppc/boot/prep/misc.c
1838 + *
1839 + * Copyright 2001 MontaVista Software Inc.
1840 + *
1841 + * This program is free software; you can redistribute  it and/or modify it
1842 + * under  the terms of  the GNU General  Public License as published by the
1843 + * Free Software Foundation;  either version 2 of the  License, or (at your
1844 + * option) any later version.
1845 + */
1846 +
1847 +#include <linux/types.h>
1848 +#include <linux/elf.h>
1849 +#include <linux/config.h>
1850 +
1851 +#include <asm/page.h>
1852 +
1853 +#include "linux/zlib.h"
1854 +
1855 +extern struct NS16550 *com_port;
1856 +
1857 +char *avail_ram;
1858 +char *end_avail;
1859 +extern char _end[];
1860 +char *zimage_start;
1861 +
1862 +#ifdef CONFIG_CMDLINE
1863 +#define CMDLINE CONFIG_CMDLINE
1864 +#else
1865 +#define CMDLINE ""
1866 +#endif
1867 +char cmd_preset[] = CMDLINE;
1868 +char cmd_buf[256];
1869 +char *cmd_line = cmd_buf;
1870 +
1871 +/* The linker tells us where the image is.
1872 +*/
1873 +extern unsigned char __image_begin, __image_end;
1874 +extern unsigned char __ramdisk_begin, __ramdisk_end;
1875 +unsigned long initrd_size;
1876 +
1877 +extern void puts(const char *);
1878 +extern void putc(const char c);
1879 +extern void puthex(unsigned long val);
1880 +extern void *memcpy(void * __dest, __const void * __src,
1881 +                           __kernel_size_t __n);
1882 +extern void gunzip(void *, int, unsigned char *, int *);
1883 +extern void udelay(long delay);
1884 +extern int tstc(void);
1885 +extern int getc(void);
1886 +extern volatile struct NS16550 *serial_init(int chan);
1887 +
1888 +void
1889 +decompress_kernel(unsigned long load_addr, int num_words,
1890 +               unsigned long cksum, unsigned long *sp)
1891 +{
1892 +       extern unsigned long start;
1893 +       int     zimage_size;
1894 +
1895 +       com_port = (struct NS16550 *)serial_init(0);
1896 +
1897 +       initrd_size = (unsigned long)(&__ramdisk_end) -
1898 +               (unsigned long)(&__ramdisk_begin);
1899 +
1900 +       /*
1901 +        * Reveal where we were loaded at and where we
1902 +        * were relocated to.
1903 +        */
1904 +       puts("loaded at:     "); puthex(load_addr);
1905 +       puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n");
1906 +       if ( (unsigned long)load_addr != (unsigned long)&start )
1907 +       {
1908 +               puts("relocated to:  "); puthex((unsigned long)&start);
1909 +               puts(" ");
1910 +               puthex((unsigned long)((unsigned long)&start + (4*num_words)));
1911 +               puts("\n");
1912 +       }
1913 +
1914 +       /*
1915 +        * We link ourself to an arbitrary low address.  When we run, we
1916 +        * relocate outself to that address.  __image_being points to
1917 +        * the part of the image where the zImage is. -- Tom
1918 +        */
1919 +       zimage_start = (char *)(unsigned long)(&__image_begin);
1920 +       zimage_size = (unsigned long)(&__image_end) -
1921 +                       (unsigned long)(&__image_begin);
1922 +
1923 +       /*
1924 +        * The zImage and initrd will be between start and _end, so they've
1925 +        * already been moved once.  We're good to go now. -- Tom
1926 +        */
1927 +       puts("zimage at:     "); puthex((unsigned long)zimage_start);
1928 +       puts(" "); puthex((unsigned long)(zimage_size+zimage_start));
1929 +       puts("\n");
1930 +
1931 +       if ( initrd_size ) {
1932 +               puts("initrd at:     ");
1933 +               puthex((unsigned long)(&__ramdisk_begin));
1934 +               puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
1935 +       }
1936 +
1937 +       /* assume the chunk below 8M is free */
1938 +       avail_ram = (char *)AVAIL_RAM_START;
1939 +       end_avail = (char *)AVAIL_RAM_END;
1940 +
1941 +       /* Display standard Linux/MIPS boot prompt for kernel args */
1942 +       puts("Uncompressing Linux at load address ");
1943 +       puthex(LOADADDR);
1944 +       puts("\n");
1945 +       /* I don't like this hard coded gunzip size (fixme) */
1946 +       gunzip((void *)LOADADDR, 0x400000, zimage_start, &zimage_size);
1947 +       puts("Now booting the kernel\n");
1948 +}
1949 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c
1950 --- linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c 1970-01-01 01:00:00.000000000 +0100
1951 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c     2006-04-20 19:27:12.000000000 +0200
1952 @@ -0,0 +1,2 @@
1953 +char initrd_data[1];
1954 +int initrd_len = 0;
1955 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile
1956 --- linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile    1970-01-01 01:00:00.000000000 +0100
1957 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile        2006-04-20 19:27:12.000000000 +0200
1958 @@ -0,0 +1,17 @@
1959 +
1960 +#
1961 +# This dir holds all of the images for MIPS machines.
1962 +# Tom Rini     January 2001
1963 +# Pete Popov   2004
1964 +
1965 +extra-y                := vmlinux.bin vmlinux.gz
1966 +
1967 +OBJCOPYFLAGS_vmlinux.bin := -O binary
1968 +$(obj)/vmlinux.bin: vmlinux FORCE
1969 +       $(call if_changed,objcopy)
1970 +
1971 +$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
1972 +       $(call if_changed,gzip)
1973 +
1974 +# Files generated that shall be removed upon make clean
1975 +clean-files    := vmlinux* zImage*
1976 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h
1977 --- linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h 1970-01-01 01:00:00.000000000 +0100
1978 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h     2006-04-20 19:27:12.000000000 +0200
1979 @@ -0,0 +1,18 @@
1980 +/*
1981 + * Copyright (C) Paul Mackerras 1997.
1982 + *
1983 + * This program is free software; you can redistribute it and/or
1984 + * modify it under the terms of the GNU General Public License
1985 + * as published by the Free Software Foundation; either version
1986 + * 2 of the License, or (at your option) any later version.
1987 + */
1988 +typedef int    FILE;
1989 +extern FILE *stdin, *stdout;
1990 +#define NULL   ((void *)0)
1991 +#define EOF    (-1)
1992 +#define fopen(n, m)    NULL
1993 +#define fflush(f)      0
1994 +#define fclose(f)      0
1995 +extern char *fgets();
1996 +
1997 +#define perror(s)      printf("%s: no files!\n", (s))
1998 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h
1999 --- linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h  1970-01-01 01:00:00.000000000 +0100
2000 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h      2006-04-20 19:27:12.000000000 +0200
2001 @@ -0,0 +1,46 @@
2002 +/*
2003 + * NS16550 Serial Port
2004 + */
2005 +
2006 +/*
2007 + * Figure out which file will have the definitons of COMx
2008 + */
2009 +
2010 +/* Some machines have their uart registers 16 bytes apart.  Most don't.
2011 + * TODO: Make this work like drivers/char/serial does - Tom */
2012 +#if !defined(UART_REG_PAD)
2013 +#define UART_REG_PAD(x)
2014 +#endif
2015 +
2016 +struct NS16550
2017 + {
2018 +  unsigned char rbr;  /* 0 */
2019 +  UART_REG_PAD(rbr)
2020 +  unsigned char ier;  /* 1 */
2021 +  UART_REG_PAD(ier)
2022 +  unsigned char fcr;  /* 2 */
2023 +  UART_REG_PAD(fcr)
2024 +  unsigned char lcr;  /* 3 */
2025 +  UART_REG_PAD(lcr)
2026 +  unsigned char mcr;  /* 4 */
2027 +  UART_REG_PAD(mcr)
2028 +  unsigned char lsr;  /* 5 */
2029 +  UART_REG_PAD(lsr)
2030 +  unsigned char msr;  /* 6 */
2031 +  UART_REG_PAD(msr)
2032 +  unsigned char scr;  /* 7 */
2033 + };
2034 +
2035 +#define thr rbr
2036 +#define iir fcr
2037 +#define dll rbr
2038 +#define dlm ier
2039 +
2040 +#define LSR_DR   0x01  /* Data ready */
2041 +#define LSR_OE   0x02  /* Overrun */
2042 +#define LSR_PE   0x04  /* Parity error */
2043 +#define LSR_FE   0x08  /* Framing error */
2044 +#define LSR_BI   0x10  /* Break */
2045 +#define LSR_THRE 0x20  /* Xmit holding register empty */
2046 +#define LSR_TEMT 0x40  /* Xmitter empty */
2047 +#define LSR_ERR  0x80  /* Error */
2048 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h
2049 --- linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h    1970-01-01 01:00:00.000000000 +0100
2050 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h        2006-04-20 19:27:12.000000000 +0200
2051 @@ -0,0 +1,20 @@
2052 +/*
2053 + * arch/ppc/boot/include/sandpoint_serial.h
2054 + *
2055 + * Location of the COM ports on Motorola SPS Sandpoint machines
2056 + *
2057 + * Author: Mark A. Greer
2058 + *        mgreer@mvista.com
2059 + *
2060 + * Copyright 2001 MontaVista Software Inc.
2061 + *
2062 + * This program is free software; you can redistribute  it and/or modify it
2063 + * under  the terms of  the GNU General  Public License as published by the
2064 + * Free Software Foundation;  either version 2 of the  License, or (at your
2065 + * option) any later version.
2066 + */
2067 +
2068 +#define COM1 0xfe0003f8
2069 +#define COM2 0xfe0002f8
2070 +#define COM3 0x00000000                /* No COM3 */
2071 +#define COM4 0x00000000                /* No COM4 */
2072 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/ld.script linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script
2073 --- linux-2.6.16.7/arch/mips/boot/compressed/ld.script  1970-01-01 01:00:00.000000000 +0100
2074 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script      2006-04-20 19:27:12.000000000 +0200
2075 @@ -0,0 +1,151 @@
2076 +OUTPUT_ARCH(mips)
2077 +ENTRY(start)
2078 +SECTIONS
2079 +{
2080 +  /* Read-only sections, merged into text segment: */
2081 +  /* . = 0x81000000; */
2082 +  .init          : { *(.init)          } =0
2083 +  .text      :
2084 +  {
2085 +    _ftext = . ;
2086 +    *(.text)
2087 +    *(.rodata) *(.rodata.*)
2088 +    *(.rodata1)
2089 +    /* .gnu.warning sections are handled specially by elf32.em.  */
2090 +    *(.gnu.warning)
2091 +  } =0
2092 +  .kstrtab : { *(.kstrtab) }
2093 +
2094 +  . = ALIGN(16);               /* Exception table */
2095 +  __start___ex_table = .;
2096 +  __ex_table : { *(__ex_table) }
2097 +  __stop___ex_table = .;
2098 +
2099 +  __start___dbe_table = .;     /* Exception table for data bus errors */
2100 +  __dbe_table : { *(__dbe_table) }
2101 +  __stop___dbe_table = .;
2102 +
2103 +  __start___ksymtab = .;       /* Kernel symbol table */
2104 +  __ksymtab : { *(__ksymtab) }
2105 +  __stop___ksymtab = .;
2106 +
2107 +  _etext = .;
2108 +
2109 +  . = ALIGN(8192);
2110 +  .data.init_task : { *(.data.init_task) }
2111 +
2112 +  /* Startup code */
2113 +  . = ALIGN(4096);
2114 +  __init_begin = .;
2115 +  .text.init : { *(.text.init) }
2116 +  .data.init : { *(.data.init) }
2117 +  . = ALIGN(16);
2118 +  __setup_start = .;
2119 +  .setup.init : { *(.setup.init) }
2120 +  __setup_end = .;
2121 +  __initcall_start = .;
2122 +  .initcall.init : { *(.initcall.init) }
2123 +  __initcall_end = .;
2124 +  . = ALIGN(4096);     /* Align double page for init_task_union */
2125 +  __init_end = .;
2126 +
2127 +  . = ALIGN(4096);
2128 +  .data.page_aligned : { *(.data.idt) }
2129 +
2130 +  . = ALIGN(32);
2131 +  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
2132 +
2133 +  .fini      : { *(.fini)    } =0
2134 +  .reginfo : { *(.reginfo) }
2135 +  /* Adjust the address for the data segment.  We want to adjust up to
2136 +     the same address within the page on the next page up.  It would
2137 +     be more correct to do this:
2138 +       . = .;
2139 +     The current expression does not correctly handle the case of a
2140 +     text segment ending precisely at the end of a page; it causes the
2141 +     data segment to skip a page.  The above expression does not have
2142 +     this problem, but it will currently (2/95) cause BFD to allocate
2143 +     a single segment, combining both text and data, for this case.
2144 +     This will prevent the text segment from being shared among
2145 +     multiple executions of the program; I think that is more
2146 +     important than losing a page of the virtual address space (note
2147 +     that no actual memory is lost; the page which is skipped can not
2148 +     be referenced).  */
2149 +  . = .;
2150 +  .data    :
2151 +  {
2152 +    _fdata = . ;
2153 +    *(.data)
2154 +
2155 +   /* Put the compressed image here, so bss is on the end. */
2156 +   __image_begin = .;
2157 +   *(.image)
2158 +   __image_end = .;
2159 +   /* Align the initial ramdisk image (INITRD) on page boundaries. */
2160 +   . = ALIGN(4096);
2161 +   __ramdisk_begin = .;
2162 +   *(.initrd)
2163 +   __ramdisk_end = .;
2164 +   . = ALIGN(4096);
2165 +
2166 +    CONSTRUCTORS
2167 +  }
2168 +  .data1   : { *(.data1) }
2169 +  _gp = . + 0x8000;
2170 +  .lit8 : { *(.lit8) }
2171 +  .lit4 : { *(.lit4) }
2172 +  .ctors         : { *(.ctors)   }
2173 +  .dtors         : { *(.dtors)   }
2174 +  .got           : { *(.got.plt) *(.got) }
2175 +  .dynamic       : { *(.dynamic) }
2176 +  /* We want the small data sections together, so single-instruction offsets
2177 +     can access them all, and initialized data all before uninitialized, so
2178 +     we can shorten the on-disk segment size.  */
2179 +  .sdata     : { *(.sdata) }
2180 +  . = ALIGN(4);
2181 +  _edata  =  .;
2182 +  PROVIDE (edata = .);
2183 +
2184 +  __bss_start = .;
2185 +  _fbss = .;
2186 +  .sbss      : { *(.sbss) *(.scommon) }
2187 +  .bss       :
2188 +  {
2189 +   *(.dynbss)
2190 +   *(.bss)
2191 +   *(COMMON)
2192 +   .  = ALIGN(4);
2193 +  _end = . ;
2194 +  PROVIDE (end = .);
2195 +  }
2196 +
2197 +  /* Sections to be discarded */
2198 +  /DISCARD/ :
2199 +  {
2200 +        *(.text.exit)
2201 +        *(.data.exit)
2202 +        *(.exitcall.exit)
2203 +  }
2204 +
2205 +  /* This is the MIPS specific mdebug section.  */
2206 +  .mdebug : { *(.mdebug) }
2207 +  /* These are needed for ELF backends which have not yet been
2208 +     converted to the new style linker.  */
2209 +  .stab 0 : { *(.stab) }
2210 +  .stabstr 0 : { *(.stabstr) }
2211 +  /* DWARF debug sections.
2212 +     Symbols in the .debug DWARF section are relative to the beginning of the
2213 +     section so we begin .debug at 0.  It's not clear yet what needs to happen
2214 +     for the others.   */
2215 +  .debug          0 : { *(.debug) }
2216 +  .debug_srcinfo  0 : { *(.debug_srcinfo) }
2217 +  .debug_aranges  0 : { *(.debug_aranges) }
2218 +  .debug_pubnames 0 : { *(.debug_pubnames) }
2219 +  .debug_sfnames  0 : { *(.debug_sfnames) }
2220 +  .line           0 : { *(.line) }
2221 +  /* These must appear regardless of  .  */
2222 +  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
2223 +  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
2224 +  .comment : { *(.comment) }
2225 +  .note : { *(.note) }
2226 +}
2227 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile
2228 --- linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile       1970-01-01 01:00:00.000000000 +0100
2229 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile   2006-04-20 19:27:12.000000000 +0200
2230 @@ -0,0 +1,11 @@
2231 +
2232 +#
2233 +# Makefile for some libs needed by zImage.
2234 +#
2235 +
2236 +lib-y := $(addprefix ../../../../../lib/zlib_inflate/, \
2237 +       infblock.o infcodes.o inffast.o inflate.o inftrees.o infutil.o) \
2238 +       $(addprefix ../../../../../lib/, ctype.o string.o) \
2239 +       $(addprefix ../../../../../arch/mips/lib/, memcpy.o) \
2240 +
2241 +
2242 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/entry linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry
2243 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/entry        1970-01-01 01:00:00.000000000 +0100
2244 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry    2006-04-20 19:27:12.000000000 +0200
2245 @@ -0,0 +1,12 @@
2246 +#!/bin/sh
2247 +
2248 +# grab the kernel_entry address from the vmlinux elf image
2249 +entry=`$1 $2  | grep kernel_entry`
2250 +
2251 +fs=`echo $entry | grep ffffffff`  # check toolchain output
2252 +
2253 +if [ -n "$fs" ]; then
2254 +       echo "0x"`$1 $2  | grep kernel_entry | cut -c9- | awk '{print $1}'`
2255 +else
2256 +       echo "0x"`$1 $2  | grep kernel_entry | cut -c1- | awk '{print $1}'`
2257 +fi
2258 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/offset linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset
2259 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/offset       1970-01-01 01:00:00.000000000 +0100
2260 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset   2006-04-20 19:27:12.000000000 +0200
2261 @@ -0,0 +1,3 @@
2262 +#!/bin/sh
2263 +
2264 +echo "0x"`$1 -h $2  | grep $3 | grep -v zvmlinux| awk '{print $6}'`
2265 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/size linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size
2266 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/size 1970-01-01 01:00:00.000000000 +0100
2267 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size     2006-04-20 19:27:12.000000000 +0200
2268 @@ -0,0 +1,4 @@
2269 +#!/bin/sh
2270 +
2271 +OFFSET=`$1 -h $2  | grep $3 | grep -v zvmlinux | awk '{print $3}'`
2272 +echo "0x"$OFFSET