#define ALIGN(x,a) ({ typeof(a) __a = (a); (((x) + __a - 1) & ~(__a - 1)); })
#define HEADER_VERSION_V1 0x01000000
+#define HEADER_VERSION_V2 0x02000000
+#define HWID_TL_MR10U_V1 0x00100101
#define HWID_TL_MR3020_V1 0x30200001
#define HWID_TL_MR3220_V1 0x32200001
#define HWID_TL_MR3220_V2 0x32200002
#define HWID_TL_MR3420_V1 0x34200001
+#define HWID_TL_MR3420_V2 0x34200002
#define HWID_TL_WA701N_V1 0x07010001
#define HWID_TL_WA7510N_V1 0x75100001
#define HWID_TL_WA801ND_V1 0x08010001
+#define HWID_TL_WA830RE_V1 0x08300010
+#define HWID_TL_WA830RE_V2 0x08300002
#define HWID_TL_WA901ND_V1 0x09010001
#define HWID_TL_WA901ND_V2 0x09010002
#define HWID_TL_WDR4900_V1 0x49000001
#define HWID_TL_WR703N_V1 0x07030101
+#define HWID_TL_WR720N_V3 0x07200103
#define HWID_TL_WR741ND_V1 0x07410001
#define HWID_TL_WR741ND_V4 0x07410004
#define HWID_TL_WR740N_V1 0x07400001
#define HWID_TL_WR1043ND_V1 0x10430001
#define HWID_TL_WR1041N_V2 0x10410002
#define HWID_TL_WR2543N_V1 0x25430001
+#define HWID_TD_W8970_V1 0x89700001
#define MD5SUM_LEN 16
uint8_t pad[354];
} __attribute__ ((packed));
+struct fw_header_v2 {
+ uint32_t version; /* header version */
+ char fw_version[48];
+ uint32_t hw_id; /* hardware id */
+ uint32_t hw_rev; /* hardware revision */
+ uint32_t unk1;
+ uint8_t md5sum1[MD5SUM_LEN];
+ uint32_t unk2;
+ uint8_t md5sum2[MD5SUM_LEN];
+ uint32_t unk3;
+ uint32_t kernel_la; /* kernel load address */
+ uint32_t kernel_ep; /* kernel entry point */
+ uint32_t fw_length; /* total length of the firmware */
+ uint32_t kernel_ofs; /* kernel data offset */
+ uint32_t kernel_len; /* kernel data length */
+ uint32_t rootfs_ofs; /* rootfs data offset */
+ uint32_t rootfs_len; /* rootfs data length */
+ uint32_t boot_ofs; /* bootloader data offset */
+ uint32_t boot_len; /* bootloader data length */
+ uint16_t ver_hi;
+ uint16_t ver_mid;
+ uint16_t ver_lo;
+ uint8_t pad[366];
+} __attribute__ ((packed));
+
struct flash_layout {
char *id;
uint32_t fw_max_len;
uint32_t hw_id;
uint32_t hw_rev;
char *layout_id;
+ uint32_t hdr_version
};
/*
.kernel_ep = 0x80060000,
.rootfs_ofs = 0x100000,
}, {
+ .id = "8Mltq",
+ .fw_max_len = 0x7a0000,
+ .kernel_la = 0x80002000,
+ .kernel_ep = 0x80002000,
+ .rootfs_ofs = 0x140000,
+ }, {
.id = "16Mppc",
.fw_max_len = 0xf80000,
.kernel_la = 0x00000000,
static struct board_info boards[] = {
{
+ .id = "TL-MR10Uv1",
+ .hw_id = HWID_TL_MR10U_V1,
+ .hw_rev = 1,
+ .layout_id = "4Mlzma",
+ }, {
.id = "TL-MR3020v1",
.hw_id = HWID_TL_MR3020_V1,
.hw_rev = 1,
.hw_rev = 1,
.layout_id = "4M",
}, {
+ .id = "TL-MR3420v2",
+ .hw_id = HWID_TL_MR3420_V2,
+ .hw_rev = 1,
+ .layout_id = "4Mlzma",
+ }, {
.id = "TL-WA701Nv1",
.hw_id = HWID_TL_WA701N_V1,
.hw_rev = 1,
.hw_rev = 1,
.layout_id = "4M",
}, {
+ .id = "TL-WA830REv1",
+ .hw_id = HWID_TL_WA830RE_V1,
+ .hw_rev = 1,
+ .layout_id = "4M",
+ }, {
+ .id = "TL-WA830REv2",
+ .hw_id = HWID_TL_WA830RE_V2,
+ .hw_rev = 1,
+ .layout_id = "4M",
+ }, {
.id = "TL-WA901NDv1",
.hw_id = HWID_TL_WA901ND_V1,
.hw_rev = 1,
.hw_rev = 1,
.layout_id = "4Mlzma",
}, {
+ .id = "TL-WR720Nv3",
+ .hw_id = HWID_TL_WR720N_V3,
+ .hw_rev = 1,
+ .layout_id = "4Mlzma",
+ }, {
+ .id = "TD-W8970v1",
+ .hw_id = HWID_TD_W8970_V1,
+ .hw_rev = 1,
+ .layout_id = "8Mltq",
+ .hdr_version = HEADER_VERSION_V2
+ }, {
/* terminating entry */
}
};
" -E <ep> overwrite kernel entry point with <ep> (hexval prefixed with 0x)\n"
" -L <la> overwrite kernel load address with <la> (hexval prefixed with 0x)\n"
" -H <hwid> use hardware id specified with <hwid>\n"
+" -W <hwrev> use hardware revision specified with <hwrev>\n"
" -F <id> use flash layout specified with <id>\n"
" -k <file> read kernel image from the file <file>\n"
" -r <file> read rootfs image from the file <file>\n"
get_md5(buf, len, hdr->md5sum1);
}
+static void fill_header_v2(char *buf, int len)
+{
+ struct fw_header_v2 *hdr = (struct fw_header_v2 *)buf;
+
+ memset(hdr, 0, sizeof(struct fw_header_v2));
+
+ hdr->version = htonl(HEADER_VERSION_V2);
+ memset(hdr->fw_version, 0xff, sizeof(hdr->fw_version));
+ strncpy(hdr->fw_version, version, strlen(version));
+ hdr->hw_id = htonl(hw_id);
+ hdr->hw_rev = htonl(hw_rev);
+
+ if (boot_info.file_size == 0)
+ memcpy(hdr->md5sum1, md5salt_normal, sizeof(hdr->md5sum1));
+ else
+ memcpy(hdr->md5sum1, md5salt_boot, sizeof(hdr->md5sum1));
+
+ hdr->kernel_la = htonl(kernel_la);
+ hdr->kernel_ep = htonl(kernel_ep);
+ hdr->fw_length = htonl(layout->fw_max_len);
+ hdr->kernel_ofs = htonl(sizeof(struct fw_header_v2));
+ hdr->kernel_len = htonl(kernel_len);
+ if (!combined) {
+ hdr->rootfs_ofs = htonl(rootfs_ofs);
+ hdr->rootfs_len = htonl(rootfs_info.file_size);
+ }
+
+ hdr->ver_hi = htons(fw_ver_hi);
+ hdr->ver_mid = htons(fw_ver_mid);
+ hdr->ver_lo = htons(fw_ver_lo);
+
+ get_md5(buf, len, hdr->md5sum1);
+}
+
static int pad_jffs2(char *buf, int currlen)
{
int len;
char *p;
int ret = EXIT_FAILURE;
int writelen = 0;
+ int hdr_len;
+ if (board->hdr_version == HEADER_VERSION_V2)
+ hdr_len = sizeof(struct fw_header_v2);
+ else
+ hdr_len = sizeof(struct fw_header);
buflen = layout->fw_max_len;
}
memset(buf, 0xff, buflen);
- p = buf + sizeof(struct fw_header);
+ p = buf + hdr_len;
ret = read_to_buf(&kernel_info, p);
if (ret)
goto out_free_buf;
- writelen = sizeof(struct fw_header) + kernel_len;
+ writelen = hdr_len + kernel_len;
if (!combined) {
if (rootfs_align)
if (!strip_padding)
writelen = buflen;
- fill_header(buf, writelen);
+ if (board->hdr_version == HEADER_VERSION_V2)
+ fill_header_v2(buf, writelen);
+ else
+ fill_header(buf, writelen);
ret = write_fw(buf, writelen);
if (ret)
goto out_free_buf;
projects / openwrt.git / blobdiff