oxnas: add missing semicolon

[openwrt.git] / target / linux / oxnas / files / drivers / pinctrl / pinctrl-oxnas.c

diff --git a/target/linux/oxnas/files/drivers/pinctrl/pinctrl-oxnas.c b/target/linux/oxnas/files/drivers/pinctrl/pinctrl-oxnas.c
index fa5f3a9..034a730 100644 (file)
--- a/target/linux/oxnas/files/drivers/pinctrl/pinctrl-oxnas.c
+++ b/target/linux/oxnas/files/drivers/pinctrl/pinctrl-oxnas.c
@@ -26,6 +26,8 @@
 #include <linux/pinctrl/pinmux.h>
 /* Since we request GPIOs from ourself */
 #include <linux/pinctrl/consumer.h>
+#include <linux/spinlock.h>
+#include <linux/version.h>
 
 #include "core.h"
 
@@ -40,6 +42,7 @@ struct oxnas_gpio_chip {
        void __iomem            *regbase;  /* GPIOA/B virtual address */
        void __iomem            *ctrlbase; /* SYS/SEC_CTRL virtual address */
        struct irq_domain       *domain;   /* associated irq domain */
+       spinlock_t              lock;
 };
 
 #define to_oxnas_gpio_chip(c) container_of(c, struct oxnas_gpio_chip, chip)
@@ -1144,12 +1147,17 @@ static void gpio_irq_mask(struct irq_data *d)
        void __iomem    *pio = oxnas_gpio->regbase;
        unsigned        mask = 1 << d->hwirq;
        unsigned        type = irqd_get_trigger_type(d);
+       unsigned long   flags;
 
-       /* FIXME: need proper lock */
+       if (!(type & IRQ_TYPE_EDGE_BOTH))
+               return;
+
+       spin_lock_irqsave(&oxnas_gpio->lock, flags);
        if (type & IRQ_TYPE_EDGE_RISING)
                oxnas_register_clear_mask(pio + RE_IRQ_ENABLE, mask);
        if (type & IRQ_TYPE_EDGE_FALLING)
                oxnas_register_clear_mask(pio + FE_IRQ_ENABLE, mask);
+       spin_unlock_irqrestore(&oxnas_gpio->lock, flags);
 }
 
 static void gpio_irq_unmask(struct irq_data *d)
@@ -1158,12 +1166,17 @@ static void gpio_irq_unmask(struct irq_data *d)
        void __iomem    *pio = oxnas_gpio->regbase;
        unsigned        mask = 1 << d->hwirq;
        unsigned        type = irqd_get_trigger_type(d);
+       unsigned long   flags;
+
+       if (!(type & IRQ_TYPE_EDGE_BOTH))
+               return;
 
-       /* FIXME: need proper lock */
+       spin_lock_irqsave(&oxnas_gpio->lock, flags);
        if (type & IRQ_TYPE_EDGE_RISING)
                oxnas_register_set_mask(pio + RE_IRQ_ENABLE, mask);
        if (type & IRQ_TYPE_EDGE_FALLING)
                oxnas_register_set_mask(pio + FE_IRQ_ENABLE, mask);
+       spin_unlock_irqrestore(&oxnas_gpio->lock, flags);
 }
 
 
@@ -1187,7 +1200,11 @@ static struct irq_chip gpio_irqchip = {
        .irq_set_type   = gpio_irq_type,
 };
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+#else
+static void gpio_irq_handler(struct irq_desc *desc)
+#endif
 {
        struct irq_chip *chip = irq_desc_get_chip(desc);
        struct irq_data *idata = irq_desc_get_irq_data(desc);
@@ -1228,7 +1245,9 @@ static int oxnas_gpio_irq_map(struct irq_domain *h, unsigned int virq,
        irq_set_lockdep_class(virq, &gpio_lock_class);
 
        irq_set_chip_and_handler(virq, &gpio_irqchip, handle_edge_irq);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)
        set_irq_flags(virq, IRQF_VALID);
+#endif
        irq_set_chip_data(virq, oxnas_gpio);
 
        return 0;
@@ -1352,6 +1371,8 @@ static int oxnas_gpio_probe(struct platform_device *pdev)
 
        oxnas_chip->chip = oxnas_gpio_template;
 
+       spin_lock_init(&oxnas_chip->lock);
+
        chip = &oxnas_chip->chip;
        chip->of_node = np;
        chip->label = dev_name(&pdev->dev);