ipq806x: reduce PCIe buffer size setting to fix potential data corruption issues

[openwrt.git] / target / linux / ipq806x / patches-3.18 / 114-pcie-add-ctlr-init.patch

diff --git a/target/linux/ipq806x/patches-3.18/114-pcie-add-ctlr-init.patch b/target/linux/ipq806x/patches-3.18/114-pcie-add-ctlr-init.patch
index 11c9810..c0b65c7 100644 (file)
--- a/target/linux/ipq806x/patches-3.18/114-pcie-add-ctlr-init.patch
+++ b/target/linux/ipq806x/patches-3.18/114-pcie-add-ctlr-init.patch
@@ -229,8 +229,8 @@
 +      writel(upper_32_bits(pp->mem_bus_addr),
 +             pcie->dbi + PCIE20_PLR_IATU_UTAR);
 +
-+      /* 1K PCIE buffer setting */
-+      writel(0x3, pcie->dbi + PCIE20_AXI_MSTR_RESP_COMP_CTRL0);
++      /* 256B PCIE buffer setting */
++      writel(0x1, pcie->dbi + PCIE20_AXI_MSTR_RESP_COMP_CTRL0);
 +      writel(0x1, pcie->dbi + PCIE20_AXI_MSTR_RESP_COMP_CTRL1);
 +}
 +