kernel: backport upstream commit to fix MIPS cache shift with secondary cache enabled
[openwrt.git] / target / linux / generic / patches-3.14 / 132-mips_inline_dma_ops.patch
index e43de02..e8486c9 100644 (file)
@@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -1620,6 +1620,9 @@ config SYS_HAS_CPU_XLR
+@@ -1621,6 +1621,9 @@ config SYS_HAS_CPU_XLR
  config SYS_HAS_CPU_XLP
        bool
  
@@ -510,7 +510,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  
  
  void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
-@@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device
+@@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device 
  }
  EXPORT_SYMBOL(dma_free_noncoherent);
  
@@ -650,7 +650,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  
  void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                         enum dma_data_direction direction)
-@@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev,
+@@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev, 
  
  EXPORT_SYMBOL(dma_cache_sync);