+
+#define QCA955X_GMAC_REG_ETH_CFG 0x00
+
-+#define QCA955X_ETH_CFG_RGMII_GMAC0 BIT(0)
-+#define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6)
++#define QCA955X_ETH_CFG_RGMII_EN BIT(0)
++#define QCA955X_ETH_CFG_GE0_SGMII BIT(6)
+
#endif /* __ASM_MACH_AR71XX_REGS_H */