ar71xx: use backported QCA955x patches

[openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-eth.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 043300c..d7f3595 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -181,6 +181,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
        if (ath79_soc == ATH79_SOC_AR9341 ||
            ath79_soc == ATH79_SOC_AR9342 ||
            ath79_soc == ATH79_SOC_AR9344 ||
+           ath79_soc == ATH79_SOC_QCA9556 ||
            ath79_soc == ATH79_SOC_QCA9558)
                max_id = 1;
        else
@@ -202,6 +203,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
        case ATH79_SOC_AR9341:
        case ATH79_SOC_AR9342:
        case ATH79_SOC_AR9344:
+       case ATH79_SOC_QCA9556:
        case ATH79_SOC_QCA9558:
                if (id == 0) {
                        mdio_dev = &ath79_mdio0_device;
@@ -250,12 +252,17 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
                }
                mdio_data->is_ar934x = 1;
                break;
+
        case ATH79_SOC_QCA9558:
                if (id == 1)
                        mdio_data->builtin_switch = 1;
                mdio_data->is_ar934x = 1;
                break;
 
+       case ATH79_SOC_QCA9556:
+               mdio_data->is_ar934x = 1;
+               break;
+
        default:
                break;
        }
@@ -432,8 +439,8 @@ static struct resource ath79_eth0_resources[] = {
        }, {
                .name   = "mac_irq",
                .flags  = IORESOURCE_IRQ,
-               .start  = ATH79_CPU_IRQ_GE0,
-               .end    = ATH79_CPU_IRQ_GE0,
+               .start  = ATH79_CPU_IRQ(4),
+               .end    = ATH79_CPU_IRQ(4),
        },
 };
 
@@ -460,8 +467,8 @@ static struct resource ath79_eth1_resources[] = {
        }, {
                .name   = "mac_irq",
                .flags  = IORESOURCE_IRQ,
-               .start  = ATH79_CPU_IRQ_GE1,
-               .end    = ATH79_CPU_IRQ_GE1,
+               .start  = ATH79_CPU_IRQ(5),
+               .end    = ATH79_CPU_IRQ(5),
        },
 };
 
@@ -560,6 +567,7 @@ static void __init ath79_init_eth_pll_data(unsigned int id)
        case ATH79_SOC_AR9341:
        case ATH79_SOC_AR9342:
        case ATH79_SOC_AR9344:
+       case ATH79_SOC_QCA9556:
        case ATH79_SOC_QCA9558:
                pll_10 = AR934X_PLL_VAL_10;
                pll_100 = AR934X_PLL_VAL_100;
@@ -636,6 +644,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                        }
                        break;
 
+               case ATH79_SOC_QCA9556:
                case ATH79_SOC_QCA9558:
                        switch (pdata->phy_if_mode) {
                        case PHY_INTERFACE_MODE_MII:
@@ -693,6 +702,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                        }
                        break;
 
+               case ATH79_SOC_QCA9556:
                case ATH79_SOC_QCA9558:
                        switch (pdata->phy_if_mode) {
                        case PHY_INTERFACE_MODE_MII:
@@ -953,6 +963,7 @@ void __init ath79_register_eth(unsigned int id)
                        pdata->fifo_cfg3 = 0x01f00140;
                break;
 
+       case ATH79_SOC_QCA9556:
        case ATH79_SOC_QCA9558:
                if (id == 0) {
                        pdata->reset_bit = QCA955X_RESET_GE0_MAC |
@@ -1018,6 +1029,7 @@ void __init ath79_register_eth(unsigned int id)
                        pdata->mii_bus_dev = &ath79_mdio1_device.dev;
                        break;
 
+               case ATH79_SOC_QCA9556:
                case ATH79_SOC_QCA9558:
                        /* don't assign any MDIO device by default */
                        break;