Certain AP148 platforms (and derivative) use bootloaders which did not
have DT enabled.
In order to support these old platforms, we'll now make the following
modifications:
*explicitely add the memory node in the AP148 DT: this used to be added
by new u-boot through a run-time patch mechanism. We'll now add it
explicitely so it works on boots which don't support that feature. New
boots will have the node twice, the second one will be ignored.
*add the zImage generation next to the FIT image for AP148.
Other platforms using non-DT enabled bootloaders may want to leverage
this zImage code to generate their own firmare as well.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46555
3c298f89-4303-0410-b956-
a3cf2f4a3e73
E2SIZE=$(shell echo $$(($(CONFIG_TARGET_ROOTFS_PARTSIZE)*1024)))
+define Image/BuildKernel/zImage
+ cat $(KDIR)/zImage $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-$(1)
+ $(CP) $(KDIR)/zImage-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage
+ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),)
+ cat $(KDIR)/zImage-initramfs $(LINUX_DIR)/arch/arm/boot/dts/$(1).dtb > $(KDIR)/zImage-initramfs-$(1)
+ $(CP) $(KDIR)/zImage-initramfs-$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1)-zImage-initramfs
+endif
+endef
+
define Image/BuildKernel/FIT
gzip -9n -c $(KDIR)/Image > $(KDIR)/Image.gz
$(call CompressLzma,$(KDIR)/Image,$(KDIR)/Image.gz)
define Image/BuildKernel
$(CP) $(KDIR)/$(IMG_PREFIX)-vmlinux.elf $(BIN_DIR)
$(call Image/BuildKernel/FIT,qcom-ipq8064-ap148)
+ $(call Image/BuildKernel/zImage,qcom-ipq8064-ap148)
$(call Image/BuildKernel/FIT,qcom-ipq8064-db149)
endef
--- /dev/null
+--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
++++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+@@ -4,6 +4,11 @@
+ model = "Qualcomm IPQ8064/AP148";
+ compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+
++ memory@0 {
++ reg = <0x42000000 0x1e000000>;
++ device_type = "memory";
++ };
++
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
--- /dev/null
+--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
++++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+@@ -4,6 +4,11 @@
+ model = "Qualcomm IPQ8064/AP148";
+ compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+
++ memory@0 {
++ reg = <0x42000000 0x1e000000>;
++ device_type = "memory";
++ };
++
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -30,6 +30,22 @@
+@@ -35,6 +35,22 @@
bias-disable;
};
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
-@@ -109,5 +125,19 @@
+@@ -114,5 +130,19 @@
sata@29000000 {
status = "ok";
};
};
};
-@@ -195,6 +213,46 @@
+@@ -72,6 +90,46 @@
};
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
-@@ -310,11 +368,13 @@
+@@ -187,11 +245,13 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -14,8 +14,9 @@
+@@ -19,8 +19,9 @@
};
};
};
chosen {
-@@ -54,6 +55,15 @@
+@@ -59,6 +60,15 @@
bias-none;
};
};
};
gsbi@16300000 {
-@@ -139,5 +149,33 @@
+@@ -144,5 +154,33 @@
pinctrl-0 = <&pcie2_pins>;
pinctrl-names = "default";
};
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
-@@ -64,6 +64,16 @@
+@@ -69,6 +69,16 @@
bias-disable;
};
};
};
gsbi@16300000 {
-@@ -177,5 +187,26 @@
+@@ -182,5 +192,26 @@
reg = <4>;
};
};